JPH09116065A - Lead frame - Google Patents

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Publication number
JPH09116065A
JPH09116065A JP7293278A JP29327895A JPH09116065A JP H09116065 A JPH09116065 A JP H09116065A JP 7293278 A JP7293278 A JP 7293278A JP 29327895 A JP29327895 A JP 29327895A JP H09116065 A JPH09116065 A JP H09116065A
Authority
JP
Japan
Prior art keywords
lead frame
plating
copper
die pad
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP7293278A
Other languages
Japanese (ja)
Inventor
Masahito Sasaki
将人 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dai Nippon Printing Co Ltd
Original Assignee
Dai Nippon Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dai Nippon Printing Co Ltd filed Critical Dai Nippon Printing Co Ltd
Priority to JP7293278A priority Critical patent/JPH09116065A/en
Priority to KR1019960043408A priority patent/KR100266726B1/en
Priority to US08/721,265 priority patent/US6034422A/en
Priority to CA002186695A priority patent/CA2186695C/en
Priority to SG1996010754A priority patent/SG60018A1/en
Priority to DE19640256A priority patent/DE19640256B4/en
Publication of JPH09116065A publication Critical patent/JPH09116065A/en
Priority to KR1020000009734A priority patent/KR100271424B1/en
Withdrawn legal-status Critical Current

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Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a copper-alloy lead frame which can prevent delimitation caused by formation of a copper oxide film of a lead frame surface without depending on assembly conditions of an IC and does not damage bonding property. SOLUTION: Zinc flash plating 130 and copper strike plating 140 are applied one by one to a surface of a copper part of a rear of a die pad 111 which is not a side whereon at least a semiconductor element is mounted in a lead frame 110 for a resin-sealed semiconductor device which consists of a copper alloy material and has the die pad 111 whereon a semiconductor element is mounted and whereto partial silver plating 150 for wire bonding or die bonding is applied.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、半導体装置用のリード
フレームに関し、特に、封止用樹脂との接合強度を向上
させた、銅合金を素材としたリードフレームに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a semiconductor device, and more particularly to a lead frame made of a copper alloy having improved bonding strength with a sealing resin.

【０００２】[0002]

【従来の技術】従来より、半導体装置の組立部材として
用いられる（単層）リードフレームは、通常、コバー
ル、４２合金（４２％ニッケル−鉄合金）、銅系合金の
ような導電性に優れた金属から成り、プレス法もしくは
エッチング法により形成されていた。一般的なプラスチ
ックパッケージであるＱＦＰ（Ｑｕａｄ Ｆｌａｔ Ｐ
ａｃｋａｇｅ）用のリードフレームは、図５（ｂ）
（イ）に示すように、半導体素子を搭載するためのダイ
パッド５２１と、ダイパッド５２１の周囲に設けられた
半導体素子と結線するためのインナーリード５２２と、
該インナーリード５２２に連続して外部回路との結線を
行うためのアウターリード５２３、樹脂封止する際のダ
ムとなるダムバー５２４、リードフレーム５２０全体を
支持するフレーム（枠）部５２５等を備えている。そし
て、リードフレーム５２０は、図５（ａ）に示すよう
に、ダイパッド部５２１をインナーリード５２２形成面
よりもダウンセットした状態でダイパッド５２１に半導
体素子５１０を搭載し、半導体素子５１０の端子（パッ
ド）５１１とインナーリード５２２の先端部とを金など
のワイヤ５３０で結線を行った後に、樹脂５４０にて封
止して、ダムバー５２４部の切断工程、アウターリード
５２３部のフオーミング工程を経て半導体装置５００を
作製していた。尚、図５（ｂ）（ロ）は、図５（ｂ）
（イ）のＦ１−Ｆ２における断面図である。2. Description of the Related Art Conventionally, a (single layer) lead frame used as an assembly member of a semiconductor device is usually excellent in conductivity such as Kovar, 42 alloy (42% nickel-iron alloy), and copper alloy. It was made of metal and formed by pressing or etching. QFP (Quad Flat P) which is a general plastic package
The lead frame for the package is shown in FIG.
As shown in (a), a die pad 521 for mounting a semiconductor element, an inner lead 522 for connecting to a semiconductor element provided around the die pad 521,
The inner lead 522 is provided with an outer lead 523 for connecting to an external circuit continuously, a dam bar 524 that serves as a dam for resin sealing, and a frame portion 525 for supporting the entire lead frame 520. There is. Then, as shown in FIG. 5A, the lead frame 520 mounts the semiconductor element 510 on the die pad 521 in a state where the die pad portion 521 is set down from the surface on which the inner leads 522 are formed, and the terminal (pad ) 511 and the tip of the inner lead 522 are connected by a wire 530 such as gold, and then sealed with a resin 540, and then a dam bar 524 cutting process and an outer lead 523 forming process are performed. 500 was produced. In addition, FIG. 5B and FIG.
It is sectional drawing in F1-F2 of (a).

【０００３】このようなリードフレームは、半導体素子
５１０の端子（パッド）５１１とインナーリード５２２
の先端部とを金などのワイヤ５３０でワイヤボンディン
グ（結線）、半導体素子の搭載の際に、強い結合力と導
電性を確保するために、貴金属めっきを、少なくともイ
ンナーリード５２２先端部、ダイパッド５２１の半導体
搭載側の面に施していた。貴金属めっきとしては、銀め
っき処理が一般には採られていた。Such a lead frame has terminals (pads) 511 of the semiconductor element 510 and inner leads 522.
To the tip end of the inner wire 522 by wire bonding (wiring) with a wire 530 made of gold or the like to secure a strong bonding force and conductivity when mounting a semiconductor element. Was applied to the surface of the semiconductor mounting side. As the noble metal plating, a silver plating treatment is generally adopted.

【０００４】従来のリードフレームにおいては、図４
（ａ）に示すように、ダイパッド１１１の半導体素子搭
載側とインナーリード１１２の先端部に、リードフレー
ム素材（銅合金）１２０上に、順に銅ストライクめっき
１４０、銀めっき１５０を形成しており、その銀めっき
工程は、図４（ｂ）に示すように、外形加工されたリー
ドフレーム素材１２０に対し、脱脂、酸洗い等の前処理
（図４（イ）を行ってから、一般に下地めっきとして
０．１〜０．３μｍ厚程度の銅（Ｃｕ）ストライクめっ
きを施し（図４（ロ））、所望の領域に１．５〜１０μ
ｍ厚の銀めっきが施こした（図４（ハ））後に、本来不
要である部分に薄くついた銀（モレなど）を除去する電
解剥離処理をしてから、ベンゾトリアゾール系等の有機
系薬品により被膜を作り、酸化、水酸化による変色を防
止する変色防止処理（図４（ニ））を施すものであっ
た。銀めっき方法としては、マスキング治具を用いリー
ドフレームの所定領域を覆い露出部へ銀めっきを吹きか
けて部分的に銀めっきを施す方法や、リードフレームに
電着レジストを塗膜した後、電着レジストを製版して所
定の部分のみ露出した状態でめっき液に浸漬してめっき
を施す方法等が用いられている。このような処理が施さ
れた銅合金を素材としたリードフレームにおいては、半
導体装置の作製工程や半導体装置の実装工程において
も、下地めっきが通常剥離することはなく、半導体装置
に使用された場合にも、銅ストライク部の剥離はないと
されていた。FIG. 4 shows a conventional lead frame.
As shown in (a), a copper strike plating 140 and a silver plating 150 are sequentially formed on a lead frame material (copper alloy) 120 at the semiconductor element mounting side of the die pad 111 and the tip of the inner lead 112, In the silver plating step, as shown in FIG. 4B, pretreatment such as degreasing and pickling is performed on the externally processed lead frame material 120 (FIG. 4A), and then generally, as a base plating. Copper (Cu) strike plating with a thickness of 0.1 to 0.3 μm is applied (FIG. 4B), and 1.5 to 10 μ is applied to a desired area.
After m-thick silver plating is applied (Fig. 4 (c)), electrolytic stripping treatment is performed to remove thin silver (more) that is originally unnecessary, and then an organic system such as benzotriazole system is used. A film was formed with a chemical and a discoloration prevention treatment (FIG. 4 (d)) was performed to prevent discoloration due to oxidation and hydroxylation. As the silver plating method, a masking jig is used to cover a predetermined area of the lead frame and the exposed area is sprayed with silver to partially silver-coat, or the lead frame is coated with an electrodeposition resist and then electroplated. For example, a method is used in which a resist is made into a plate and is immersed in a plating solution in a state where only a predetermined portion is exposed to perform plating. In the case of a lead frame made of a copper alloy that has been subjected to such a treatment, the base plating does not usually peel off even during the semiconductor device manufacturing process or the semiconductor device mounting process However, it was said that there was no peeling of the copper strike part.

【０００５】しかしながら、最近、このような処理が施
された銅合金を素材とするリードフレームを用いた場
合、リードフレームに起因したパッケージのデラミネー
ション（剥離）が半導体装置組み立て工程や実装工程で
生じていることが分かってきた。尚、パッケージのデラ
ミネーション（剥離）とは、ＩＣパッケージ内の各界
面、即ちＩＣチップ（半導体素子）と封止用樹脂との界
面、ダイボンディング剤とＩＣチップ（半導体素子）と
の界面等での剥離を言うが、リードフレームに起因する
デラミネーション（剥離）は封止用樹脂とダイパッド裏
面との界面での剥離等である。封止用樹脂とダイパッド
裏面との界面でのデラミネーション（剥離）の発生は、
銅合金を素材とするリードフレームの表面処理や組み立
て条件と密接な関係があることも次第に分かってきた。
銀めっきの下地めっきとして銅ストライクめっきが施こ
され、銀めっき後に電解剥離と変色防止が施された、銅
合金を素材とするリードフレームにおいては、ＩＣ（半
導体装置）組み立て工程中の加熱工程で、銅合金表面に
酸化膜が生じ、酸化膜と金属（銅合金）との間の密着強
度が不十分であることが、デラミネーション（剥離）発
生の原因と考えられている。However, recently, when a lead frame made of a copper alloy which has been subjected to such a treatment is used, delamination (peeling) of the package due to the lead frame occurs in a semiconductor device assembling process and a mounting process. I have come to understand that. The delamination of the package means each interface in the IC package, that is, the interface between the IC chip (semiconductor element) and the sealing resin, the interface between the die bonding agent and the IC chip (semiconductor element), and the like. The delamination caused by the lead frame is peeling at the interface between the sealing resin and the back surface of the die pad. The occurrence of delamination at the interface between the sealing resin and the back surface of the die pad
It has gradually become clear that there is a close relationship with the surface treatment and assembly conditions of lead frames made of copper alloy.
In a lead frame made of copper alloy, which has been subjected to copper strike plating as a base plating of silver plating, and electrolytic peeling and discoloration prevention have been applied after silver plating, the heating process during the IC (semiconductor device) assembly process It is considered that delamination occurs because an oxide film is formed on the surface of the copper alloy and the adhesion strength between the oxide film and the metal (copper alloy) is insufficient.

【０００６】このような状況のもと、封止用樹脂とダイ
パッド裏面との界面、さらには、封止用樹脂とリードフ
レーム全面との界面の発着強度を向上させ、デラミ発生
を防止するための方法として、特表平７−５０３１０３
号（特願平５−５１２６８８号）等が提案されている。
特表平７−５０３１０３号（特願平５−５１２６８８
号）では、クロムと亜鉛の混合体あるいはクロム、亜鉛
それぞれの単体からなる薄い被膜で全面を覆ったリード
フレームが開示されている。しかし、このリードフレー
ムは、銀めっき部分も他の金属被膜で覆われるため、金
ワイヤボンディング性が劣るという問題がある。Under these circumstances, the adhesion strength at the interface between the encapsulating resin and the back surface of the die pad, as well as the interface between the encapsulating resin and the entire surface of the lead frame, is improved to prevent the occurrence of delamination. As a method, the special table 7-503103
Japanese Patent Application No. 5-512688 is proposed.
Japanese Patent Publication No. 7-503103 (Japanese Patent Application No. 5-512688)
No.) discloses a lead frame whose entire surface is covered with a thin film made of a mixture of chromium and zinc or a simple substance of each of chromium and zinc. However, this lead frame has a problem that the gold wire bondability is poor because the silver-plated portion is also covered with another metal film.

【０００７】また、ＩＣ組み立て工程の条件は、組立を
実施するＩＣメーカーにより異なり、銅合金製リードフ
レームの表面酸化状態、酸化膜形成過程もメーカー毎に
異なる為、リードフレームに起因するデラミネーション
の発生状況がＩＣ組み立てメーカーによって異なってい
た。例えば、ベンゾトリアゾール系の被膜により、銅の
酸化、水酸化による変色を防止する処理方法では、ＩＣ
組み立て温度が低いメーカに対しては、デラミネーショ
ン防止効果が得られるが、ＩＣ組み立て温度が高いメー
カではデラミネーション防止効果が得られない。このた
め、従来はデラミネーションに対する対策をＩＣ組み立
て条件に合わせて各メーカ毎に行っていたのが実状で、
ＩＣの組み立て条件によらず、リードフレームに起因す
るデラミネーションに対応できる手段が求められてい
た。Further, the conditions of the IC assembling process differ depending on the IC maker who carries out the assembling, and the surface oxidation state of the copper alloy lead frame and the oxide film forming process also differ depending on the maker, so that delamination caused by the lead frame may occur. The occurrence situation was different depending on the IC assembly manufacturer. For example, in a treatment method for preventing discoloration due to copper oxidation or hydroxylation by a benzotriazole-based coating,
The delamination prevention effect can be obtained for a manufacturer whose assembly temperature is low, but the delamination prevention effect cannot be obtained for a manufacturer whose IC assembly temperature is high. For this reason, in the past, each manufacturer has taken measures against delamination according to the IC assembly conditions.
There has been a demand for means capable of coping with delamination caused by the lead frame, regardless of IC assembly conditions.

【０００８】[0008]

【発明が解決しようとする課題】このように、銅合金製
のリードフレームにおいては、リードフレーム表面の銅
酸化膜生成に起因した半導体装置（ＩＣ）におけるデラ
ミネーションを防止し、ＩＣの信頼性低下、ＩＣ組み立
て工程、実装工程における良品率の低下を防止すること
が望まれており、特に、ＩＣの組み立て条件によらず、
リードフレームに起因するデラミネーションの発生を防
止できるものが求められていた。本発明は、このような
状況のもと、ＩＣの組み立て条件によらず、リードフレ
ーム表面の銅酸化膜生成に起因したデラミネーションの
発生を防止でき、且つ、ボンディング性を損なわない銅
合金製のリードフレームを提供しようとするものであ
る。As described above, in the copper alloy lead frame, delamination in the semiconductor device (IC) due to the formation of a copper oxide film on the surface of the lead frame is prevented, and the reliability of the IC is reduced. It is desired to prevent a reduction in the non-defective rate in the IC assembly process and the mounting process.
There has been a demand for a material that can prevent delamination caused by the lead frame. Under the circumstances, the present invention is made of a copper alloy that can prevent delamination due to the formation of a copper oxide film on the surface of the lead frame and does not impair the bondability regardless of the IC assembly conditions. It is intended to provide a lead frame.

【０００９】[0009]

【課題を解決するための手段】本発明のリードフレーム
は、銅合金材からなり、半導体素子が搭載されるダイパ
ッドを備え、ワイヤボンディング用のないしダイボンデ
ィング用の部分銀めっきが施された樹脂封止型の半導体
装置用リードフレームであって、少なくとも半導体素子
を搭載する側でないダイパッド裏面の銅部表面に、亜鉛
フラッシュめっき、銅ストライクめっきを順次施してあ
ることを特徴とするものである。そして、上記におい
て、銀めっきの下地めっきとしての亜鉛フラッシュめっ
き、銅ストライクめっきが、リードフレーム表面全体に
施されていることを特徴とするものである。そしてま
た、上記において、亜鉛フラッシュめっきの厚さが、
０．００１μｍ以上、０．５μｍ以下であることを特徴
とするものである。A lead frame of the present invention is made of a copper alloy material, has a die pad on which a semiconductor element is mounted, and is a resin encapsulation for wire bonding or partial silver plating for die bonding. A stationary type lead frame for a semiconductor device, characterized in that at least a surface of a copper portion on a rear surface of a die pad on which a semiconductor element is not mounted is sequentially subjected to zinc flash plating and copper strike plating. Further, in the above, zinc flash plating and copper strike plating as an undercoat of silver plating are applied to the entire surface of the lead frame. And also in the above, the thickness of the zinc flash plating is
It is characterized by being 0.001 μm or more and 0.5 μm or less.

【００１０】[0010]

【作用】本発明のリードフレームは、上記のような構成
にすることにより、ＩＣの組み立て条件によらず、リー
ドフレームに起因する半導体装置における封止樹脂のデ
ラミネーションの発生を防止でき、且つ、ボンデイング
性を損なわない銅合金製のリードフレームの提供を可能
としている。詳しくは、少なくとも半導体素子を搭載す
る側でないダイパッド裏面の銅部表面に、亜鉛フラッシ
ュめっき、銅ストライクめっきを順次施してあることに
より、少なくとも、ダイパッド裏面でのリードフレーム
表面の銅酸化膜に起因したデラミネーション（剥離）を
防止できるものとしている。そして、銀めっきの下地め
っきとしての亜鉛フラッシュめっき、銅ストライクめっ
きが、リードフレーム表面全体に施されていることによ
り、ダイパッド裏面を含みリードフレームと封止用樹脂
との全ての界面でのリードフレーム表面の銅酸化膜に起
因したデラミネーション（剥離）を防止できるものとし
ており、且つ、ダイパッドの裏面のみに部分的にめっき
を施す場合と異なり、めっき用治具等を必要としないも
のとしている。そして、亜鉛フラッシュめっきの厚みを
０．５μｍ以下、０．００１μｍ以上としていることに
より、デラミネーション（剥離）の防止の効果が得られ
る適切な膜厚としている。即ち、亜鉛フラッシュめっき
の厚みが０．００１μより薄い場合には、銅ストライク
めっき中に拡散する亜鉛の濃度が小さく、酸化膜の密着
性を向上させるのが不十分で、これを用いた場合デラミ
ネーション（剥離）の発生を防止できないが、０．００
１μｍ以上とすることにより、リードフレーム表面の銅
酸化膜に起因したデラミネーション（剥離）の発生を防
止できるのである。亜鉛フラッシュめっきが０．５μｍ
より厚い場合には、価格が高価になるほか、リードフレ
ーム表面全への面亜鉛フラッシュめっきに限っては、外
装めっきする際、アウターリードにおいて外装めっき中
に含まれる錫（Ｓｎ）の針状結晶ができる可能性があ
り、アウターリード間の短絡を招くおそれがある。ま
た、亜鉛フラッシュめっきが銅ストライクめっきの下に
施されているため、その後の銀めっき工程、ワイヤボン
ディング工程は、従来の処理と同様の工程にて処理で
き、銀めっきの密着性も問題なく、ワイヤボンディング
適性も問題がない。With the lead frame of the present invention having the above-mentioned structure, it is possible to prevent the occurrence of delamination of the sealing resin in the semiconductor device due to the lead frame, regardless of the IC assembly conditions, and It is possible to provide a lead frame made of copper alloy that does not impair the bondability. Specifically, at least the copper surface on the backside of the die pad, which is not the side on which the semiconductor element is mounted, is subjected to zinc flash plating and copper strike plating in order, resulting in at least the copper oxide film on the leadframe surface on the backside of the die pad. It is supposed that delamination can be prevented. Zinc flash plating and copper strike plating as base plating of silver plating are applied to the entire surface of the lead frame, so that the lead frame at all interfaces between the lead frame and the sealing resin, including the back surface of the die pad. The delamination (peeling) caused by the copper oxide film on the surface can be prevented, and unlike the case where only the back surface of the die pad is partially plated, a plating jig or the like is not required. The thickness of the zinc flash plating is set to 0.5 μm or less and 0.001 μm or more to obtain an appropriate film thickness that can obtain the effect of preventing delamination (peeling). That is, when the thickness of the zinc flash plating is less than 0.001 μ, the concentration of zinc diffused during the copper strike plating is small and it is insufficient to improve the adhesion of the oxide film. Lamination (peeling) cannot be prevented, but 0.00
By setting the thickness to 1 μm or more, it is possible to prevent the occurrence of delamination (peeling) due to the copper oxide film on the surface of the lead frame. Zinc flash plating is 0.5 μm
If the thickness is thicker, the price will be higher, and only in the case of surface zinc flash plating on the entire surface of the lead frame, the tin (Sn) needle crystal contained in the outer lead during outer plating during outer plating May occur, which may cause a short circuit between the outer leads. In addition, since zinc flash plating is applied under the copper strike plating, the subsequent silver plating step and wire bonding step can be performed in the same steps as conventional processing, and the adhesion of silver plating does not pose any problem. There is no problem with wire bonding suitability.

【００１１】[0011]

【実施例】本発明のリードフレームの実施例を以下、図
にそって説明する。先ず、実施例１のリードフレームを
挙げて説明する。図１は本発明のリードフレームの実施
例１を示したもので、図１（ｂ）はその平面図を、図１
（ａ）はＡ１−Ａ２における断面の要部拡大図である。
図１中、１１０はリードフレーム、１１１はダイパッ
ド、１１２はインナーリード、１１３はアウターリー
ド、１１４はダムバー、１１５はフレーム、１１６は吊
りバー、１２０はリードフレーム素材（銅合金）、１３
０は亜鉛フラッシュめっき、１４０は銅ストライクめっ
き、１５０は部分銀めっきである。本実施例のリードフ
レーム１１０は、厚さ０．１５ｍｍの銅合金材（古河電
気工業株式会社製ＥＦＴＥＣ６４Ｔ−１／２Ｈ材）から
エッチング加工により図１（ｂ）のような形状に外形加
工されたリードフレーム素材１２０に対し、亜鉛めっき
１３０、銅めっき１４０を順次、リードフレームの表面
全面に施してから、この上に所定の領域にのみに部分銀
めっき１５０を施したものである。本実施例において
は、亜鉛フラッシュめっきを厚さ０．０１μｍ、銅スト
ライクめっきを厚さ０．１μｍ、部分銀めっきを厚さ３
μｍとしたが、銅ストライクめっきの厚さとしては、
０．１〜０．３μｍ、部分銀めっきの厚さとしては１．
５〜１０μｍ、亜鉛フラッシュめっき１３０の厚さとし
ては０．００１μｍ以上、０．５μｍ以下が好ましい。
また、リードフレーム素材１２０として古河電気工業株
式会社製の銅合金ＥＦＴＥＣ６４Ｔ−１／２Ｈ材を用い
ているが、本発明はこれに限定されることはなく、他の
銅合金でも良い。Embodiments of the lead frame of the present invention will be described below with reference to the drawings. First, the lead frame of Example 1 will be described. 1 shows a first embodiment of a lead frame of the present invention, and FIG. 1 (b) is a plan view thereof.
(A) is an enlarged view of a main part of a cross section taken along line A1-A2.
In FIG. 1, 110 is a lead frame, 111 is a die pad, 112 is an inner lead, 113 is an outer lead, 114 is a dam bar, 115 is a frame, 116 is a suspension bar, 120 is a lead frame material (copper alloy), 13
0 is zinc flash plating, 140 is copper strike plating, and 150 is partial silver plating. The lead frame 110 of the present embodiment was externally processed into a shape as shown in FIG. 1B by etching from a copper alloy material (EFTEC64T-1 / 2H material manufactured by Furukawa Electric Co., Ltd.) having a thickness of 0.15 mm. A zinc plating 130 and a copper plating 140 are sequentially applied to the lead frame material 120 on the entire surface of the lead frame, and then a partial silver plating 150 is applied only to a predetermined region on the zinc plating 130 and the copper plating 140. In this embodiment, zinc flash plating has a thickness of 0.01 μm, copper strike plating has a thickness of 0.1 μm, and partial silver plating has a thickness of 3 μm.
μm, but as the thickness of the copper strike plating,
0.1 to 0.3 μm, and the thickness of partial silver plating is 1.
The thickness of the zinc flash plating 130 is preferably 5 μm to 10 μm and 0.001 μm to 0.5 μm.
Further, although the copper alloy EFTEC64T-1 / 2H made by Furukawa Electric Co., Ltd. is used as the lead frame material 120, the present invention is not limited to this, and other copper alloys may be used.

【００１２】本実施例のリードフレームは、図１（ａ）
に示すように、外形加工されたリードフレーム素材１２
０に対し、亜鉛フラッシュめっき１３０、銅トライクめ
っき１４０を順次、全面に施してから、この上に所定の
領域にのみに部分銀めっき１４０を施したものであり、
亜鉛フラッシュめっき１３０を設けていることにより、
母材金属（銅合金）と酸化膜との密着性が向上させ、結
果として、半導体装置を作製する場合には封止樹脂との
デラミネーションの発生を抑えることができるものとし
ている。尚、母材金属（銅合金）と酸化膜との密着性が
向上する機構は明確には判明していないが、銅ストライ
クめっき中に亜鉛が拡散することにより、銅ストライク
めっき中の、カーケンドールボイドの発生が抑えられ、
酸化膜層自体の破壊が起こりにくなる為と思われる。The lead frame of this embodiment is shown in FIG.
As shown in, the lead frame material 12 is
0, zinc flash plating 130 and copper trike plating 140 are sequentially applied to the entire surface, and then partial silver plating 140 is applied only to a predetermined area on the entire surface.
By providing the zinc flash plating 130,
The adhesion between the base metal (copper alloy) and the oxide film is improved, and as a result, delamination with the sealing resin can be suppressed when a semiconductor device is manufactured. Although the mechanism that improves the adhesion between the base metal (copper alloy) and the oxide film has not been clarified, Kirkendall during the copper strike plating is caused by the diffusion of zinc during the copper strike plating. Generation of voids is suppressed,
It seems that the oxide film layer itself is less likely to be destroyed.

【００１３】次に、本実施例のリードフレームのめっき
工程を図３に基づいて簡単に説明しておく。尚、図３図
は、図１（ａ）に相当する部分である。先ず、エッチン
グにて外形加工された銅合金からなるリードフレーム１
１０Ａの全面をアルカリ水溶液で電解脱脂し、純水で洗
浄した後、酸性液で表面に形成されている酸化膜を除去
する酸活性化処理を行い、リードフレーム素材１２０で
ある銅合金の表面を活性化して、再度純水で洗浄した。
（図３（ａ）） 次いで、亜鉛フラッシュめっき１３０をリードフレーム
１１０Ａの全面に、厚さ０．０１μｍの厚さで形成し
た。（図３（ｂ）） 次いで、アルカリ中和処理、酸活性化処理を経て、純水
でリードフレーム表面を洗浄した後、亜鉛フラッシュめ
っきが施されたリードフレーム１１０Ａの全面に、液温
５０°Ｃで約２０秒間シアン化銅めっきを行い、０．１
μｍの厚さで銅ストライクめっき１４０を施した。（図
３（ｃ）） 次いで、純水で銅ストライクが施されたリードフレーム
１１０Ａ表面を洗浄した後、銀めっき処理時に不要な部
分に銀が析出しないように、全面に銀の置換防止処理を
行なった。置換防止処理は、室温でベンゾトリアゾール
系の溶液に浸し薄い被膜を形成したものである。次い
で、リードフレームの半導体素子を搭載する側のダイバ
ッド部、インナーリード先端領域のみを露出させるよう
にマスキング治具で覆い、リードフレームを陰極とし
て、めっき液をノズルより噴射により吹きかける方式の
部分めっきにより、厚さ３μｍの銀めっきをードフレー
ムの所定の領域に施した後、純水でリードフレームを洗
浄し、温風で乾燥して、実施例のリードフレームを得
た。（図３（ｄ））Next, the lead frame plating process of this embodiment will be briefly described with reference to FIG. Note that FIG. 3 is a portion corresponding to FIG. First, a lead frame 1 made of a copper alloy that has been externally processed by etching.
The entire surface of 10A is electrolytically degreased with an alkaline aqueous solution, washed with pure water, and then acid activated to remove the oxide film formed on the surface with an acid solution to remove the surface of the copper alloy that is the lead frame material 120. It was activated and washed again with pure water.
(FIG. 3A) Next, zinc flash plating 130 was formed on the entire surface of the lead frame 110A to a thickness of 0.01 μm. (FIG. 3B) Next, after the alkali neutralization treatment and the acid activation treatment, the lead frame surface is washed with pure water, and then the liquid temperature of 50 ° is applied to the entire surface of the lead frame 110A that is zinc flash plated. Copper cyanide plating for about 20 seconds at C
Copper strike plating 140 was applied to a thickness of μm. (FIG. 3 (c)) Next, after cleaning the surface of the lead frame 110A that has been subjected to a copper strike with pure water, a silver substitution prevention treatment is performed on the entire surface so that silver does not deposit on unnecessary portions during silver plating treatment. I did. The substitution prevention treatment is a thin film formed by immersing in a benzotriazole-based solution at room temperature. Then, by covering with a masking jig so as to expose only the die pad portion of the lead frame on which the semiconductor element is mounted and the inner lead tip region, the lead frame is used as a cathode and the plating solution is sprayed from a nozzle by partial plating. After a silver plating having a thickness of 3 μm was applied to a predetermined region of the lead frame, the lead frame was washed with pure water and dried with warm air to obtain a lead frame of the example. (Fig. 3 (d))

【００１４】次に、実施例２のリードフレームを挙げて
説明する。図２は本発明のリードフレームの実施例２を
示したもので、図２（ｂ）はその下面図を、図２（ａ）
はＡ３−Ａ４における断面の要部拡大図である。図２
中、１１０はリードフレーム、１１１はダイパッド、１
１２はインナーリード、１１３はアウターリード、１１
４はダムバー、１１５はフレーム、１２０はリードフレ
ーム素材（銅合金）、１３０は亜鉛フラッシュめっき、
１４０は銅ストライクめっき、１５０は部分銀めっきで
ある。本実施例のリードフレームが、実施例１と異なる
のは、亜鉛ラッシュめっき１３０を半導体素子を搭載す
る側でないダイパッド１１１の裏面にのみ施した点のみ
で、他は実施例１と同じである。実施例２のリードフレ
ームの製造方法についても、亜鉛ラッシュめっき１３０
をダイパッド部のみに施す処理を、前述の銀めっきと同
様所定形状のマスキング治具を用いて行った点が実施例
１のリードフレームの製造方法と異なり、これ以外の他
の工程は、実施例１のリードフレームの製造方法と同じ
である。Next, the lead frame of the second embodiment will be described. 2 shows a second embodiment of the lead frame of the present invention, and FIG. 2 (b) is a bottom view thereof, and FIG.
FIG. 4 is an enlarged view of a main part of a cross section taken along line A3-A4. FIG.
Inside, 110 is a lead frame, 111 is a die pad, 1
12 is an inner lead, 113 is an outer lead, 11
4 is a dam bar, 115 is a frame, 120 is a lead frame material (copper alloy), 130 is zinc flash plating,
Reference numeral 140 is copper strike plating, and 150 is partial silver plating. The lead frame of this example is different from that of Example 1 only in that zinc rush plating 130 is applied only to the back surface of the die pad 111, which is not the side on which a semiconductor element is mounted, and is the same as Example 1. Also in the lead frame manufacturing method of Example 2, zinc rush plating 130
Is different from the lead frame manufacturing method of the first embodiment in that the treatment for applying only to the die pad portion is performed by using a masking jig having a predetermined shape similar to the above-described silver plating. This is the same as the method for manufacturing the lead frame No. 1.

【００１５】次に、実施例１、実施例２と併せ、変形例
と比較例についての封止樹脂密着強度、酸化膜剥がれ状
態を評価した。変形例１、変形例２は、それぞれ実施例
１と同じ構成のもので亜鉛フラッシュめっきの厚さを
０．１μｍ、０．５μｍとしたものである。また、比較
例１としては、図４に示す従来例を、比較例２として
は、従来例において変色防止処理を施して無いものを用
いた。尚、上記実施例１、実施例２、変形例、比較例と
も、銅ストライクめっきの厚さは０．１μｍ、部分銀め
っきの厚さ３μｍとした。封止樹脂密着強度は、封止樹
脂密着強度評価用の専用フレーム（ベタ状板）に実施例
１、各変形例および比較例と同じ表面処理を施し、ワイ
ヤボンディング想定加熱条件、２８０°Ｃ、３分間の条
件で加熱した後、銅合金材面に一定面積の封止樹脂を成
形し、シエア法により密着強度を測定した。さらに、試
験後の封止樹脂への酸化膜の付着状態を観察し、母材か
らの酸化膜剥がれを評価した。シエア法により密着強度
の判定は、２．０Ｎ／ｍｍ2 以上を可（○）とし、２．
０Ｎ／ｍｍ2 未満を不可（×）とした。 Next, together with Examples 1 and 2, the sealing resin adhesion strength and the oxide film peeling state of the modified example and the comparative example were evaluated. The modification 1 and the modification 2 have the same configuration as that of the embodiment 1, respectively, and the thickness of the zinc flash plating is 0.1 μm and 0.5 μm. Further, as the comparative example 1, the conventional example shown in FIG. 4 was used, and as the comparative example 2, the one not subjected to the discoloration preventing process in the conventional example was used. The thickness of the copper strike plating was 0.1 μm and the thickness of the partial silver plating was 3 μm in each of the above-mentioned Examples 1, 2 and the modified examples and the comparative examples. The sealing resin adhesion strength was determined by subjecting a dedicated frame (solid plate) for evaluating the sealing resin adhesion strength to the same surface treatment as in Example 1, each modified example and comparative example, and assuming the wire bonding heating conditions at 280 ° C. After heating under the condition of 3 minutes, a sealing resin having a certain area was molded on the surface of the copper alloy material, and the adhesion strength was measured by the shear method. Further, the adhesion state of the oxide film to the sealing resin after the test was observed, and the peeling of the oxide film from the base material was evaluated. Adhesion strength of 2.0 N / mm 2 or more is acceptable (◯) for the determination of adhesion strength by the shear method.
A value less than 0 N / mm 2 was regarded as unacceptable (x).

【００１６】表１に示すように、亜鉛フラッシュめっき
を行った、実施例１、実施例２、変形例１、変形例２
は、封止樹脂密着強度、酸化膜剥がれの点において、図
４に示す方法により部分銀めっきが施された比較例１よ
りも優れていることが分かった。また、比較例２は、酸
化膜剥がれの評価において、実施例１、実施例２、変形
例１、変形例２に劣ることが分かった。これより、上記
本発明の実施例１、実施例２、変形例１、変形例２リー
ドフレームが、図４に示す工程にてめっきされた従来の
リードフレームに比べ、半導体装置に用いられた際に
は、銅酸化膜生成に起因するＩＣパッケージのデラミネ
ーションの発生を効果的に抑えることができると判断さ
れる。As shown in Table 1, Example 1, Example 2, Modification 1 and Modification 2 in which zinc flash plating was performed
Was superior to Comparative Example 1 in which the adhesive strength of the sealing resin and the peeling of the oxide film were partial silver-plated by the method shown in FIG. Further, it was found that Comparative Example 2 was inferior to Example 1, Example 2, Modification 1 and Modification 2 in the evaluation of oxide film peeling. Therefore, when the lead frame of Example 1, Example 2, Modification 1 and Modification 2 of the present invention is used in a semiconductor device as compared with the conventional lead frame plated in the process shown in FIG. Therefore, it is judged that the delamination of the IC package due to the formation of the copper oxide film can be effectively suppressed.

【００１７】[0017]

【発明の効果】本発明のリードフレームは、上記のよう
に、ＩＣの組み立て条件によらず、リードフレーム表面
の銅酸化膜生成に起因するデラミネーションの発生を防
止でき、且つ、ボンディング性を損なわない銅合金製の
リードフレームの提供を可能としている。As described above, the lead frame of the present invention can prevent the occurrence of delamination due to the formation of a copper oxide film on the surface of the lead frame, and impair the bondability, regardless of the IC assembly conditions. This makes it possible to provide lead frames made of non-copper alloy.

【図面の簡単な説明】[Brief description of the drawings]

【図１】実施例１のリードフレームの概略図FIG. 1 is a schematic diagram of a lead frame of Example 1.

【図２】実施例２のリードフレームの概略図FIG. 2 is a schematic diagram of a lead frame of Example 2.

【図３】実施例１のリードフレームのめっき工程図FIG. 3 is a plating process diagram of the lead frame of Example 1.

【図４】従来のリードフレームの部分銀めっきとめっき
工程を説明するための図FIG. 4 is a diagram for explaining a partial silver plating of a conventional lead frame and a plating process.

【図５】半導体装置とリードフレームを説明するための
図FIG. 5 is a diagram for explaining a semiconductor device and a lead frame.

【符号の説明】[Explanation of symbols]

１１０ リードフレーム １１１ ダイパッド １１２ インナーリード １１３ アウターリード １１４ ダムバー １１５ フレーム １１６ 吊りバー １２０ リードフレーム素材（銅合金） １３０ 亜鉛フラッシュめっき １４０ 銅フストライクめっき １５０ 銀めっき ５００ 樹脂封止型半導体装置 ５１０ 半導体素子 ５１１ 端子（バンプ） ５２０ リードフレーム ５２１ ダンパッド ５２２ インナリード ５２３ アウターリード ５２４ ダムバー ５２５ フレーム（枠）部 ５３０ ワイヤ ５４０ 樹脂 110 lead frame 111 die pad 112 inner lead 113 outer lead 114 dam bar 115 frame 116 hanging bar 120 lead frame material (copper alloy) 130 zinc flash plating 140 copper strike plating 150 silver plating 500 resin-sealed semiconductor device 510 semiconductor element 511 terminal (Bump) 520 Lead frame 521 Dan pad 522 Inner lead 523 Outer lead 524 Dam bar 525 Frame portion 530 Wire 540 Resin

Claims (3)

【特許請求の範囲】[Claims] 【請求項１】 銅合金材からなり、半導体素子が搭載さ
れるダイパッドを備え、ワイヤボンディング用のないし
ダイボンディング用の部分銀めっきが施された樹脂封止
型の半導体装置用リードフレームであって、少なくとも
半導体素子を搭載する側でないダイパッド裏面の銅部表
面に、亜鉛フラッシュめっき、銅ストライクめっきを順
次施してあることを特徴とするリードフレーム。1. A resin-encapsulated lead frame for a semiconductor device, which is made of a copper alloy material and includes a die pad on which a semiconductor element is mounted, and which is subjected to partial silver plating for wire bonding or die bonding. A lead frame, characterized in that zinc flash plating and copper strike plating are sequentially applied at least to the surface of the copper portion on the back surface of the die pad that is not the side on which the semiconductor element is mounted. 【請求項２】 請求項１において、銀めっきの下地めっ
きとしての亜鉛フラッシュめっき、銅ストライクめっき
が、リードフレーム表面全体に施されていることを特徴
とするリードフレーム。2. The lead frame according to claim 1, wherein zinc flash plating and copper strike plating as a base plating of silver plating are applied to the entire surface of the lead frame. 【請求項３】請求項１ないし２において、亜鉛フラッシ
ュめっきの厚さが、０．００１μｍ以上、０．５μｍ以
下であることを特徴とするリードフレーム。3. The lead frame according to claim 1, wherein the thickness of the zinc flash plating is 0.001 μm or more and 0.5 μm or less.
JP7293278A 1995-09-29 1995-10-17 Lead frame Withdrawn JPH09116065A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP7293278A JPH09116065A (en) 1995-10-17 1995-10-17 Lead frame
KR1019960043408A KR100266726B1 (en) 1995-09-29 1996-09-25 Lead frame, method for partially plating lead frame with noble meta and semiconductor device formed by using the lead frame
US08/721,265 US6034422A (en) 1995-09-29 1996-09-26 Lead frame, method for partial noble plating of said lead frame and semiconductor device having said lead frame
CA002186695A CA2186695C (en) 1995-09-29 1996-09-27 Lead frame, method for partial noble plating of said lead frame and semiconductor device having said lead frame
SG1996010754A SG60018A1 (en) 1995-09-29 1996-09-30 Lead frame method for partial noble plating of said lead frame and semiconductor device having said lead frame
DE19640256A DE19640256B4 (en) 1995-09-29 1996-09-30 Lead frame, method for precious metal plating of the lead frame and semiconductor device with lead frame
KR1020000009734A KR100271424B1 (en) 1995-09-29 2000-02-28 Method for partial noble plating of a lead frame and semiconductor device having said lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7293278A JPH09116065A (en) 1995-10-17 1995-10-17 Lead frame

Publications (1)

Publication Number Publication Date
JPH09116065A true JPH09116065A (en) 1997-05-02

Family

ID=17792766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7293278A Withdrawn JPH09116065A (en) 1995-09-29 1995-10-17 Lead frame

Country Status (1)

Country Link
JP (1) JPH09116065A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6593643B1 (en) * 1999-04-08 2003-07-15 Shinko Electric Industries Co., Ltd. Semiconductor device lead frame

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6593643B1 (en) * 1999-04-08 2003-07-15 Shinko Electric Industries Co., Ltd. Semiconductor device lead frame

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