JPH0865083A - Poliphase circuit type phase shift device - Google Patents

Poliphase circuit type phase shift device

Info

Publication number
JPH0865083A
JPH0865083A JP19525094A JP19525094A JPH0865083A JP H0865083 A JPH0865083 A JP H0865083A JP 19525094 A JP19525094 A JP 19525094A JP 19525094 A JP19525094 A JP 19525094A JP H0865083 A JPH0865083 A JP H0865083A
Authority
JP
Japan
Prior art keywords
column
phase shifter
resistor
resistance value
row
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19525094A
Other languages
Japanese (ja)
Other versions
JP2729150B2 (en
Inventor
Tetsuo Yoshida
哲雄 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Aerospace Systems Ltd
Original Assignee
NEC Aerospace Systems Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Aerospace Systems Ltd filed Critical NEC Aerospace Systems Ltd
Priority to JP19525094A priority Critical patent/JP2729150B2/en
Publication of JPH0865083A publication Critical patent/JPH0865083A/en
Application granted granted Critical
Publication of JP2729150B2 publication Critical patent/JP2729150B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Amplifiers (AREA)

Abstract

PURPOSE: To provide a poliphase circuit type phase shift device where attenuation and amplitude deviation is a little in output signals over a wide band. CONSTITUTION: Positive phase audio signals are inputted in input terminals 11 and 12, audio signals shifted by 90 deg. phase are inputted in input terminals 13 and 14, and audio signals with 90 deg. phase difference one another are outputted to output terminals q 1 to q 3 and q 4. In a resistor Rij for which a P-column cascade connection is performed between the input terminals 11 to 14 forming four lines and the output terminals q 1 to q 4, the resistance value is almost the same for every column. In also a capacitor Ci j connecting the space between adjacent lines, the capacitance value is almost equal for every column. This phase shift 1 is capable of reducing the attenuation amount and the amplitude deviation of an output audio signal (eq1, etc.,) by defining n=R(i+1)/Ri to be the ratio of the resistance value Ri of the resistor of a first column and the resistance value R(i +1) of the resistor of the (I+1)th column as the range of 1.3 to 4.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はポリフェーズ回路型位相
推移器に関し、特に互いに180度位相の異った2対・
4入力信号から互いに90度位相の異った4出力信号を
得ることを目的とするポリフェーズ回路型位相推移器に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polyphase circuit type phase shifter, and more particularly to two pairs of phase shifters each having a phase difference of 180 degrees.
The present invention relates to a polyphase circuit type phase shifter for obtaining four output signals having phases different from each other by 90 degrees from four input signals.

【0002】[0002]

【従来の技術】従来、音声周波数信号を単側帯波(SS
B)変調する方式の一つに、同相および90度位相が推
移した一対の音声周波数信号によって、同じく同相およ
び90度位相の推移した一対の搬送波信号をそれぞれ平
衡変調した後、これら平衡変調された二つの信号を合成
する方式がある。このSSB変調方式においては、音声
周波数信号および搬送波信号ともに、二つの信号間に正
確な90度位相差を保つ必要がある。しかし、音声周波
数信号は広い帯域を有するので、この帯域全体に亘って
二つの信号間に90度の位相差を保つのは困難な問題で
あった。この問題を解決するために、抵抗器とコンデン
サとからなる回路網であるポリフェーズ回路型位相推移
器が発表された(例えば、文献1:Electrica
l Communication,Vol.48,N
o.1&No.2,pp21〜pp25,1973,E
ngland;文献2:HAM Journal,N
o.45,pp108〜pp118,1986,日
本))。
2. Description of the Related Art Conventionally, a voice frequency signal is converted into a single sideband (SS
B) As one of the modulation methods, a pair of voice frequency signals whose in-phase and 90-degree phase are shifted is balanced-modulated on a pair of carrier signals which are also shifted in-phase and 90-degree phase, respectively, and then balanced-modulated. There is a method of combining two signals. In this SSB modulation method, it is necessary to maintain an accurate 90-degree phase difference between the two signals for both the voice frequency signal and the carrier signal. However, since the voice frequency signal has a wide band, it is a difficult problem to maintain the phase difference of 90 degrees between the two signals over the entire band. In order to solve this problem, a polyphase circuit type phase shifter, which is a circuit network including a resistor and a capacitor, has been announced (for example, Reference 1: Electrica).
l Communication, Vol. 48, N
o. 1 & No. 2, pp21 to pp25, 1973, E
ngland; Reference 2: HAM Journal, N
o. 45, pp108 to pp118, 1986, Japan)).

【0003】以下、従来技術について、図1の本発明に
係わるポリフェーズ回路型位相推移器の回路図を参照し
て説明する。
The prior art will be described below with reference to the circuit diagram of the polyphase circuit type phase shifter according to the present invention shown in FIG.

【0004】本発明に係わるポリフェーズ回路型の位相
推移器1は、4つの入力端子11,12,13および1
4に音声周波数信号e11,e12,e13およびe1
4をそれぞれ受け、4つの出力端子q1,q2,q3お
よびq4に音声周波数信号eq1,eq2,eq3およ
びeq4をそれぞれ出力する。入力端子11と出力端子
q1との間にはP(Pは1以上の整数)個の抵抗器R1
1,R21,R31,R41,…,Rp1を縦続に接続
し、入力端子12と出力端子q2との間にもP個の抵抗
器R12,R22,R32,R42,…,Rp2を縦続
に接続し、入力端子13と出力端子q3との間にもP個
の抵抗器R13,R23,R33,R43,…,Rp3
を縦続に接続し、入力端子14と出力端子q4との間に
もP個の抵抗器R14,R24,R34,R44,…,
Rp4を縦続に接続している。なお、符号qは(P+
1)の数を表すことになる。いま、入力端子11と出力
端子q1との間を第1行,抵抗器R11,R12,R1
3およびR14の並びを第1列というように定義する
と、この位相推移器1は4行・P列の回路網である。
A polyphase circuit type phase shifter 1 according to the present invention has four input terminals 11, 12, 13 and 1.
4 the audio frequency signals e11, e12, e13 and e1
4 and outputs voice frequency signals eq1, eq2, eq3 and eq4 to four output terminals q1, q2, q3 and q4, respectively. Between the input terminal 11 and the output terminal q1, there are P (P is an integer of 1 or more) resistors R1.
1, R21, R31, R41, ..., Rp1 are connected in cascade, and P resistors R12, R22, R32, R42, ..., Rp2 are also connected in cascade between the input terminal 12 and the output terminal q2. , P resistors R13, R23, R33, R43, ..., Rp3 between the input terminal 13 and the output terminal q3.
Are connected in series, and P resistors R14, R24, R34, R44, ... Are also connected between the input terminal 14 and the output terminal q4.
Rp4 is connected in cascade. The symbol q is (P +
It represents the number of 1). Now, between the input terminal 11 and the output terminal q1, the first row, resistors R11, R12, R1
When the arrangement of 3 and R14 is defined as the first column, this phase shifter 1 is a network of 4 rows and P columns.

【0005】位相推移器1は、上述の抵抗器に加えて、
隣接する行との間に循環的に接続されるコンデンサを各
列に備える。即ち、第1列では、コンデンサC11が第
1行の入力端子11と第4行の抵抗器R14・R24接
続点(以下、抵抗器R14の出力端というように表現す
る)との間に、コンデンサC12が第2行の入力端子1
2と第1行の抵抗器R11の出力端との間に、コンデン
サC13が第3行の入力端子13と第2行の抵抗器R1
2の出力端との間に、コンデンサC14が第4行の入力
端子14と第3行の抵抗器R13の出力端との間にそれ
ぞれ接続される。以下、第2列ないし第P列も同様に、
コンデンサC21ないしCp1は第1行と第4行との間
に、コンデンサC22ないしCp2は第2行と第1行と
の間に、コンデンサC23ないしCp3は第3行と第2
行との間に、コンデンサC24ないしCp4は第4行と
第3行との間にそれぞれ接続される。
The phase shifter 1 includes, in addition to the resistors described above,
Each column is provided with a capacitor that is cyclically connected to adjacent rows. That is, in the first column, the capacitor C11 is connected between the input terminal 11 in the first row and the connection point between the resistors R14 and R24 in the fourth row (hereinafter, referred to as the output end of the resistor R14). C12 is the input terminal 1 on the second row
2 and the output terminal of the resistor R11 of the first row, a capacitor C13 is provided between the input terminal 13 of the third row and the resistor R1 of the second row.
The capacitor C14 is connected between the input terminal 14 of the fourth row and the output terminal of the resistor R13 of the third row. Hereinafter, the same applies to the second to Pth columns.
The capacitors C21 to Cp1 are located between the first and fourth rows, the capacitors C22 to Cp2 are located between the second row and the first row, and the capacitors C23 to Cp3 are located between the third row and the second row.
Between the rows, capacitors C24 to Cp4 are connected between the fourth and third rows, respectively.

【0006】なお、列数Pが1の場合は、当然P+1=
2列以降の抵抗器およびコンデンサは接続されず、第1
列の抵抗器およびコンデンサは出力端子q1,q2,q
3およびq4に直結される。この場合、出力端子符号の
qはP+1=2と読み替えることになる。以下、Pが2
以上の場合も同様である。
When the number of columns P is 1, naturally P + 1 =
The resistors and capacitors in the second and subsequent rows are not connected, and the first
The resistors and capacitors in the columns are output terminals q1, q2, q
Directly connected to 3 and q4. In this case, q of the output terminal code is read as P + 1 = 2. Below, P is 2
The same applies to the above cases.

【0007】ここで、上記抵抗器の抵抗値および上記コ
ンデンサの容量値は、各列ごとに同じ値に設定する。即
ち、抵抗器R11,R12,R13およびR14は互い
に同じ抵抗値R1を、抵抗器R21,R22,R23お
よびR24は互いに同じ抵抗値R2を、抵抗器R31,
R32,R33およびR34は互いに同じ抵抗値R3
を、抵抗器R41,R42,R43およびR44は互い
に同じ抵抗値R4を、抵抗器Rp1,Rp2,Rp3お
よびRp4は互いに同じ抵抗値Rpを有する。同様に、
コンデンサC11,C12,C13およびC14は互い
に同じ容量値C1を、コンデンサC21,C22,C2
3およびC24は互いに同じ容量値C2を、コンデンサ
C31,C32,C33およびC34は互いに同じ容量
値C3を、コンデンサC41,C42,C43およびC
44は互いに同じ容量値C4を、コンデンサCp1,C
p2,Cp3およびCp4は互いに同じ容量値Cpを有
する。
Here, the resistance value of the resistor and the capacitance value of the capacitor are set to the same value for each column. That is, the resistors R11, R12, R13 and R14 have the same resistance value R1, the resistors R21, R22, R23 and R24 have the same resistance value R2, and the resistor R31,
R32, R33 and R34 have the same resistance value R3
The resistors R41, R42, R43 and R44 have the same resistance value R4, and the resistors Rp1, Rp2, Rp3 and Rp4 have the same resistance value Rp. Similarly,
The capacitors C11, C12, C13 and C14 have the same capacitance value C1 as each other, and the capacitors C21, C22 and C2 have the same capacitance value C1.
3 and C24 have the same capacitance value C2, capacitors C31, C32, C33 and C34 have the same capacitance value C3, and capacitors C41, C42, C43 and C34.
Reference numeral 44 designates capacitors Cp1, C having the same capacitance value C4 as each other.
p2, Cp3 and Cp4 have the same capacitance value Cp.

【0008】図1の回路図において、信号発生器2は、
位相推移器1の入力端子11および12に電圧Eで且つ
同位相の音声周波数信号e11およびe12を信号発生
回路3および4からそれぞれ供給し、入力端子13およ
び14に電圧−Eで且つ同位相の音声周波数信号e13
およびe14を信号発生回路5および6からそれぞれ供
給する。なお、信号発生回路3と5と,および信号発生
回路4と6とは、一つの音声周波数信号から180度位
相の異なる二つの信号を広帯域に亘って取出すことので
きる一つのプッシュプル増幅器でそれぞれ同時に構成で
きる。
In the circuit diagram of FIG. 1, the signal generator 2 is
The phase shifter 1 supplies the input terminals 11 and 12 of the audio frequency signals e11 and e12 having the voltage E of the same phase from the signal generating circuits 3 and 4, respectively, and supplies the input terminals 13 and 14 of the voltage -E and of the same phase. Voice frequency signal e13
And e14 are supplied from the signal generating circuits 5 and 6, respectively. Each of the signal generating circuits 3 and 5 and the signal generating circuits 4 and 6 is a push-pull amplifier capable of extracting two signals having a phase difference of 180 degrees from one voice frequency signal over a wide band. Can be configured at the same time.

【0009】位相推移器1において、第I(Iは1ない
しPの整数)列のポール周波数fiを(1)式で定義す
る。
In the phase shifter 1, the pole frequency fi of the I-th column (I is an integer of 1 to P) is defined by the equation (1).

【0010】 fi=1/(2πCi・Ri) …(1) ポール周波数fiにおいては、例え、この位相推移器1
の列数Pが1であっても、出力端子q1,q2,q3お
よびq4に生じる音声周波数信号eq1,eq2,eq
3およびeq4は、互いに90度異なる位相関係とな
る。しかし、列数Pが少ないと、上記出力端子間の位相
差を正確に90度を保つ帯域が狭いので、一般には、9
0度位相差が得られる帯域を確保できるように列数Pを
増加する。また、ポール周波数fiを各列Iごとに変え
ることにより、少い列数Pで広帯域性を確保することも
ある。
Fi = 1 / (2πCi · Ri) (1) At the pole frequency fi, for example, this phase shifter 1
Even if the number of columns P of 1 is 1, the audio frequency signals eq1, eq2, eq generated at the output terminals q1, q2, q3 and q4
3 and eq4 have a phase relationship different from each other by 90 degrees. However, when the number of columns P is small, the band for keeping the phase difference between the output terminals at 90 degrees is narrow, so that in general, 9
The number of columns P is increased so as to secure a band in which a 0 degree phase difference can be obtained. Also, by changing the pole frequency fi for each column I, a wide number of columns may be secured with a small number P of columns.

【0011】文献2では、図1の構成による4行・10
列位相推移器のシミュレーション結果を紹介している。
この位相推移器は、第1列のポール周波数f1を234
Hzとし、第2列以降のポール周波数fiを約1.21
の等比級数で増加させ、第10列のポール周波数f10
を2.842KHzに設定している(第1表)。また、
各列の抵抗値Riは、第1列の抵抗値R1を68kΩと
し、第2列以降の抵抗値Riを約1/1.21の等比級
数で減少させ、第10列の抵抗値R10を5.6kΩに
設定している。この場合、全てのコンデンサの容量値は
ほぼ同一になる。文献2の位相推移器は、この条件にお
いて、周波数140Hz程度から5KHz程度まで2度
以下の出力信号間位相差を得ることができる(第11
図)。しかし、この位相推移器の出力電圧は、その中心
周波数付近である800Hz付近に約30dBの減衰ピ
ークを持つとともに上記の周波数範囲において5dB程
度の振幅偏差を持っている(第10図)。なお、この減
衰ピークおよび振幅偏差は列数とともに大きくなること
が知られている。
In Reference 2, 4 lines × 10 with the configuration of FIG.
The simulation results of the column phase shifter are introduced.
This phase shifter sets the pole frequency f1 of the first column to 234
Hz and the pole frequency fi of the second and subsequent columns is about 1.21.
The pole frequency f10 of the 10th column.
Is set to 2.842 KHz (Table 1). Also,
With respect to the resistance value Ri of each column, the resistance value R1 of the first column is set to 68 kΩ, the resistance value Ri of the second and subsequent columns is reduced by a geometric progression of about 1 / 1.21, and the resistance value R10 of the tenth column is It is set to 5.6 kΩ. In this case, the capacitance values of all capacitors are almost the same. Under this condition, the phase shifter of Document 2 can obtain a phase difference between output signals of 2 degrees or less from a frequency of about 140 Hz to about 5 KHz (11th phase).
Figure). However, the output voltage of this phase shifter has an attenuation peak of about 30 dB near 800 Hz, which is near its center frequency, and an amplitude deviation of about 5 dB in the above frequency range (Fig. 10). It is known that the attenuation peak and the amplitude deviation increase with the number of columns.

【0012】[0012]

【発明が解決しようとする課題】上述した従来技術によ
るポリフェーズ回路型位相推移器は、列数を増大させる
ことにより、出力信号間の位相差を広帯域に亘って90
度近傍に保つことができるが、出力信号に大きな減衰量
および振幅偏差を生じ、これら減衰量および振幅偏差は
列数とともに増大するという欠点があった。
The polyphase circuit type phase shifter according to the prior art described above increases the number of columns so that the phase difference between the output signals is 90 over a wide band.
However, there is a drawback in that a large amount of attenuation and amplitude deviation occur in the output signal, and these attenuation and amplitude deviation increase with the number of rows.

【0013】上述のSSB変調方式においては、不要側
帯波抑圧比を40dB以上にするには、音声周波数信号
の信号間位相差を1.0度以下と規定すると、振幅偏差
を0.17dB以下にしなければならない(文献2,p
p110)。この振幅偏差は等化増幅することによって
補償することは原理的には可能であるが、もとの信号の
振幅偏差が大きくなるほど、規格を保つための偏差補償
が困難になってくるという問題が残る。また、等化増幅
器を用いることにより構成が複雑になるばかりでなく製
造費用が増大するという欠点がある。
In the above-mentioned SSB modulation method, in order to set the unwanted sideband suppression ratio to 40 dB or more, if the signal phase difference between voice frequency signals is specified to be 1.0 degree or less, the amplitude deviation is set to 0.17 dB or less. Must be (Reference 2, p.
p110). Although it is possible in principle to compensate for this amplitude deviation by equalizing and amplifying it, the larger the amplitude deviation of the original signal, the more difficult it becomes to compensate the deviation for maintaining the standard. Remain. Further, the use of the equalizing amplifier not only complicates the configuration but also increases the manufacturing cost.

【0014】[0014]

【課題を解決するための手段】本発明のポリフェーズ回
路型位相推移器は、4行をなす第1,第2,第3および
第4の入力端子と、前記第1,第2,第3および第4の
入力端子にそれぞれ行対応する第1,第2,第3および
第4の出力端子と、前記各行の入力端子と出力端子との
間にそれぞれ縦続接続されてP(Pは2以上の整数)列
をなすとともに各列ごとには抵抗値をほぼ等しくした抵
抗器と、第J(Jは1ないし4の整数)行・第I(Iは
1ないしPの整数)列の前記抵抗器の入力端と第(J−
1,但しJ−1=0は4と読み替える)行・第I列の前
記抵抗器の出力端とを循環的に接続するとともに各列ご
とには容量値をほぼ等しくしたコンデンサとを備えるポ
リフェーズ回路型位相推移器において、第I列の前記抵
抗器の抵抗値Riと第(I+1)列の前記抵抗器の抵抗
値R(i+1)との比であるn=R(i+1)/Riを
1.3から4の範囲とする。
A polyphase circuit type phase shifter according to the present invention comprises four rows of first, second, third and fourth input terminals and the first, second, third. And the first, second, third and fourth output terminals respectively corresponding to the first and fourth input terminals in a row, and P (P is 2 or more) connected in cascade between the input terminal and the output terminal of each row. Resistors having a substantially equal resistance value in each column, and the resistors in the Jth row (J is an integer of 1 to 4) and the Ith row (I is an integer of 1 to P). Input end of the container and the (J-
1, provided that J-1 = 0 is read as 4) Polyphase provided with a capacitor connected to the output terminal of the resistor in the row / Ith column in a cyclic manner and having a substantially equal capacitance value in each column In the circuit type phase shifter, n = R (i + 1) / Ri, which is the ratio of the resistance value Ri of the resistor in the I-th column to the resistance value R (i + 1) of the resistor in the (I + 1) -th column is set to 1 The range is from 3 to 4.

【0015】前記ポリフェーズ回路型位相推移器の一つ
は、第I列の前記抵抗器の抵抗値Riと第I列の前記コ
ンデンサの容量値Ciの積と第(I+1)列の前記抵抗
器の抵抗値R(I+1)と第(I+1)列の前記コンデ
ンサの容量値C(i+1)と積との比Ri・Ci/{R
(i+1)・C(i+1)}をmとした場合、前記nを
{(m+1)+(m2 +6m+1)1/2 }/(2m)の
0.8倍から2倍までの範囲とする構成をとることがで
きる。
One of the polyphase circuit type phase shifters is a product of a resistance value Ri of the resistor in the I-th column and a capacitance value Ci of the capacitor in the I-th column and the resistor in the (I + 1) -th column. Ratio of the resistance value R (I + 1) of the capacitor and the capacitance value C (i + 1) of the capacitor in the (I + 1) th column to the product Ri · Ci / {R
When (i + 1) · C (i + 1)} is m, n is in the range of 0.8 to 2 times {(m + 1) + (m 2 + 6m + 1) 1/2 } / (2m) Can be taken.

【0016】前記ポリフェーズ回路型位相推移器の別の
一つは、前記nおよび前記mを各列ともほぼ等しくした
構成をとることができる。
Another one of the polyphase circuit type phase shifters may have a configuration in which the n and the m are substantially equal in each column.

【0017】[0017]

【実施例】次に本発明について図面を参照して説明す
る。
The present invention will be described below with reference to the drawings.

【0018】図1は本発明の一実施例の回路図であり、
図2は図1の実施例においてP=2列とした場合の位相
推移器1Aの回路図である。また、図3は位相推移器1
Aの特性を示す図であり、(a)は出力振幅特性、
(b)は隣接する出力端子間の位相差特性である。
FIG. 1 is a circuit diagram of an embodiment of the present invention.
FIG. 2 is a circuit diagram of the phase shifter 1A when P = 2 columns in the embodiment of FIG. Further, FIG. 3 shows the phase shifter 1
It is a figure which shows the characteristic of A, (a) is an output amplitude characteristic,
(B) is a phase difference characteristic between adjacent output terminals.

【0019】本発明においても、ポリフェーズ回路型の
位相推移器1の回路図自体は、図1を参照して説明した
従来例と変るところはない。しかしながら、本発明の特
徴は、位相推移器1の出力端子q1ないしq4における
音声周波数信号eq1ないしeq4の帯域内振幅偏差お
よび減衰量を減少させるために発明努力し、第2列以降
に配置する抵抗器の抵抗値Riの適正値を見い出したと
ころにある。まず、P=2列の位相推移器1Aにおける
適正な抵抗値Riを計算によって求める。
Also in the present invention, the circuit diagram itself of the polyphase circuit type phase shifter 1 is not different from the conventional example described with reference to FIG. However, the feature of the present invention is that the efforts are made to reduce the in-band amplitude deviation and the attenuation amount of the audio frequency signals eq1 to eq4 at the output terminals q1 to q4 of the phase shifter 1, and the resistors arranged in the second and subsequent columns are used. The optimum value of the resistance value Ri of the container is found. First, an appropriate resistance value Ri in the phase shifter 1A of P = 2 columns is calculated.

【0020】図2を参照すると、この位相推移器1A
は、P=2列であり、図1の位相推移器1の第3列以降
を省いたものである。従って、出力端子q1,q2,q
3およびq4はそれぞれ出力端子31,32,33およ
び34と具体的に示し、音声周波数信号eq1,eq
2,eq3およびeq4も音声周波数信号e31,e3
2,e33およびe34と具体的に示している。
Referring to FIG. 2, this phase shifter 1A
Shows P = 2 columns and omits the third and subsequent columns of the phase shifter 1 of FIG. Therefore, the output terminals q1, q2, q
3 and q4 are specifically shown as output terminals 31, 32, 33, and 34, respectively, and audio frequency signals eq1, eq
2, eq3 and eq4 are also voice frequency signals e31, e3
2, e33 and e34.

【0021】この位相推移器1Aにキルヒホッフの法則
を適用して(2)式を得る。
Kirchhoff's law is applied to the phase shifter 1A to obtain the equation (2).

【0022】 R1(i11−i24)−jXC1(i11−i21)=0 R1(i12−i21)−jXC1(i12−i22)=2E R1(i13−i22)−jXC1(i13−i23)=0 R1(i14−i23)−jXC1(i14−i24)=−2E R1(i21−i12)−jXC1(i21−i11) +(R2−jXC2)・i21=0 R1(i22−i13)−jXC1(i22−i12) +(R2−jXC2)・i22=0 R1(i23−i14)−jXC1(i23−i13) +(R2−jXC2)・i23=0 R1(i24−i11)−jXC1(i24−i14) +(R2−jXC2)・i24=0 XC1=1/(ω・C1),XC2=1/(ω・C2) …(2) なお、i11は第1行および第2行において信号発生回
路3,抵抗器R11,コンデンサC12および信号発生
回路4を循環するメッシュ電流であり、i21は同じ行
において抵抗器21,コンデンサC22,抵抗器R12
およびコンデンサC12を循環するメッシュ電流であ
る。以下、各行間を循環するメッシュ電流i12ないし
i14およびi22ないしi24を図示の如く定義して
いる。
R1 (i11-i24) -jXC1 (i11-i21) = 0 R1 (i12-i21) -jXC1 (i12-i22) = 2E R1 (i13-i22) -jXC1 (i13-i23) = 0 R1 ( i14-i23) -jXC1 (i14-i24) =-2E R1 (i21-i12) -jXC1 (i21-i11) + (R2-jXC2) .i21 = 0 R1 (i22-i13) -jXC1 (i22-i12) + (R2-jXC2) · i22 = 0 R1 (i23-i14) -jXC1 (i23-i13) + (R2-jXC2) · i23 = 0 R1 (i24-i11) -jXC1 (i24-i14) + (R2- jXC2) · i24 = 0 XC1 = 1 / (ω · C1), XC2 = 1 / (ω · C2) (2) Note that i11 is in the first and second rows. Is a mesh current circulating in the signal generating circuit 3, the resistor R11, the capacitor C12, and the signal generating circuit 4, and i21 is the resistor 21, the capacitor C22, and the resistor R12 in the same row.
And the mesh current circulating in the capacitor C12. Hereinafter, the mesh currents i12 to i14 and i22 to i24 circulating between the rows are defined as shown.

【0023】ここで、ω1=1/(C1・R1),つま
り第1列のポール周波数f1=1/(2π・C1・R
1),ω2=1/(C2・R2),つまり第2列のポー
ル周波数f2=1/(2π・C2・R2)、n=R2/
R1として(2)式を解くと、(3)式が得られる。
Here, ω1 = 1 / (C1 · R1), that is, the pole frequency f1 = 1 / (2π · C1 · R) of the first column.
1), ω2 = 1 / (C2 · R2), that is, the pole frequency f2 = 1 / (2π · C2 · R2) of the second column, n = R2 /
When equation (2) is solved for R1, equation (3) is obtained.

【0024】 e31/E={A(ω)+jB(ω)}/{C(ω)+jD(ω)} e32/E={A(ω)−jB(ω)}/{C(ω)+jD(ω)} e33/E=−{A(ω)+jB(ω)}/{C(ω)+jD(ω)} e34/E=−{A(ω)−jB(ω)}/{C(ω)+jD(ω)} A(ω)=1+ω2 /(ω1・ω2) B(ω)=ω/ω1+ω/ω2 C(ω)=1−ω2 /(ω1・ω2) D(ω)=2ω/{(n・ω2)+ω/ω1+ω/ω2} …(3) 図3(a)はnをパラメータとした出力端子31等にお
ける音声周波数信号e31の振幅特性,例えばe31/
Eの絶対値(入出力電圧比)をdB表示で示し、図3
(b)は隣接する出力端子間(例えば端子31と32と
の間)の位相差,例えば(e31/E)と(e32/
E)との位相差を示している。なお、第1列と第2列の
ポール周波数f1とf2とは同一としている。
E31 / E = {A (ω) + jB (ω)} / {C (ω) + jD (ω)} e32 / E = {A (ω) −jB (ω)} / {C (ω) + jD (Ω)} e33 / E = − {A (ω) + jB (ω)} / {C (ω) + jD (ω)} e34 / E = − {A (ω) −jB (ω)} / {C ( ω) + jD (ω)} A (ω) = 1 + ω 2 / (ω1 · ω2) B (ω) = ω / ω1 + ω / ω2 C (ω) = 1−ω 2 / (ω1 · ω2) D (ω) = 2ω / {(n · ω2) + ω / ω1 + ω / ω2} (3) FIG. 3A shows an amplitude characteristic of the audio frequency signal e31 at the output terminal 31 or the like with n as a parameter, for example, e31 /
The absolute value of E (input / output voltage ratio) is shown in dB and is shown in FIG.
(B) is a phase difference between adjacent output terminals (for example, between terminals 31 and 32), for example, (e31 / E) and (e32 /
It shows the phase difference with E). The pole frequencies f1 and f2 in the first and second columns are the same.

【0025】この位相推移器1Aは、わずか2列の構成
であるため、90度の出力端子間位相差が得られる帯域
はポール周波数fiの近傍しかない。一方、振幅特性
は、n=2.41とすると、信号e31(e32,e3
3,e34も同じ)は全周波数に亘って平坦でしかも減
衰のない振幅特性を生じる。この振幅特性はnを1以下
で構成していた従来の位相推移器がポール周波数f1付
近で3dBの減衰量とこれと同程度の振幅偏差を有する
のに比べて明らかに優れている。また、n=100程度
に大きくすると、逆にポール周波数f1付近で3dBの
振幅増加を示し、振幅偏差もn=1の場合と同程度にな
る。
Since the phase shifter 1A has a structure of only two columns, the band in which the phase difference between the output terminals of 90 degrees can be obtained is only near the pole frequency fi. On the other hand, if the amplitude characteristic is n = 2.41, the signal e31 (e32, e3)
3 and e34 are also the same), an amplitude characteristic that is flat over all frequencies and has no attenuation is generated. This amplitude characteristic is clearly superior to that of the conventional phase shifter in which n is set to 1 or less, which has an attenuation amount of 3 dB near the pole frequency f1 and an amplitude deviation of the same degree. On the other hand, when the value is increased to about n = 100, on the contrary, the amplitude increases by 3 dB near the pole frequency f1, and the amplitude deviation becomes about the same as when n = 1.

【0026】図2の如き列数Pが2程度の位相推移器
は、音声周波数信号のように広い帯域の信号に対しては
出力信号間に正確な90度位相差を生じる帯域が狭すぎ
るという問題がある。そこで、図1の位相推移器1は、
例えば信号eq1とeq2間に90度位相差を生じる帯
域を増加させるために、列数Pを増やし、また各列のポ
ール周波数fiを変化させる必要がある。
The phase shifter with the number of columns P of about 2 as shown in FIG. 2 is said to have a too narrow band for producing an accurate 90-degree phase difference between output signals for a wide band signal such as a voice frequency signal. There's a problem. Therefore, the phase shifter 1 of FIG.
For example, it is necessary to increase the number of columns P and change the pole frequency fi of each column in order to increase the band in which a 90-degree phase difference occurs between the signals eq1 and eq2.

【0027】いま、図1の位相推移器1において、第I
列の抵抗器の抵抗値Riと第I列のコンデンサの容量値
Ciの積にと第(I+1)列の抵抗器の抵抗値R(I+
1)と第(I+1)列のコンデンサの容量値C(i+
1)の積との比Ri・Ci/{R(i+1)・C(i+
1)}をmとする。このmは第I列のポール周波数と第
(I+1)列のポール周波数との比f(i+1)/f
i)でもある。このmを変える場合には、各列の抵抗器
を(4)式に示す抵抗比nで構成すると、この位相推移
器1は全信号帯域に亘って振幅偏差のない音声周波数信
号eq1等を生じる。
Now, in the phase shifter 1 of FIG.
The product of the resistance value Ri of the resistor of the column and the capacitance value Ci of the capacitor of the I-th column and the resistance value R (I + of the resistor of the (I + 1) -th column
1) and the capacitance value C (i +) of the capacitors in the (I + 1) th column
1) ratio of product Ri * Ci / {R (i + 1) * C (i +
1)} is m. This m is the ratio f (i + 1) / f of the pole frequency of the I-th column and the pole frequency of the (I + 1) -th column.
It is also i). In the case of changing this m, if the resistors in each column are constituted by the resistance ratio n shown in the equation (4), this phase shifter 1 produces the audio frequency signal eq1 and the like having no amplitude deviation over the entire signal band. .

【0028】 n={(m+1)+(m2 +6m+1)1/2 }/(2m) …(4) 即ち、抵抗比n,ポール周波数比m=ω2/ω1,正規
化周波数x=ω/ω1を用いて(3)式を解くと、音声
周波数信号e31,e32,e33およびe34の振幅
の絶対値は全て等しいので、(5)式が得られる。
N = {(m + 1) + (m 2 + 6m + 1) 1/2 } / (2m) (4) That is, the resistance ratio n, the pole frequency ratio m = ω2 / ω1, the normalized frequency x = ω / ω1 When the equation (3) is solved by using, the absolute values of the amplitudes of the voice frequency signals e31, e32, e33, and e34 are all equal, and thus the equation (5) is obtained.

【0029】 (1+x2 /m)2 +(1+1/m)2 ×x2 =(1−x2 /m)2 +{1+1/m+2/(m・n)}2 ×x2 …(5) (5)式を解くと、正規化周波数xに関係のない上記
(4)式が得られる。この(5)式,従って(4)式は
位相推移器1の列数をP=2列より増しても成立する。
(1 + x 2 / m) 2 + (1 + 1 / m) 2 × x 2 = (1-x 2 / m) 2 + {1 + 1 / m + 2 / (m · n)} 2 × x 2 (5) By solving the equation (5), the above equation (4) irrelevant to the normalized frequency x is obtained. The equation (5), and therefore the equation (4), holds even if the number of columns of the phase shifter 1 is increased from P = 2 columns.

【0030】図4は図1の位相推移器1におけるポール
周波数比mに対する適正抵抗比n0を(4)式に従って
示す図である。
FIG. 4 is a diagram showing the proper resistance ratio n0 with respect to the pole frequency ratio m in the phase shifter 1 of FIG. 1 according to the equation (4).

【0031】ポール周波数比mが1の場合は、図2の位
相推移器1Aの場合と同じであり、抵抗比n=2.41
において出力端子q1等における信号eq1等の減衰お
よび振幅偏差をなくすることができる。mが増大するに
つれて,つまりf(i+1)/fiが大きくなるにつれ
て適正なn値は減少するが、n値は1より常に大きい。
When the pole frequency ratio m is 1, it is the same as the case of the phase shifter 1A of FIG. 2, and the resistance ratio n = 2.41.
At, the attenuation and amplitude deviation of the signal eq1 and the like at the output terminal q1 and the like can be eliminated. The proper n value decreases as m increases, that is, as f (i + 1) / fi increases, but the n value is always greater than 1.

【0032】図5は列数P=4の位相推移器1の実験デ
ータを示す図であり、(a)は出力振幅特性、(b)は
出力位相差特性である。
FIG. 5 is a diagram showing experimental data of the phase shifter 1 having the number of columns P = 4, where (a) is the output amplitude characteristic and (b) is the output phase difference characteristic.

【0033】位相推移器1は、上述したSSB変調方式
の音声周波数信号用として用いるには、少くとも300
Hzから3kHzまでの音声周波数帯域で90度の位相
差を隣接する出力端子間に確保する必要がある。そこ
で、位相推移器1の実験回路は、列数をP=4,使用帯
域を最小周波数fmin.=300Hz,最高周波数f
max.=3kHz(fmax./fmin.=10)
として諸パラメータを選定した。ここで、ポール周波数
比mを等比級数的に設定すると、少ない列数Pでも出力
信号間位相差,例えば信号eq1とeq2との間の位相
差を少なくできることが従来から知られている。上述の
とおりに設定すると、ポール周波数比m=2.15にな
り、各列のポール周波数fiは、f1=300Hz,f
2=643.3Hz,f3=1.392kHz,f4=
3.0kHzとなる。また、(4)式に従うと、ポール
周波数比mを各列とも同じにする場合には、抵抗比nも
各列とも同一にすべきであり、適正抵抗比n0はn0=
1.5となる。
The phase shifter 1 is at least 300 in order to be used for the voice frequency signal of the above-mentioned SSB modulation system.
It is necessary to secure a phase difference of 90 degrees between adjacent output terminals in the audio frequency band from Hz to 3 kHz. Therefore, the experimental circuit of the phase shifter 1 has the number of columns P = 4 and the used band of the minimum frequency fmin. = 300Hz, maximum frequency f
max. = 3 kHz (fmax./fmin.=10)
Various parameters were selected as Here, it is conventionally known that setting the pole frequency ratio m in a geometric progression can reduce the phase difference between output signals, for example, the phase difference between the signals eq1 and eq2, even with a small number of columns P. When set as described above, the pole frequency ratio m = 2.15, and the pole frequency fi of each column is f1 = 300 Hz, f
2 = 643.3 Hz, f3 = 1.392 kHz, f4 =
It becomes 3.0 kHz. Further, according to the equation (4), when the pole frequency ratio m is the same in each column, the resistance ratio n should be the same in each column, and the proper resistance ratio n0 is n0 =
It becomes 1.5.

【0034】図5の実験データは、実験例Aが抵抗比n
をポール周波数比m=2.15における適正値に近いn
≒1.7(n/n0=1.13),実験例Bがやや高い
値であるn≒2.2(n/n0=1.47),実験例C
が従来例と変らない値であるn=1(n/n0=0.6
7)の3種類を示している。なお、実験に用いた位相推
移器1は、市販でしかも安く手に入る部品で構成してい
る。このため、ポール周波数比mおよび抵抗値nは、上
記設定値とは必らずしも一致せず多少のずれがある。表
1に実験した位相推移器1の諸パラメータを示す。
In the experimental data of FIG. 5, the resistance ratio n in the experimental example A is n.
Is close to an appropriate value when the pole frequency ratio m = 2.15
≈1.7 (n / n0 = 1.13), Experimental Example B has a slightly higher value n≈2.2 (n / n0 = 1.47), Experimental Example C
Is the same value as the conventional example, n = 1 (n / n0 = 0.6
3) of 7) is shown. The phase shifter 1 used in the experiment is composed of commercially available and inexpensive parts. For this reason, the pole frequency ratio m and the resistance value n do not always match the above-mentioned set values, and there is some deviation. Table 1 shows various parameters of the experimental phase shifter 1.

【0035】[0035]

【表1】 [Table 1]

【0036】図5に示した実験例Aは、周波数300H
zないし3kHzの帯域において、90度+0.19度
−0.12度以内の出力端子間の信号位相差を保ってい
る。また、n値の異なる実験例BおよびCも実験例Aに
ほぼ等しい位相差特性を持っている。
The experimental example A shown in FIG. 5 has a frequency of 300H.
In the band of z to 3 kHz, the signal phase difference between the output terminals is maintained within 90 ° + 0.19 ° −0.12 °. Further, Experimental Examples B and C having different n values also have a phase difference characteristic substantially equal to that of Experimental Example A.

【0037】一方、実験例Aの出力振幅特性は、上記帯
域内において0.3dBの振幅偏差でありしかも出力信
号に減衰がない。
On the other hand, the output amplitude characteristic of Experimental Example A has an amplitude deviation of 0.3 dB within the above band, and there is no attenuation in the output signal.

【0038】また、実験例Bは、抵抗比nを適正値抵抗
比n0=1.5の1.5倍程度であるn≒2.2に設定
したため、図3(a)から予想されるごとく帯域の中央
付近で入出力電圧比が増大し、最大+1.2dBの振幅
偏差を有する。しかし、この実験例Bは、上記帯域内で
最大6dBの出力電圧の減衰および約2dBの振幅偏差
を有する抵抗比n=1の実験例Cと比べると、はるかに
よい出力振幅特性を有する。
Further, in Experimental Example B, the resistance ratio n was set to n≈2.2 which is about 1.5 times the appropriate value resistance ratio n0 = 1.5, and as expected from FIG. 3 (a). The input / output voltage ratio increases near the center of the band, and the maximum amplitude deviation is +1.2 dB. However, this experimental example B has a much better output amplitude characteristic than the experimental example C in which the resistance ratio n = 1 has the maximum output voltage attenuation of 6 dB and the amplitude deviation of about 2 dB in the band.

【0039】位相推移器1の好ましい抵抗比nを考察す
ると、図3,図4および図5から、1.3〈n〈4程度
がよいことが分かる。また、好ましい抵抗比nは、式
(4)および図6から分かるとおり、ポール周波数比m
によって変わるので、上記条件のもとで、抵抗比nをポ
ール周波数比mの関数として{(m+1)+(m2 +6
m+1)1/2 }/(2m)の0.8倍から2倍までの範
囲とするのがさらに好ましい。
Considering the preferable resistance ratio n of the phase shifter 1, it can be seen from FIG. 3, FIG. 4 and FIG. 5 that 1.3 <n <4 is preferable. In addition, the preferable resistance ratio n is, as can be seen from the equation (4) and FIG. 6, the pole frequency ratio m.
As a function of the pole frequency ratio m, the resistance ratio n is {(m + 1) + (m 2 +6) under the above conditions.
It is more preferable that the range is 0.8 times to 2 times m + 1) 1/2 } / (2m).

【0040】[0040]

【発明の効果】以上説明したように本発明は、第I列の
抵抗器の抵抗値Riと第(I+1)列の抵抗器の抵抗値
R(i+1)との比であるn=R(i+1)/Riを
1.3から4の範囲とするので、列数を増加させること
により出力信号間の位相差を広帯域に亘って90度近傍
に保つことができるとともに、上記列数を増加させても
出力信号の減衰量および振幅偏差を少なくすることがで
きるという効果がある。
As described above, according to the present invention, the ratio of the resistance value Ri of the resistor in the I-th column to the resistance value R (i + 1) of the resistor in the (I + 1) -th column is n = R (i + 1). ) / Ri is in the range of 1.3 to 4, the phase difference between the output signals can be kept close to 90 degrees over a wide band by increasing the number of columns, and the number of columns can be increased. Also has the effect of reducing the amount of attenuation and amplitude deviation of the output signal.

【0041】従って本発明の位相推移器をSSB変調回
路の音声周波数信号供給回路に用いると、等化増幅器を
不要とするか、必要であっても簡単な構成とすることが
できるので、上記SSB変調回路は構成を簡単にできる
だけでなく製造費用を軽減できるという効果もある。
Therefore, when the phase shifter of the present invention is used in the audio frequency signal supply circuit of the SSB modulation circuit, the equalization amplifier is not necessary, or even if it is necessary, the structure can be simplified. The modulation circuit not only has a simple structure, but also has the effect of reducing manufacturing costs.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明によるポリフェーズ回路型位相推移器の
一実施例の回路図である。
FIG. 1 is a circuit diagram of an embodiment of a polyphase circuit type phase shifter according to the present invention.

【図2】本実施例においてP=2列とした場合の位相推
移器1Aの回路図である。
FIG. 2 is a circuit diagram of a phase shifter 1A when P = 2 columns in this embodiment.

【図3】図2の位相推移器1Aの出力信号特性を示す図
であり、(a)は振幅特性、(b)は出力位相差特性で
ある。
3A and 3B are diagrams showing output signal characteristics of the phase shifter 1A of FIG. 2, where FIG. 3A is an amplitude characteristic and FIG. 3B is an output phase difference characteristic.

【図4】本実施例の位相推移器1におけるポール周波数
比mに対する適正抵抗比n0を示す図である。
FIG. 4 is a diagram showing an appropriate resistance ratio n0 with respect to a pole frequency ratio m in the phase shifter 1 of the present embodiment.

【図5】列数P=4の場合の位相推移器1の実験データ
を示す図であり、(a)は出力振幅特性、(b)は出力
位相差特性である。
FIG. 5 is a diagram showing experimental data of the phase shifter 1 when the number of columns P = 4, where (a) is an output amplitude characteristic and (b) is an output phase difference characteristic.

【符号の説明】[Explanation of symbols]

1,1A 位相推移器 2 信号発生器 3〜6 信号発生回路 11〜14 入力端子 31〜34,q1〜q4 出力端子 C11〜C14,C21〜C24,C31〜C34,C
41〜C44,Cp1〜Cp4 コンデンサ R11〜R14,R21〜R24,R31〜R34,R
41〜R44,Rp1〜Rp4 抵抗器
1, 1A Phase shifter 2 Signal generator 3-6 Signal generation circuit 11-14 Input terminal 31-34, q1-q4 output terminal C11-C14, C21-C24, C31-C34, C
41-C44, Cp1-Cp4 capacitors R11-R14, R21-R24, R31-R34, R
41-R44, Rp1-Rp4 resistors

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 4行をなす第1,第2,第3および第4
の入力端子と、前記第1,第2,第3および第4の入力
端子にそれぞれ行対応する第1,第2,第3および第4
の出力端子と、前記各行の入力端子と出力端子との間に
それぞれ縦続接続されてP(Pは2以上の整数)列をな
すとともに各列ごとには抵抗値をほぼ等しくした抵抗器
と、第J(Jは1ないし4の整数)行・第I(Iは1な
いしPの整数)列の前記抵抗器の入力端と第(J−1,
但しJ−1=0は4と読み替える)行・第I列の前記抵
抗器の出力端とを循環的に接続するとともに各列ごとに
は容量値をほぼ等しくしたコンデンサとを備えるポリフ
ェーズ回路型位相推移器において、 第I列の前記抵抗器の抵抗値Riと第(I+1)列の前
記抵抗器の抵抗値R(i+1)との比であるn=R(i
+1)/Riを1.3から4の範囲とすることを特徴と
するポリフェーズ回路型位相推移器。
1. A first row, a second row, a third row and a fourth row which form four rows.
Input terminals and the first, second, third and fourth corresponding to the first, second, third and fourth input terminals respectively.
And a resistor having P (P is an integer of 2 or more) columns connected in series between the input terminal and the output terminal of each row and having substantially the same resistance value for each column, The input terminal of the resistor in the Jth row (J is an integer of 1 to 4) and the Ith row (I is an integer of 1 to P) and the (J-1,
However, J-1 = 0 is read as 4) Polyphase circuit type in which the output terminals of the resistors in the row / Ith column are cyclically connected and each column is provided with a capacitor having a substantially equal capacitance value. In the phase shifter, n = R (i, which is the ratio of the resistance value Ri of the resistor in the I-th column and the resistance value R (i + 1) of the resistor in the (I + 1) -th column.
A polyphase circuit type phase shifter characterized in that +1) / Ri is in the range of 1.3 to 4.
【請求項2】 第I列の前記抵抗器の抵抗値Riと第I
列の前記コンデンサの容量値Ciの積と第(I+1)列
の前記抵抗器の抵抗値R(I+1)と第(I+1)列の
前記コンデンサの容量値C(i+1)の積との比Ri・
Ci/{R(i+1)・C(i+1)}をmとした場
合、前記nを{(m+1)+(m2 +6m+1)1/2
/(2m)の0.8倍から2倍までの範囲とすることを
特徴とする請求項1記載のポリフェーズ回路型位相推移
器。
2. The resistance value Ri of the resistor in the I-th column and the I-th value
The ratio Ri of the product of the capacitance value Ci of the capacitors in the column and the product of the resistance value R (I + 1) of the resistors in the (I + 1) th column and the capacitance value C (i + 1) of the capacitors in the (I + 1) th column Ri.
When Ci / {R (i + 1) · C (i + 1)} is m, the n is {(m + 1) + (m 2 + 6m + 1) 1/2 }
2. The polyphase circuit type phase shifter according to claim 1, wherein the range is 0.8 times to 2 times of / (2m).
【請求項3】 前記nおよび前記mを各列ともほぼ等し
くしたことを特徴とする請求項1記載のポリフェーズ回
路型位相推移器。
3. The polyphase circuit type phase shifter according to claim 1, wherein the n and the m are substantially equal in each column.
JP19525094A 1994-08-19 1994-08-19 Polyphase circuit type phase shifter Expired - Lifetime JP2729150B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19525094A JP2729150B2 (en) 1994-08-19 1994-08-19 Polyphase circuit type phase shifter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19525094A JP2729150B2 (en) 1994-08-19 1994-08-19 Polyphase circuit type phase shifter

Publications (2)

Publication Number Publication Date
JPH0865083A true JPH0865083A (en) 1996-03-08
JP2729150B2 JP2729150B2 (en) 1998-03-18

Family

ID=16338008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19525094A Expired - Lifetime JP2729150B2 (en) 1994-08-19 1994-08-19 Polyphase circuit type phase shifter

Country Status (1)

Country Link
JP (1) JP2729150B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004524716A (en) * 2000-09-18 2004-08-12 スカイワークス ソリューションズ,インコーポレイテッド 8 phase 45 ° polyphase filter system with amplitude matching
WO2006054364A1 (en) * 2004-11-19 2006-05-26 Hitachi Communication Technologies, Ltd. Method of designing passive rc complex filter of hartley radio receiver

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004524716A (en) * 2000-09-18 2004-08-12 スカイワークス ソリューションズ,インコーポレイテッド 8 phase 45 ° polyphase filter system with amplitude matching
JP4740408B2 (en) * 2000-09-18 2011-08-03 スカイワークス ソリューションズ,インコーポレイテッド 8-phase 45 ° polyphase filter system with amplitude matching
WO2006054364A1 (en) * 2004-11-19 2006-05-26 Hitachi Communication Technologies, Ltd. Method of designing passive rc complex filter of hartley radio receiver
US7941476B2 (en) 2004-11-19 2011-05-10 Hitachi, Ltd. Method of designing passive RC complex filter of Hartley radio receiver

Also Published As

Publication number Publication date
JP2729150B2 (en) 1998-03-18

Similar Documents

Publication Publication Date Title
US2835814A (en) Electrical musical instruments
US8351621B2 (en) System and method for excursion limiting
US3755749A (en) Sound reenforcement equalization system
JPH1032895A (en) Acoustic reproducing device
Yuce Voltage-mode multifunction filters employing a single DVCC and grounded capacitors
US2916706A (en) Audio modulator
KR100772279B1 (en) Apparatus for generating harmonics in an audio signal
JP2729150B2 (en) Polyphase circuit type phase shifter
WO2008062748A1 (en) Signal processing device and signal processing method
US4801889A (en) Amplifier for amplifying input signal voltage and supplying the same
JPS59152705A (en) Circuit for generating sum or difference frequency signal
US3499093A (en) Chime systems and the like for electronic organs
US4760354A (en) SSB pulse modulator
US6222405B1 (en) Apparatus and method for generating accurate quadrature over a frequency range
JP7182268B2 (en) Power correction device and power correction method
JPS58119212A (en) Btl amplifier circuit
JPS5850356B2 (en) Tatsuchi envelope circuit
JPS59125199A (en) Speaker system
US5705951A (en) Method for correction of error signals in a signal amplification system and an apparatus used for that purpose
JPH0793538B2 (en) Amplifier
JP6546448B2 (en) Gain coefficient generation device, gain coefficient generation method, and gain coefficient generation program
JPS5914811B2 (en) Reproduction equalizer switching circuit
US1494905A (en) Modulator control
JP3219218B2 (en) Modulation circuit
JPH0522632A (en) Contour correction circuit

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19971118