JPH08512435A - 高周波反応性スパッタリングされたタリウム、タングステンおよび金を備えたマイクロ回路用配線のための耐エレクトロマイグレーション金属被覆構造体 - Google Patents
高周波反応性スパッタリングされたタリウム、タングステンおよび金を備えたマイクロ回路用配線のための耐エレクトロマイグレーション金属被覆構造体Info
- Publication number
- JPH08512435A JPH08512435A JP7521750A JP52175095A JPH08512435A JP H08512435 A JPH08512435 A JP H08512435A JP 7521750 A JP7521750 A JP 7521750A JP 52175095 A JP52175095 A JP 52175095A JP H08512435 A JPH08512435 A JP H08512435A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- tiw
- ptsi
- contact hole
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.シリコン基板上に絶縁層を形成する工程と、 前記基板の一部を露出するように前記絶縁層内にコンタクトホールを形成する 工程と、 前記基板上にて前記コンタクトホール内にPtSi層を構成する工程と、 前記PtSi層上にて前記コンタクトホール内にTiW層を形成する工程と、 前記TiW層上にて前記コンタクトホール内にTiW(N)層を形成する工程と、 前記TiW(N)層上にて前記コンタクトホール内にAu層を形成する工程とを備えた 、半導体デバイス上に配線を製造する方法。 2.前記PtSi層は、接触抵抗を減少し、前記基板と接着層として働く前記TiW 層との間の境界部を安定化する請求項1記載の方法。 3.前記絶縁層と前記TiW層との間の付着力を増すように、前記PtSi層の形成 後であって、前記TiW層の形成の前に、マイルドスパッタリングエッチングを行 う工程を更に備え、該マイルドスパッタリングエッチングは前記PtSi層上のSiO2 を更に除く、請求項1記載の方法。 4.スパッタリングチャンバー内の、更にTiWターゲットの、表面からのH2Oお よびO2の残留ガスを減少するように、PtSi層の形成後であって、前記TiW層の形 成前にプリスパッタリングを行う工程を更に含む、請求項1記載の方法。 5.前記TiW層は純粋なTiW膜である、請求項1記載の方法。 6.TiW(N)層の形成後であって、Au層の前記薄膜をスパッタリングする前に、 プリスパッタリングとパージングの組み合わせにより、TiWターゲット表面およ びスパッタリングチャンバーから窒素を除く工程を更に含む、請求項1記載の方 法。 7.前記Au層を形成する工程は更に、 前記TiW(N)層上にて、前記コンタクトホール内でスパッタリングをすることに よりAuの薄膜を形成する工程と、 前記Auの薄膜上にて前記コンタクトホール内でAuの被覆層を形成する工程とを 更に含む、請求項1記載の方法。 8.溶液中で前記Auの薄膜をエッチングする工程を更に含む、請求項7記載の 方法。 9.エッチングマスクとして働く前記被覆されたAu層を用いてプラズマエッチ ングにより、拡散バリアとして働く前記TiW(N)層および接着層として働く前記Ti W層をエッチングする工程を更に含む、請求項7記載の方法。 10.その場所において、前記エッチング工程を実行する、請求項9記載の方 法。 11.金を前記TiW(N)層内に相互拡散することにより、最適な接触力および付 着力を得るように、前記Au層をアニールする工程を更に含む、請求項1記載の方 法。 12.前記配線はボンドパッドである、請求項1記載の方法。 13.前記Au層上にPESiN xパッシベーション膜を形成する工程を更に含む、 請求項1記載の方法。 14.厚みのレンジはPtSi(0.1-0.4k Å)/TiW(0.2-0.5kÅ)/TiW(N)(1.0-2.0k Å)/Au(0.3-1.0k Å)/Au(7-15kÅ、被覆)である、請求項1記載の方法。 15.前記TiW(N)層および前記TiW層のスパッタリングのためのRFパワー密 度は、内部応力を解消するように同じ大きさである、請求項1記載の方法。 16.前記TiW(N)層および前記TiW層のスパッタリングのためのRFパワー密 度は1.5W/平方cmよりも大きい、請求項1記載の方法。 17.シリコン基板上に絶縁層を形成する工程と、 前記基板の一部を露出するように前記絶縁層内にコンタクトホールを形成する 工程と、 前記基板上にて前記コンタクトホール内にPtSi層を構成する工程と、 前記PtSi層上にて前記コンタクトホール内に第1TiW層を形成する工程と、 前記第1TiW層上にて前記コンタクトホール内にTiW(N)層を形成する工程と、 前記TiW(N)層上にて前記コンタクトホール内に第2TiW層を形成する工程と、 前記TiW(N)層上にて前記コンタクトホール内にAu層を形成する工程とを備えた 、半導体デバイス上に配線を製造する方法。 18.前記PtSi層は、接触抵抗を減少し、前記基板と接着層として働く前記第 1TiW層との間の境界部を安定化する請求項17記載の方法。 19.前記絶縁層と前記TiW層との間の付着力を増すように、前記PtSi層の形 成後であって、前記TiW層の形成の前に、マイルドスパッタリングエッチングを 行う工程を更に備え、該マイルドスパッタリングエッチングは前記PtSi層上のSi Oを更に除く、請求項17記載の方法。 20.スパッタリングチャンバー内の、更にTiWターゲットの、表面からのH2O およびO2の残留ガスを減少するように、PtSi層の形成後であって、前記第1TiW 層の形成前にプリスパッタリングを行う工程を更に含む、請求項17記載の方法 。 21.前記第1TiW層は純粋なTiW膜である、請求項17記載の方法。 22.TiW(N)層の形成後であって、前記第2TiW層の形成前に、プリスパッタ リングとパージングの組み合わせにより、TiWターゲット表面およびスパッタリ ングチャンバーから窒素を除く工程を更に含む、請求項17記載の方法。 23.前記Au層を形成する工程は更に、 前記第2TiW(N)層上にて、前記コンタクトホール内でスパッタリングをするこ とによりAuの薄膜を形成する工程と、 前記Auの薄膜上にて前記コンタクトホール内でAuの被覆層を形成する工程とを 更に含む、請求項21記載の方法。 24.溶液中で前記Auの薄膜をエッチングする工程を更に含む、請求項23記 載の方法。 25.エッチングマスクとして働く前記被覆されたAu層を用いてプラズマエッ チングにより、拡散バリアとして働く前記TiW(N)層および接着層として働く前記 第1および第2TiW層をエッチングする工程を更に含む、請求項23記載の方法 。 26.その場所において、前記エッチング工程を実行する、請求項25記載の 方法。 27.金を前記第2TiW層内に相互拡散することにより、最適な接触力および 付着力を得るように、前記Au層をアニールする工程を更に含む、請求項17記載 の方法。 28.前記配線はボンドパッドである、請求項17記載の方法。 29.前記Au層上にPESiN xパッシベーション膜を形成する工程を更に含む、 請求項17記載の方法。 30.厚みのレンジはPtSi(0.1-0.4k Å)/TiW(0.2-0.5kÅ、第1)/TiW(N)(1.0- 2.0kÅ)/TiW(0.1-0.5kÅ、第2)/Au(0.3-1.0kÅ)/Au(7-15kÅ、被覆)である、請 求項17記載の方法。 31.前記TiW(N)層および前記第1および第2TiW層のスパッタリングのため のRFパワー密度は、内部応力を解消するように同じ大きさである、請求項17 記載の方法。 32.前記TiW(N)層および前記TiW層のスパッタリングのためのRFパワー密 度は1.5W/平方cmよりも大きい、請求項17記載の方法。 33.前記配線は、シリコン基板上の絶縁層と、 前記基板の一部を露出するように前記絶縁層内に設けられたコンタクトホール と、 前記基板上の前記コンタクトホール内に設けられたPtSi層と、 前記PtSi層上の前記コンタクトホール内に設けられたTiW層と、 前記TiW層上の前記コンタクトホール内に設けられたTiW(N)層と、 前記TiW(N)層上の前記コンタクトホール内に設けられたAu層とを備えた、半導 体デバイス上の配線。 34.前記PtSi層は、接触抵抗を減少し、前記基板と接着層として働く前記Ti W層との間の境界部を安定化する請求項33記載の配線。 35.前記TiW層は純粋なTiW膜である、請求項33記載の配線。 36.前記Au層は更に、 前記TiW(N)層上の前記コンタクトホール内に設けられたAuの薄膜と、 前記Auの薄膜上に設けられたAuの被覆層とを更に含む、請求項33記載の配線 。 37.前記配線はボンドパッドである、請求項35記載の配線。 38.前記Au層上に設けられたPESiN xパッシベーション膜を更に含む、請求 項33記載の配線。 39.厚みのレンジはPtSi(0.1-0.4k Å)/TiW(0.2-0.5kÅ)/TiW(N)(1.0-2.0k Å)/Au(0.3-1.0k Å)である、請求項33記載の配線。 40.前記配線は、シリコン基板上の絶縁層と、 前記基板の一部を露出する前記絶縁層内に設けられたコンタクトホールと、 前記基板上の前記コンタクトホール内に設けられたPtSi層と、 前記PtSi層上の前記コンタクトホール内に設けられた第1TiW層と、 前記第1TiW層の前記コンタクトホール内に設けられたTiW(N)層と、 前記TiW(N)層上の前記コンタクトホール内に設けられた第2TiW層と、 前記TiW(N)層上の前記コンタクトホール内に設けられたAu層とを備えた、半導 体デバイス上の配線。 41.前記PtSi層は、接触抵抗を減少し、前記基板と接着層として働く前記第 1TiW層との間の境界部を安定化する請求項40記載の配線。 42.前記第1TiW層は純粋なTiW膜である、請求項40記載の配線。 43.前記Au層は、 前記第2TiW(N)層上の前記コンタクトホール内に設けられたAuの薄膜と、 前記Auの薄膜上に設けられたAuの被覆層とを更に含む、請求項40記載の配線 。 44.前記配線はボンドパッド用開口部である、請求項40記載の配線。 45.前記Au層上に設けられたPESiN xパッシベーション膜を更に含む、請求 項40記載の配線。 46.厚みのレンジはPtSi(0.1-0.4k Å)/TiW(0.2-0.5kÅ、第1)/TiW(N)(1.0- 2.0kÅ)/TiW(0.1-0.5kÅ、第2)/Au(0.3-1.0kÅ)である、請求項40記載の配線 。 47.厚みのレンジはPtSi(0.1-0.4k Å)/TiW(0.2-0.5kÅ)/TiW(N)(1.0-2.0k Å)/Au(7-15kÅ、被覆)である、請求項33記載の配線。 48.厚みのレンジはPtSi(0.1-0.4k Å)/TiW(0.2-0.5kÅ、第1)/TiW(N)(1.0- 2.0kÅ)/TiW(0.1-0.5kÅ、第2)/Au(7-15k Å、被覆)である、請求項40記載の 配線。
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US4787958A (en) * | 1987-08-28 | 1988-11-29 | Motorola Inc. | Method of chemically etching TiW and/or TiWN |
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US4927505A (en) * | 1988-07-05 | 1990-05-22 | Motorola Inc. | Metallization scheme providing adhesion and barrier properties |
JP2537413B2 (ja) * | 1989-03-14 | 1996-09-25 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
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DE4129647B4 (de) * | 1990-09-28 | 2009-02-12 | Siemens Ag | Vorderseiten-Metallisierung zum Drahtbonden für ein III-V Halbleiterbauelement und Verfahren |
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JP2861629B2 (ja) * | 1992-05-27 | 1999-02-24 | 日本電気株式会社 | 半導体装置 |
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MY115336A (en) * | 1994-02-18 | 2003-05-31 | Ericsson Telefon Ab L M | Electromigration resistant metallization structures and process for microcircuit interconnections with rf-reactively sputtered titanium tungsten and gold |
-
1995
- 1995-02-08 MY MYPI9500275 patent/MY115336A/en unknown
- 1995-02-14 EP EP95910051A patent/EP0695463A1/en not_active Ceased
- 1995-02-14 AU AU18287/95A patent/AU688472B2/en not_active Ceased
- 1995-02-14 WO PCT/SE1995/000152 patent/WO1995022838A1/en not_active Application Discontinuation
- 1995-02-14 BR BR9505846A patent/BR9505846A/pt not_active IP Right Cessation
- 1995-02-14 JP JP7521750A patent/JPH08512435A/ja active Pending
- 1995-02-14 KR KR1019950704553A patent/KR100376955B1/ko active IP Right Grant
- 1995-02-14 CA CA 2160234 patent/CA2160234A1/en not_active Abandoned
- 1995-02-14 MX MX9504299A patent/MX9504299A/es not_active IP Right Cessation
- 1995-02-14 SG SG1996012118A patent/SG52880A1/en unknown
- 1995-02-14 CN CN95190256A patent/CN1111907C/zh not_active Expired - Lifetime
- 1995-02-24 TW TW84101715A patent/TW293928B/zh active
- 1995-10-11 NO NO954040A patent/NO954040L/no not_active Application Discontinuation
- 1995-10-17 FI FI954942A patent/FI954942A/fi unknown
-
1996
- 1996-01-24 US US08/590,607 patent/US5821620A/en not_active Expired - Lifetime
- 1996-12-06 US US08/761,817 patent/US5920794A/en not_active Expired - Lifetime
-
1998
- 1998-06-09 US US09/094,025 patent/US6211568B1/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004336027A (ja) * | 2003-04-16 | 2004-11-25 | Showa Denko Kk | p形オーミック電極構造、それを備えた化合物半導体発光素子及びLEDランプ |
JP4502691B2 (ja) * | 2003-04-16 | 2010-07-14 | 昭和電工株式会社 | p形オーミック電極構造、それを備えた化合物半導体発光素子及びLEDランプ |
Also Published As
Publication number | Publication date |
---|---|
EP0695463A1 (en) | 1996-02-07 |
FI954942A0 (fi) | 1995-10-17 |
CA2160234A1 (en) | 1995-08-24 |
WO1995022838A1 (en) | 1995-08-24 |
SG52880A1 (en) | 1998-09-28 |
AU688472B2 (en) | 1998-03-12 |
US5920794A (en) | 1999-07-06 |
TW293928B (ja) | 1996-12-21 |
AU1828795A (en) | 1995-09-04 |
MY115336A (en) | 2003-05-31 |
MX9504299A (es) | 1997-05-31 |
KR100376955B1 (ko) | 2003-06-19 |
KR960702179A (ko) | 1996-03-28 |
US5821620A (en) | 1998-10-13 |
BR9505846A (pt) | 1996-02-13 |
CN1125999A (zh) | 1996-07-03 |
NO954040L (no) | 1995-12-14 |
CN1111907C (zh) | 2003-06-18 |
NO954040D0 (no) | 1995-10-11 |
US6211568B1 (en) | 2001-04-03 |
FI954942A (fi) | 1995-11-24 |
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