JPH0831614B2 - Solar cell - Google Patents
Solar cellInfo
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- JPH0831614B2 JPH0831614B2 JP62281613A JP28161387A JPH0831614B2 JP H0831614 B2 JPH0831614 B2 JP H0831614B2 JP 62281613 A JP62281613 A JP 62281613A JP 28161387 A JP28161387 A JP 28161387A JP H0831614 B2 JPH0831614 B2 JP H0831614B2
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- Prior art keywords
- semiconductor layer
- solar cell
- layer
- semiconductor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は複数個の太陽電池を直列に接続して光発電に
使用する場合、一部の太陽電池セルが影になつた時に発
生する逆電圧に破壊を防止する逆導通太陽電池セルに関
する。DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention, when a plurality of solar cells are connected in series and used for photovoltaic power generation, the reverse phenomenon that occurs when some solar cells are shaded. The present invention relates to a reverse conducting solar cell that prevents breakdown to voltage.
一般に、この種の太陽電池セルは基本的には１つのｐ
−ｎ接合を有するダイオードである。Generally, a solar cell of this type basically has one p
-A diode having an n-junction.
実際の太陽電池セルを発電用として使用する際には、
複数個のセルを直列に接続し、全体の発生電圧が所定の
電圧となるようにしていた。When using an actual solar cell for power generation,
A plurality of cells are connected in series so that the overall generated voltage becomes a predetermined voltage.
しかしながら従来の太陽電池セルは、太陽電池セルの
一部が影になつた場合、直列接続された他のセルに発生
する電圧が、ダイオードである太陽電池セルの性質上、
逆方向電圧として印加されることになり、この時、太陽
電池セルの逆方向耐量が小さいと破壊現象が起り、太陽
電池セルとしての機能が低下し又は消滅してしまうとい
う欠点があつた。However, in the conventional solar cell, when a part of the solar cell is shaded, the voltage generated in the other cells connected in series is due to the nature of the solar cell which is a diode,
Since a reverse voltage is applied to the solar cell at this time, if the reverse withstand voltage of the solar battery cell is small, a destruction phenomenon occurs and the function as the solar battery cell deteriorates or disappears.
上記の欠点を防止するためには太陽電池セルの逆方向
耐圧を高めるか、又は直列接続したセルの発生電圧が１
セルの逆阻止能力を越えない範囲毎に、逆並列に別途ダ
イオードを挿入するという方法がある。In order to prevent the above drawbacks, the reverse withstand voltage of the solar cells is increased, or the generated voltage of the cells connected in series is 1
There is a method in which a diode is separately inserted in antiparallel in each range that does not exceed the reverse blocking capability of the cell.
前者の太陽電池セルの逆方向電圧を高めるには、ベー
ス層の不純物濃度を下げるという方法がある。このため
には太陽電池セルでは浅いｐ−ｎ接合を必要とし、特に
宇宙用太陽電池セルは短波長感度を高めるために0.3〜
0.5μｍ以下にする必要があり、通常数百Ｖの逆耐圧を
得るのに必要な不純物濃度のベース層に対して上記のよ
うなｐ−ｎ接合を拡散によつて形成することは、実験的
には可能であつても技術的に量産は非常に困難である。
また、GaAs太陽電池セルにおいては、その結晶成長時に
低不純物濃度を得ることは困難であり、このため得られ
る逆耐圧は多くても数十Ｖである。In order to increase the reverse voltage of the former solar cell, there is a method of decreasing the impurity concentration of the base layer. For this purpose, a solar cell requires a shallow pn junction, and especially for space solar cells, 0.3-
It is necessary to reduce the thickness to 0.5 μm or less, and it is experimentally possible to form the above-described pn junction by diffusion in a base layer having an impurity concentration necessary to obtain a reverse breakdown voltage of several hundred V. Although it is possible, it is technically very difficult to mass-produce.
Further, in a GaAs solar cell, it is difficult to obtain a low impurity concentration during the crystal growth thereof, and therefore the reverse breakdown voltage obtained is at most several tens of volts.
他方、後者の別途ダイオードを挿入する方法は、ダイ
オード接続により部品点数が増加するのでコストアツプ
につながり且つ系としての信頼性を下げることになり、
特に高信頼性を要求される宇宙用等の太陽電池セルでは
大きな問題となる。On the other hand, the latter method of inserting a separate diode increases the number of parts due to the diode connection, which leads to cost increase and lowers the reliability of the system.
In particular, this is a big problem in solar cells for space use, which require high reliability.
他の方法として太陽電池セル中に逆並列接続された独
立のダイオードを形成することにより外部逆並列ダイオ
ード挿入と同様の効果を得ることができる。しかし反
面、同一半導体基板内に逆並列ダイオードを形成した場
合、入射光により逆並列ダイオードに太陽電池起電力と
反対方向に起電力が発生してしまい、太陽電池の特性を
著しく損うことになる。As another method, the same effect as the external anti-parallel diode insertion can be obtained by forming an independent diode connected in anti-parallel in the solar cell. However, on the other hand, when an anti-parallel diode is formed in the same semiconductor substrate, an incident light will generate an electromotive force in the anti-parallel diode in a direction opposite to the solar cell electromotive force, which will significantly impair the characteristics of the solar cell. .
以上のように太陽電池セルの逆耐圧を高めることは限
度があり、高電圧発電システムとしての使用は困難であ
つた。As described above, there is a limit to increase the reverse breakdown voltage of the solar battery cell, and it is difficult to use it as a high-voltage power generation system.
本発明は以上のような問題点を解消し、同一半導体基
板内に逆並列ダイオードを形成する逆導通太陽電池セル
において、逆並列ダイオードの起電力を防止して高効率
の太陽電池セルを得ることを目的とする。The present invention solves the above problems and, in a reverse conducting solar cell in which an antiparallel diode is formed in the same semiconductor substrate, an electromotive force of the antiparallel diode is prevented to obtain a highly efficient solar cell. With the goal.
本発明は半導体基板の第１の主面に全面形成され、そ
の１部が半導体基板を貫通して第２の主面に到達するよ
うな第１の導電型の第１の半導体層と、半導体基板を第
１の半導体層により分離して形成された第２の導電型の
第２の半導体層および第２の導電型の第３の半導体層
と、 第２の導電型の第３の半導体層内に位置し、第２の主
面側に形成された第１の導電型を有する半導体層であつ
て、第３の半導体層と形成するｐ−ｎ接合が第１の主面
から入射される光発電に寄与する波長の光が第３の半導
体層に吸収されて該ｐ−ｎ接合まで達しない深さに形成
された第４の半導体層と、第２の主面側の所定箇所に形
成された外部接続用の電極とを設けたものである。The present invention relates to a first semiconductor layer of a first conductivity type, which is entirely formed on a first main surface of a semiconductor substrate, a part of which penetrates the semiconductor substrate and reaches the second main surface, A second semiconductor layer of the second conductivity type and a third semiconductor layer of the second conductivity type, which are formed by separating the substrate by the first semiconductor layer; and a third semiconductor layer of the second conductivity type. A semiconductor layer having a first conductivity type, which is located inside and is formed on the second main surface side, and a pn junction formed with the third semiconductor layer is incident from the first main surface. Light having a wavelength that contributes to photovoltaic power generation is formed in a fourth semiconductor layer formed at a depth that is absorbed by the third semiconductor layer and does not reach the pn junction, and at a predetermined location on the second main surface side. And an externally connected electrode for external connection.
本発明は第１の主面側からの光は第３の半導体層に吸
収され、第２の主面側からの光は電極により反射又は吸
収されるので、第３の半導体層および第４の半導体層に
より形成されるｐ−ｎ接合部には光が到達せず、逆方向
の発電は生じない。In the present invention, the light from the first main surface side is absorbed by the third semiconductor layer, and the light from the second main surface side is reflected or absorbed by the electrodes. Therefore, the third semiconductor layer and the fourth semiconductor layer Light does not reach the pn junction formed by the semiconductor layer, and power generation in the opposite direction does not occur.
次に本発明の実施例について図を用いて説明する。 Next, an embodiment of the present invention will be described with reference to the drawings.
第１図（ａ）〜（ｅ）は本発明の一実施例を示すGaAs
太陽電池セルの各製造工程の断面図である。1 (a) to 1 (e) are GaAs showing one embodiment of the present invention.
It is sectional drawing of each manufacturing process of a photovoltaic cell.
まず、ｎ型GaAsの半導体基板１の表面側である受光面
側（図では上側）および裏面側の両面に選択拡散用のマ
スクとしてCVD方法によりSi3N4膜２を形成し（（ａ）
図）、そのSi3N4膜２の所定箇所を写真製版技術により
除去して半導体基板１が露出するような窓を形成する
（（ｂ）図）。First, a Si 3 N 4 film 2 is formed by a CVD method as a mask for selective diffusion on both the light-receiving surface side (upper side in the figure) and the back surface side of the n-type GaAs semiconductor substrate 1 ((a)).
Then, a predetermined portion of the Si 3 N 4 film 2 is removed by a photolithography technique to form a window through which the semiconductor substrate 1 is exposed (see (b)).
次に前工程で形成された窓から不純物であるZnの拡散
を行い、半導体基板１を貫通するようなｐ型、GaAs層４
（第１の導電型の第１の半導体層）を形成する。これに
より半導体基板１は左右に分離されｎ型GaAs層3,5（第
２の導電型の第2,第３の半導体層）が形成される。そし
て、ｎ型GaAs層５の裏面側にｐ型GaAs層６（第１の導電
型を有する第４の半導体層）を形成する。（（ｃ）
図）。この際、ｎ型GaAs層５およびｐ型GaAs層６より形
成されるｐ−ｎ接合である逆並列ダイオードの位置は、
セル端から少なくとも20μｍ以上離れるようにする。Next, Zn, which is an impurity, is diffused through the window formed in the previous step, and the p-type GaAs layer 4 which penetrates the semiconductor substrate 1 is formed.
(First semiconductor layer of first conductivity type) is formed. As a result, the semiconductor substrate 1 is separated into right and left, and n-type GaAs layers 3 and 5 (second conductive type second and third semiconductor layers) are formed. Then, the p-type GaAs layer 6 (fourth semiconductor layer having the first conductivity type) is formed on the back surface side of the n-type GaAs layer 5. ((C)
Figure). At this time, the position of the anti-parallel diode, which is a pn junction formed by the n-type GaAs layer 5 and the p-type GaAs layer 6, is
At least 20 μm or more away from the cell edge.
これは、特にGaAs太陽電池セルにおいては、GaAsの光
吸収係数が大きく，光発電に寄与する波長の光の浸透深
さが約20μｍであり、逆並列ダイオードのｐ−ｎ接合が
これ以上深い位置にあれば接合部に電力が発生すること
がないからである。This is because, especially in GaAs solar cells, the light absorption coefficient of GaAs is large, the penetration depth of light having a wavelength that contributes to photovoltaic power generation is about 20 μm, and the pn junction of the antiparallel diode is deeper than this. This is because no power will be generated at the junction if the above condition exists.
この後、受光面側のSi3N4膜２を除去し、太陽電池機
能を有するｐ−ｎ接合を形成するために約0.5μｍの厚
みのｐ型GaAs層７（第１の導電型の第１の半導体層）お
よびｐ型AlGaAs層８を形成する（（ｄ）図）。After that, the Si 3 N 4 film 2 on the light-receiving surface side is removed, and in order to form a pn junction having a solar cell function, a p-type GaAs layer 7 (first conductivity type first layer) having a thickness of about 0.5 μm is formed. 1 semiconductor layer) and the p-type AlGaAs layer 8 are formed ((d) figure).
さらに、受光面側にはｐ型AlGaAs層８上にSi3N4の反
射防止膜９を形成し、裏面側にはSi3N4の絶縁膜10を形
成する。続いてこれらの反射防止膜９および絶縁膜10の
所定箇所を写真製版技術により除去し、その除去部分
に、受光面側にはグリツド電極11を形成し、裏面側には
２つの独立しが外部接続電極として陽電極，陰電極12,1
3を形成する（（ｅ）図）。Further, the light receiving surface side reflection preventing film 9 the Si 3 N 4 is formed on the p-type AlGaAs layer 8, on the back side to form the insulating film 10 the Si 3 N 4. Subsequently, predetermined portions of the antireflection film 9 and the insulating film 10 are removed by a photolithography technique, and a grid electrode 11 is formed on the light receiving surface side on the removed portion, and two independent external electrodes are formed on the back surface side. Positive and negative electrodes 12,1 as connecting electrodes
3 is formed (Fig. (E)).
この陽電極12はｐ型GaAs層4,n型GaAs層５に接触する
ように形成され、他方、陰電極13はｎ型GaAs層3,p型GaA
s層６に接触するように形成され、位置的に離れたｎ型G
aAs層３およびｐ型GaAs層６を電気的に接続している。The positive electrode 12 is formed in contact with the p-type GaAs layer 4 and the n-type GaAs layer 5, while the negative electrode 13 is formed with the n-type GaAs layer 3 and p-type GaA.
n-type G formed so as to contact the s layer 6 and separated in position
The aAs layer 3 and the p-type GaAs layer 6 are electrically connected.
さらに陰電極13はｎ型GaAs層５及びｐ型GaAs6から成
るｐ−ｎ接合部分を絶縁膜10を介して被覆するように形
成されている。Further, the negative electrode 13 is formed so as to cover the pn junction portion composed of the n-type GaAs layer 5 and the p-type GaAs 6 via the insulating film 10.
次に本実施例の動作について説明する。 Next, the operation of this embodiment will be described.
まず、太陽電池セルの受光面に光が入射すると、ｎ型
GaAs層３及びｐ型GaAs層４の間に光起電力が生じ、陽電
極12を正，陰電極13を負とする電池として動作する。こ
の際、ｐ型GaAs層４及びｎ型GaAs層５は陽電極12により
短絡しているので、光発電には寄与しない。ここで、ｎ
型GaAs層５とｐ型GaAs層６により形成されるｐ−ｎ接合
はその性質上太陽電池セルの発電方向とは逆方向の発電
機能を有しているのであるが、受光面側からの入射光中
発電に有効な波長の光はｎ型GaAs層５およびｐ型GaAs層
７により吸収され、他方、裏面側からの入射光は陰電極
13により遮蔽されるので、該ｐ−ｎ接合には光は到達せ
ず従つて、逆方向に発電を防ぐことができる。First, when light is incident on the light-receiving surface of a solar cell, the n-type
Photoelectromotive force is generated between the GaAs layer 3 and the p-type GaAs layer 4, and the cell operates as a battery in which the positive electrode 12 is positive and the negative electrode 13 is negative. At this time, since the p-type GaAs layer 4 and the n-type GaAs layer 5 are short-circuited by the positive electrode 12, they do not contribute to photovoltaic power generation. Where n
The pn junction formed by the p-type GaAs layer 5 and the p-type GaAs layer 6 has a power generation function in the direction opposite to the power generation direction of the solar cell due to its nature, but is incident from the light-receiving surface side. Light having a wavelength effective for photo-electric power generation is absorbed by the n-type GaAs layer 5 and the p-type GaAs layer 7, while incident light from the back surface side is a negative electrode.
Since it is shielded by 13, light does not reach the pn junction, and accordingly, power generation can be prevented in the opposite direction.
また、陽電極12,陰電極13を介して直列接続された複
数の太陽電池セルにおいては、一部の太陽電池セルが影
になつた場合、逆電圧が印加され陽電極12が負、陰電極
13に正がバイアスされるが、このときはｎ型GaAs層5,p
型GaAs層６から成るｐ−ｎ接合が順バイアスされ、電流
が陰電極13から陽電極12へ流れることになり（逆方向導
通能力）、このため、該ｐ−ｎ接合には逆電圧が印加さ
れない。Further, in a plurality of solar cells connected in series via the positive electrode 12 and the negative electrode 13, when some of the solar cells are shaded, a reverse voltage is applied and the positive electrode 12 is negative and the negative electrode is negative.
13 is positively biased, but at this time, n-type GaAs layer 5, p
The pn junction composed of the type GaAs layer 6 is forward-biased, and a current flows from the negative electrode 13 to the positive electrode 12 (reverse conduction capability). Therefore, a reverse voltage is applied to the pn junction. Not done.
このように本実施例ではｎ型GaAs層５及びｐ型GaAs層
６から成るｐ−ｎ接合部に逆電圧の発電を生じないよう
に構成しているので、太陽電池セルは逆方向電圧による
破壊を防ぐことが可能となる。As described above, in this embodiment, since the pn junction composed of the n-type GaAs layer 5 and the p-type GaAs layer 6 is configured so as not to generate the reverse voltage, the solar cell is destroyed by the reverse voltage. Can be prevented.
なお、本実施例ではGaAs太陽電池セルについて説明し
たが、この他にもSi太陽電池セル等他の太陽電池セルに
適用しうることができるのはいうまでもない。In addition, although the GaAs solar cell has been described in the present embodiment, it is needless to say that the present invention can be applied to other solar cells such as a Si solar cell.
また、本実施例では陰電極13がｎ型GaAs層３およびｐ
型GaAs層６を短絡するように形成しているが、ｎ型GaAs
層3,p型GaAs層６に電極を各々形成してアセンブリ時に
コネクタにより結合しても良い。In this embodiment, the negative electrode 13 is the n-type GaAs layer 3 and p.
The n-type GaAs layer 6 is formed so as to be short-circuited.
Electrodes may be formed on the layer 3 and the p-type GaAs layer 6, respectively, and may be connected by a connector during assembly.
以上のように本発明では第１の主面側からの光は第３
の半導体層に吸収され、第２の主面側からの光は電極に
より反射され、第３の半導体層および第４の半導体層に
より形成されるｐ−ｎ接合部には光が到達しないように
構成したので、ｐ−ｎ接合部での逆方向の発電を防止で
き、逆方向電圧により太陽電池セルが破壊されることも
なくなり、且つ外部にダイオードを挿入する必要もない
ので部品数を抑えることが可能となり、より信頼性の高
い太陽電池セルを得ることができる。As described above, in the present invention, the light from the first main surface side is the third
The light from the second main surface side is absorbed by the semiconductor layer of the second main surface and is reflected by the electrode so that the light does not reach the pn junction formed by the third semiconductor layer and the fourth semiconductor layer. Since it is configured, it is possible to prevent power generation in the reverse direction at the pn junction, to prevent the solar cell from being destroyed by the reverse voltage, and to suppress the number of parts because it is not necessary to insert a diode outside. This makes it possible to obtain a more reliable solar cell.
第１図（ａ）〜（ｅ）は本発明の一実施例を示す太陽電
池セルの各製造工程の断面図である。 １……半導体基板、２……Si3N4膜、３……ｎ型GaAs層
（第２の半導体層）、５……ｎ型GaAs層（第３の半導体
層）、４……ｐ型GaAs層（第１の半導体層）、６……ｐ
型GaAs層（第４の半導体層）、７……ｐ型GaAs層（第１
の半導体層）、８……ｐ型AlGaAs層、９……反射防止
膜、10……絶縁膜、11……グリツド電極、12……陽極、
13……陰極。1 (a) to 1 (e) are cross-sectional views of respective steps of manufacturing a solar battery cell showing an embodiment of the present invention. 1 ... Semiconductor substrate, 2 ... Si 3 N 4 film, 3 ... n-type GaAs layer (second semiconductor layer), 5 ... n-type GaAs layer (third semiconductor layer), 4 ... p-type GaAs layer (first semiconductor layer), 6 ... p
-Type GaAs layer (fourth semiconductor layer), 7 ... p-type GaAs layer (first
Semiconductor layer), 8 ... P-type AlGaAs layer, 9 ... Antireflection film, 10 ... Insulating film, 11 ... Grid electrode, 12 ... Anode,
13 ... Cathode.
Claims (6)
その１部が半導体基板を貫通して第２の主面に到達する
ような第１の導電型の第１の半導体層と、 半導体基板を第１の半導体層により分離して形成された
第２の導電型の第２の半導体層および第２の導電型の第
３の半導体層と、 第２の導電型の第３の半導体層内に位置し、第２の主面
側に形成された第１の導電型を有する半導体層であつ
て、第３の半導体層と形成するｐ−ｎ接合が第１の主面
から入射される光発電に寄与する波長の光が第３の半導
体層に吸収されて該ｐ−ｎ接合まで達しない深さに形成
された第４の半導体層と、 第１及び第２の主面側の所定箇所に形成された外部接続
用の電極とを設けたことを特徴とする太陽電池セル。1. An entire surface of a first main surface of a semiconductor substrate,
A first semiconductor layer of a first conductivity type, a part of which penetrates the semiconductor substrate to reach the second main surface, and a second semiconductor layer formed by separating the semiconductor substrate by the first semiconductor layer. Of the second conductivity type second semiconductor layer and the second conductivity type third semiconductor layer, and the third semiconductor layer of the second conductivity type located on the second main surface side. A semiconductor layer having a conductivity type of 1, in which a pn junction formed with a third semiconductor layer absorbs light having a wavelength that contributes to photovoltaic power generation incident from the first main surface into the third semiconductor layer. And a fourth semiconductor layer formed to a depth that does not reach the pn junction and an electrode for external connection formed at a predetermined location on the first and second main surface sides. Characteristic solar cell.
１の半導体層および第３の半導体層の両方に接触するよ
うに形成された第１の電極と、第２の半導体層上に形成
された第２の電極と、第２の主面に露出した第３の半導
体層および第４の半導体層より形成されるｐ−ｎ接合部
を絶縁層を介して覆うような位置で且つ第４の半導体層
上に形成され、第２の電極と電気的に接続している第３
の電極とから成ることを特徴とする特許請求の範囲第１
項記載の太陽電池セル。2. An electrode formed on the side of the second main surface, a first electrode formed so as to contact both the first semiconductor layer and the third semiconductor layer, and a second semiconductor. A position where the pn junction formed by the second electrode formed on the layer and the third semiconductor layer and the fourth semiconductor layer exposed on the second main surface is covered with the insulating layer. And a third electrode formed on the fourth semiconductor layer and electrically connected to the second electrode.
Claim 1 which is characterized by comprising an electrode of
The solar cell according to the item.
とする特許請求の範囲第１項記載の太陽電池セル。3. The solar cell according to claim 1, wherein the semiconductor substrate is made of GaAs.
り形成されるｐ−ｎ接合部は、半導体基板の端部より20
μｍ以上離れて形成されることを特徴とする特許請求の
範囲第１項記載の太陽電池セル。4. The pn junction formed by the third semiconductor layer and the fourth semiconductor layer is located at an end of the semiconductor substrate 20.
The solar battery cell according to claim 1, wherein the solar battery cells are formed at a distance of at least μm.
はZnを不純物とするｐ型層であることを特徴とする特許
請求の範囲第１項，第２項，第３項又は第４項記載の太
陽電池セル。5. The first semiconductor layer and the fourth semiconductor layer are p-type layers containing Zn as an impurity, and the first semiconductor layer and the fourth semiconductor layer are claim 1, claim 2, claim 3 or claim 4. The solar cell according to item 4.
の半導体層により形成されるｐ−ｎ接合の第２の主面露
出部は、少なくともSi3N4を含む絶縁層を介して、第３
の電極に覆われていることを特徴とする特許請求の範囲
第２項記載の太陽電池セル。6. A part of the third semiconductor layer, and third and fourth semiconductor layers.
The second major surface exposed portion of the p-n junction formed by the semiconductor layer via an insulating layer containing at least Si 3 N 4, 3
The solar cell according to claim 2, wherein the solar cell is covered with the electrode.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62281613A JPH0831614B2 (en) | 1987-11-06 | 1987-11-06 | Solar cell |
| US07/202,507 US4846896A (en) | 1987-07-08 | 1988-06-07 | Solar cell with integral reverse voltage protection diode |
| DE3819671A DE3819671A1 (en) | 1987-07-08 | 1988-06-09 | SOLAR CELL AND METHOD FOR THEIR PRODUCTION |
| GB8813737A GB2206732B (en) | 1987-07-08 | 1988-06-10 | Solar cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62281613A JPH0831614B2 (en) | 1987-11-06 | 1987-11-06 | Solar cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01123479A JPH01123479A (en) | 1989-05-16 |
| JPH0831614B2 true JPH0831614B2 (en) | 1996-03-27 |
Family
ID=17641576
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62281613A Expired - Lifetime JPH0831614B2 (en) | 1987-07-08 | 1987-11-06 | Solar cell |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0831614B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0324768A (en) * | 1989-06-22 | 1991-02-01 | Sharp Corp | Solar battery with bypass diode |
| JP2573083B2 (en) * | 1990-06-06 | 1997-01-16 | シャープ株式会社 | Solar cell with bypass diode |
-
1987
- 1987-11-06 JP JP62281613A patent/JPH0831614B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01123479A (en) | 1989-05-16 |
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