JPH08280170A - Switching power supply circuit - Google Patents
Switching power supply circuitInfo
- Publication number
- JPH08280170A JPH08280170A JP8058595A JP8058595A JPH08280170A JP H08280170 A JPH08280170 A JP H08280170A JP 8058595 A JP8058595 A JP 8058595A JP 8058595 A JP8058595 A JP 8058595A JP H08280170 A JPH08280170 A JP H08280170A
- Authority
- JP
- Japan
- Prior art keywords
- output
- voltage
- power supply
- pulse
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Dc-Dc Converters (AREA)
- Power Conversion In General (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、半導体集積回路装置
のスイッチング電源の電源投入時の突入電流の制御に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to controlling inrush current when a switching power supply of a semiconductor integrated circuit device is turned on.
【０００２】[0002]
【従来の技術】従来、スイッチング電源の電源投入時は
突入電流が大きいため、電源の内部抵抗や配線抵抗等の
抵抗が大きいと、その電圧降下により動作電圧以上の電
源電圧であっても出力が立ち上がらない場合があった。
また、一方、突入電流を小さくする方法として、スロー
スタート回路が用いられていた。すなわち、エラーアン
プの基準電圧をゆっくり立ち上げることにより、エラー
アンプに入力される出力電圧の分圧値と基準電圧値との
差が大きくならないようにして、パルス制御回路から出
力されるパルス巾が長くならないように制御して、電源
に流れる突入電流を小さく抑えていた。2. Description of the Related Art Conventionally, when a power supply of a switching power supply is turned on, a large inrush current is generated. Therefore, if the resistance of the power supply such as internal resistance or wiring resistance is large, the voltage drop causes the output to be output even if the power supply voltage is higher than the operating voltage. There were cases where it didn't stand up.
On the other hand, a slow start circuit has been used as a method for reducing the inrush current. That is, by slowly raising the reference voltage of the error amplifier, the difference between the divided voltage value of the output voltage input to the error amplifier and the reference voltage value is prevented from increasing, and the pulse width output from the pulse control circuit is reduced. The control was made so that it would not become long, and the inrush current flowing to the power supply was kept small.
【０００３】[0003]
【発明が解決しようとする課題】しかし、従来の技術の
スロースタート回路を用いた方法では、電源を投入して
から出力電圧が立ち上がるまで時間が長くかかっていた
という欠点があった。この発明は、従来のこのような欠
点を解決するために、立ち上げ時間を遅くすることなく
電源投入時の突入電流を小さくして、確実に出力電圧が
立ち上がることを目的としている。However, the method using the slow start circuit of the prior art has a drawback that it takes a long time until the output voltage rises after the power is turned on. SUMMARY OF THE INVENTION In order to solve the conventional drawbacks described above, an object of the present invention is to reduce the inrush current when the power is turned on without delaying the start-up time and to reliably raise the output voltage.
【０００４】[0004]
【課題を解決するための手段】上記課題を解決するため
に、この発明は電源投入時の出力電圧がまだ立ち上がっ
ていない間はパルス制御回路から常に短いパルス巾のス
イッチングパルスが出るようにした。In order to solve the above-mentioned problems, the present invention is designed so that the pulse control circuit always outputs a switching pulse having a short pulse width while the output voltage at the time of power-on has not risen yet.
【０００５】[0005]
【作用】スイッチング電源の電源投入時は、エラーアン
プの２つの入力電圧差が大きいため、パルス制御回路か
らは最大パルス巾のパルスを出力するように動作する。
しかし、パルス巾が大きいとスイッチングトランジスタ
に流れる電流は大きくなり、電源の内部インピーダンス
や配線抵抗等による電圧降下が大きくなって構成する回
路にかかる電圧が低下し、動作電圧以下まで下がると永
久に立ち上がらない不具合が生じる。そこで、電源投入
時には、パルス巾を小さくすることにより突入電流は小
さく抑えられるため、電源電圧の低下は最小限に抑える
ことができるので、立ち上げ時間を長くすることなしに
確実に出力を立ち上げることができる。When the switching power supply is turned on, since the difference between the two input voltages of the error amplifier is large, the pulse control circuit operates so as to output a pulse having the maximum pulse width.
However, if the pulse width is large, the current flowing through the switching transistor will be large, the voltage drop due to the internal impedance of the power supply and wiring resistance, etc. will be large, and the voltage applied to the circuit will be reduced. There is no malfunction. Therefore, when the power is turned on, the inrush current can be suppressed to a small value by reducing the pulse width, so that the decrease in the power supply voltage can be suppressed to the minimum, so that the output can be reliably started without increasing the start-up time. be able to.
【０００６】[0006]
【実施例】以下に、本発明の半導体集積回路装置の実施
例を図面に基づいて説明する。図１は本発明の実施例
で、出力端子１５の出力電圧を電圧分割回路８によって
分圧された電圧と基準電圧９の電圧をエラーアンプ１２
で比較し、その結果と発振回路１０から出力されるパル
スをパルス制御回路１１で所望のパルスをスイッチング
トランジスタ７のゲート入力に出力することによって、
スイッチングトランジスタ７のオン・オフを制御し、ス
イッチングトランジスタ７がオンしている時は電源１の
エネルギーをコイル４に蓄え、スイッチングトランジス
タ７がオフしている時はそのエネルギーをショットキー
ダイオード５を通してコンデンサ６及び負荷１４に放出
し、出力端子１５が所望の出力電圧になるように制御さ
れるスイッチング電源において、出力端子１５の電圧を
モニタするスタータ回路１３を有し、その出力がパルス
制御回路１１に入力している構成となっている。Embodiments of the semiconductor integrated circuit device according to the present invention will be described below with reference to the drawings. 1 is an embodiment of the present invention, in which an output voltage of an output terminal 15 is divided by a voltage dividing circuit 8 and a voltage of a reference voltage 9 is input to an error amplifier 12.
And the pulse output from the oscillator circuit 10 outputs the desired pulse to the gate input of the switching transistor 7,
The switching transistor 7 is controlled to be turned on / off, the energy of the power source 1 is stored in the coil 4 when the switching transistor 7 is turned on, and the energy is stored through the Schottky diode 5 when the switching transistor 7 is turned off. 6 and the load 14, and a switching power supply in which the output terminal 15 is controlled so as to have a desired output voltage, has a starter circuit 13 for monitoring the voltage of the output terminal 15, and its output is supplied to the pulse control circuit 11. The configuration is input.
【０００７】次に、図１において動作を説明する。スイ
ッチ１８によって、電源１が回路に投入されると、電源
投入時は出力端子１５の電位は十分低いため、基準電圧
９に比べて電圧分割回路８の電圧分圧出力端子１７の電
圧は十分低い。従って、パルス制御回路１１から出力さ
れるパルス巾は通常は回路構成上得られるパルスの最大
パルス巾となり、スイッチングトランジスタ７のオン時
間が最も長くなる。すると、電源１からコイル４及びス
イッチングトランジスタ７を通して流れる突入電流が多
くなり、電源１の内部抵抗２が高いとここでの電圧降下
が大きくなって、構成される回路にかかる電圧が低くな
ってしまい、動作電圧以下まで下がってしまうと永久に
立ち上がらなくなってしまう。Next, the operation will be described with reference to FIG. When the power supply 1 is turned on by the switch 18, the potential of the output terminal 15 is sufficiently low when the power is turned on, so the voltage of the voltage division output terminal 17 of the voltage dividing circuit 8 is sufficiently lower than the reference voltage 9. . Therefore, the pulse width output from the pulse control circuit 11 is usually the maximum pulse width of the pulse obtained from the circuit configuration, and the ON time of the switching transistor 7 is the longest. Then, the rush current flowing from the power supply 1 through the coil 4 and the switching transistor 7 increases, and if the internal resistance 2 of the power supply 1 is high, the voltage drop here becomes large, and the voltage applied to the configured circuit becomes low. , If it drops below the operating voltage, it will not stand up forever.
【０００８】しかし、本発明では、出力端子１５の出力
電圧がある所望の電圧に達していない時はスタータ回路
１３の出力はある論理（たとえばハイレベル）を出力
し、また、出力端子１５の出力電圧が前記所望の電圧に
達した時はスタータ回路１３の出力は前記論理と逆の論
理（たとえばローレベル）を出力するスタータ回路の出
力端子１６がパルス制御回路１１に入力しているため、
パルス制御回路は前記論理結果によって出力端子１５の
出力電圧が前記所望の電圧に達していない間はエラーア
ンプ１２の出力にかかわらずスイッチングトランジスタ
７のゲートに入力されるパルスが常に短いパルス巾とな
るように制御している。However, according to the present invention, when the output voltage of the output terminal 15 does not reach a desired voltage, the output of the starter circuit 13 outputs a certain logic (for example, high level), and the output of the output terminal 15 When the voltage reaches the desired voltage, the output of the starter circuit 13 outputs the logic opposite to the logic described above (for example, low level) because the output terminal 16 of the starter circuit is input to the pulse control circuit 11.
In the pulse control circuit, the pulse input to the gate of the switching transistor 7 always has a short pulse width regardless of the output of the error amplifier 12 while the output voltage of the output terminal 15 does not reach the desired voltage according to the logic result. Are controlled.
【０００９】従って、電源立ち上げ時は出力端子１５の
出力電圧はまだ前記所望の電圧に達していないため、ス
イッチトランジスタ７のゲートに入力されるパルスのパ
ルス巾は短いので、スイッチトランジスタ７のオン時間
は短くなり、前記突入電流も小さくなる。すると、電源
１の内部抵抗２が多少高くても内部抵抗２における電圧
降下は小さく抑えられるので本発明で構成される回路に
かかる電圧は小さくならないので、確実に出力を立ち上
げることができる。出力端子１５の出力電圧が前記所望
の電圧に達した時には、パルス制御回路は通常のパルス
制御を行うようになっている。基準電圧９をゆっくり立
ち上げるようなスロースタート回路は用いていないの
で、出力電圧の立ち上がりが遅くなることもない。Therefore, when the power is turned on, the output voltage of the output terminal 15 has not reached the desired voltage yet, and the pulse width of the pulse input to the gate of the switch transistor 7 is short, so that the switch transistor 7 is turned on. The time becomes shorter and the inrush current also becomes smaller. Then, even if the internal resistance 2 of the power supply 1 is somewhat high, the voltage drop in the internal resistance 2 can be suppressed to a small level, and the voltage applied to the circuit configured by the present invention does not decrease, so that the output can be reliably started up. When the output voltage of the output terminal 15 reaches the desired voltage, the pulse control circuit performs normal pulse control. Since the slow start circuit that slowly raises the reference voltage 9 is not used, the output voltage does not rise slowly.
【００１０】図２の実施例は、図１の実施例において、
スタータ回路の出力端子１６ａがパルス制御回路１１に
入力する代わりに発振回路１０に入力したもので、出力
端子１５の出力電圧が前記所望の電圧に達していない間
は発振回路の発振周波数が高くなるようにして、短いパ
ルス巾のパルスが発振回路１０からパルス制御回路１１
に入力することによって、スイッチングトランジスタ７
のゲートに入力されるパルスのパルス巾が短くなるよう
にしたものである。この場合も図１の実施例と同様に、
電源立ち上げ時の突入電流は小さく抑えられるので、確
実に出力を立ち上げることができる。出力端子１５の出
力電圧が前記所望の電圧に達した時には、発振回路の周
波数は通常の周波数となる。The embodiment of FIG. 2 is the same as the embodiment of FIG.
The output terminal 16a of the starter circuit is input to the oscillation circuit 10 instead of being input to the pulse control circuit 11, and the oscillation frequency of the oscillation circuit increases while the output voltage of the output terminal 15 does not reach the desired voltage. In this way, a pulse having a short pulse width is transmitted from the oscillation circuit 10 to the pulse control circuit 11
Input to the switching transistor 7
The pulse width of the pulse input to the gate of is shortened. Also in this case, as in the embodiment of FIG.
Since the inrush current when the power is turned on can be suppressed to a low level, the output can be reliably turned on. When the output voltage of the output terminal 15 reaches the desired voltage, the frequency of the oscillator circuit becomes the normal frequency.
【００１１】[0011]
【発明の効果】以上説明したように、この発明は、電源
電圧が低い場合や電源の内部抵抗あるいは配線抵抗が高
い場合でも、スイッチング電源の電源投入時に立ち上げ
時間を遅くすることなく、確実に出力が立ち上がる効果
がある。As described above, according to the present invention, even when the power supply voltage is low or the internal resistance or the wiring resistance of the power supply is high, the startup time can be ensured without delaying the startup time when the switching power supply is turned on. It has the effect of raising the output.
【図１】本発明のスイッチング電源回路の実施例の構成
図である。FIG. 1 is a configuration diagram of an embodiment of a switching power supply circuit of the present invention.
【図２】本発明のスイッチング電源回路の他の実施例の
構成図である。FIG. 2 is a configuration diagram of another embodiment of the switching power supply circuit of the present invention.
１ 電源 ２ 電源の内部抵抗 ３ コンデンサ ４ コイル ５ ショットキーダイオード ６ コンデンサ ７ スイッチングトタンジスタ ８ 電圧分割回路 ９ 基準電圧 １０ 発振回路 １１ パルス制御回路 １２ エラーアンプ １３ スタータ回路 １４ 負荷 １５ 出力端子 １６、１６ａ スタータ回路の出力端子 １７ 電圧分圧出力端子 １８ スイッチ 1 power supply 2 internal resistance of power supply 3 capacitor 4 coil 5 Schottky diode 6 capacitor 7 switching transistor 8 voltage division circuit 9 reference voltage 10 oscillation circuit 11 pulse control circuit 12 error amplifier 13 starter circuit 14 load 15 output terminal 16, 16a starter Circuit output terminal 17 Voltage division output terminal 18 Switch
Claims (2)
電圧を一定に保つパルス制御回路からなるスイッチング
電源回路において、出力電圧をモニタしてその出力電圧
が所定の電圧をこえると出力の論理が反転するスタータ
回路を設け、前記スタータ回路の出力がスイッチングパ
ルスのパルス巾を制御する前記パルス制御回路に入力
し、出力電圧がある所定の電圧に達していない時は、負
荷にかかわらず常に一定のパルス巾のパルスがパルス前
記制御回路から出力され、出力電圧が所定の電圧に達し
た時には通常のパルス制御が行われることを特徴とする
スイッチング電源回路。1. A switching power supply circuit comprising a pulse control circuit which controls a pulse width according to an output voltage and keeps the output voltage constant, monitors the output voltage, and outputs the output logic when the output voltage exceeds a predetermined voltage. Is provided, and the output of the starter circuit is input to the pulse control circuit that controls the pulse width of the switching pulse, and when the output voltage does not reach a certain voltage, it is always constant regardless of the load. A pulse having a pulse width of 1 is output from the pulse control circuit, and when the output voltage reaches a predetermined voltage, normal pulse control is performed.
波数を変える発振回路を設け、出力電圧がある所定の電
圧に達していない時は、負荷にかかわらず発振周波数を
高くして短いパルス巾の前記パルスが発振回路から出力
され、出力電圧が所定の電圧に達した時には通常の発振
周波数のパルスが前記発振回路から出力されることを特
徴とする請求項１記載のスイッチング電源回路。2. An oscillating circuit that changes the oscillating frequency according to the output of the starter circuit is provided, and when the output voltage does not reach a certain voltage, the oscillating frequency is increased regardless of the load to provide a short pulse width. 2. The switching power supply circuit according to claim 1, wherein the pulse is output from the oscillation circuit, and when the output voltage reaches a predetermined voltage, a pulse having a normal oscillation frequency is output from the oscillation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP08058595A JP3504016B2 (en) | 1995-04-05 | 1995-04-05 | Switching power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP08058595A JP3504016B2 (en) | 1995-04-05 | 1995-04-05 | Switching power supply circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08280170A true JPH08280170A (en) | 1996-10-22 |
| JP3504016B2 JP3504016B2 (en) | 2004-03-08 |
Family
ID=13722432
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP08058595A Expired - Fee Related JP3504016B2 (en) | 1995-04-05 | 1995-04-05 | Switching power supply circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3504016B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100369947B1 (en) * | 1999-04-23 | 2003-02-05 | 엘지전자 주식회사 | Switching power circuit |
| WO2006006407A1 (en) * | 2004-07-14 | 2006-01-19 | Rohm Co., Ltd | Power source device |
| JP2007028732A (en) * | 2005-07-13 | 2007-02-01 | Rohm Co Ltd | Switching circuit and switching power unit |
| JP2007189799A (en) * | 2006-01-12 | 2007-07-26 | Toshiba Corp | Pulse power supply |
| JP2012004253A (en) * | 2010-06-15 | 2012-01-05 | Panasonic Corp | Bidirectional switch, two-wire ac switch, switching power circuit, and method for driving bidirectional switch |
| JP2012085498A (en) * | 2010-10-14 | 2012-04-26 | Asahi Kasei Electronics Co Ltd | Power supply unit |
| JP2018526959A (en) * | 2015-09-04 | 2018-09-13 | クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ | Guaranteed start-up for switch mode power supply |
-
1995
- 1995-04-05 JP JP08058595A patent/JP3504016B2/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100369947B1 (en) * | 1999-04-23 | 2003-02-05 | 엘지전자 주식회사 | Switching power circuit |
| WO2006006407A1 (en) * | 2004-07-14 | 2006-01-19 | Rohm Co., Ltd | Power source device |
| JPWO2006006407A1 (en) * | 2004-07-14 | 2008-04-24 | ローム株式会社 | Power supply |
| JP4843490B2 (en) * | 2004-07-14 | 2011-12-21 | ローム株式会社 | Power supply device and electronic device using the same |
| JP2007028732A (en) * | 2005-07-13 | 2007-02-01 | Rohm Co Ltd | Switching circuit and switching power unit |
| JP2007189799A (en) * | 2006-01-12 | 2007-07-26 | Toshiba Corp | Pulse power supply |
| JP2012004253A (en) * | 2010-06-15 | 2012-01-05 | Panasonic Corp | Bidirectional switch, two-wire ac switch, switching power circuit, and method for driving bidirectional switch |
| JP2012085498A (en) * | 2010-10-14 | 2012-04-26 | Asahi Kasei Electronics Co Ltd | Power supply unit |
| JP2018526959A (en) * | 2015-09-04 | 2018-09-13 | クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ | Guaranteed start-up for switch mode power supply |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3504016B2 (en) | 2004-03-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6738272B2 (en) | Charge pump rush current limiting circuit | |
| JP3048921B2 (en) | Crystal oscillation circuit | |
| US20020075063A1 (en) | Frequency adaptive negative voltage generator | |
| JPH08280170A (en) | Switching power supply circuit | |
| JPH1050088A (en) | Semiconductor device | |
| CN108282160B (en) | System for preventing LDO's power tube produces oscillation when closing | |
| US7535206B2 (en) | Synchronous rectifying type switching regulator control circuit and semiconductor integrated circuit including the same | |
| JPH11353038A (en) | Rush current preventing circuit for power unit | |
| JPH05304729A (en) | Power supply | |
| CN111082655A (en) | Load driving circuit | |
| JP2001306167A (en) | Reference voltage circuit | |
| JP3019847B1 (en) | Power supply circuit | |
| JP5482419B2 (en) | Semiconductor integrated circuit for regulator | |
| KR100250656B1 (en) | Dc motor control circuit | |
| KR100634158B1 (en) | Rush current suppressing device for liquid crystal display module and rush current suppressing method of the same | |
| JPH05207735A (en) | Method and circuit for quickly starting operation of negative-switching voltage regulator | |
| JPH05336736A (en) | Internal voltage generating device for semiconductor integrated circuit | |
| JPH09261024A (en) | Switching circuit | |
| JPH06276699A (en) | Power supply circuit | |
| JPH11275759A (en) | Rush current restraining circuit in electric circuit | |
| JP3346786B2 (en) | Power-on control switching circuit and power-on control method | |
| JPS6226265B2 (en) | ||
| JP2002354791A (en) | Switching power supply load controller | |
| JP2002252968A (en) | Switched capacitor power supply unit | |
| JP2010218360A (en) | Power supply device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20031209 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20031209 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20081219 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091219 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 7 Free format text: PAYMENT UNTIL: 20101219 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101219 Year of fee payment: 7 |
|
| RD03 | Notification of appointment of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: R3D03 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101219 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 8 Free format text: PAYMENT UNTIL: 20111219 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 8 Free format text: PAYMENT UNTIL: 20111219 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 9 Free format text: PAYMENT UNTIL: 20121219 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 10 Free format text: PAYMENT UNTIL: 20131219 |
|
| LAPS | Cancellation because of no payment of annual fees |