JPH08265118A - Delay time stabilizing circuit - Google Patents
Delay time stabilizing circuitInfo
- Publication number
- JPH08265118A JPH08265118A JP7090368A JP9036895A JPH08265118A JP H08265118 A JPH08265118 A JP H08265118A JP 7090368 A JP7090368 A JP 7090368A JP 9036895 A JP9036895 A JP 9036895A JP H08265118 A JPH08265118 A JP H08265118A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- temperature
- delay time
- tpd
- vdd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、システム初期化時に、
温度に対するゲート遅延時間（Ｔｐｄ）の変化特性と、
電源電圧（Ｖｄｄ）に対するＴｐｄの変化特性とを測定
し、その結果を元に作成したテーブルをメモリに記録
し、実動作時は、温度センサからのデバイス温度と前述
したテーブルにより、デバイスのＴｐｄが一定になるよ
うにＶｄｄを変化させ、デバイス全体の遅延時間を一定
にする遅延時間安定化回路に関するものである。BACKGROUND OF THE INVENTION The present invention, when the system is initialized,
Change characteristics of the gate delay time (Tpd) with respect to temperature,
The change characteristic of Tpd with respect to the power supply voltage (Vdd) is measured, and a table created based on the result is recorded in a memory. During actual operation, the device temperature from the temperature sensor and the table described above determine the Tpd of the device. The present invention relates to a delay time stabilizing circuit that changes Vdd so as to keep it constant and makes the delay time of the entire device constant.
【０００２】[0002]
【従来の技術】一般に、ＣＭＯＳやＢＩＣＭＯＳ等のＩ
Ｃは、動作周波数が変化すると発熱量が変化し、ＩＣデ
バイスの内部温度が変化して、半導体ゲートの温度特性
による影響のため、ゲート当たりの遅延時間が変化し、
各信号の位相に変化が生じてしまい、タイミング精度を
劣化させる。このため、ＩＣデバイス内の発熱量を制御
して温度補正を行うことが一般に行われている。2. Description of the Related Art Generally, I such as CMOS or BICMOS is used.
In C, the amount of heat generated changes when the operating frequency changes, the internal temperature of the IC device changes, and the delay time per gate changes due to the influence of the temperature characteristics of the semiconductor gate.
The phase of each signal changes, which deteriorates the timing accuracy. Therefore, it is common practice to control the amount of heat generated in the IC device to perform temperature correction.
【０００３】図４は、従来の温度補正回路の一つの概念
図である。この図に示すように、信号が通過する被安定
回路の近くに、温度センサとヒータを設け、ＩＣ内の温
度制御装置の制御により温度を一定に保っている。FIG. 4 is a conceptual diagram of a conventional temperature correction circuit. As shown in this figure, a temperature sensor and a heater are provided near the stabilized circuit through which the signal passes, and the temperature is kept constant by the control of the temperature control device in the IC.
【０００４】図５に特開平１−１１４０６７に紹介され
ている従来例のブロック図を示している。信号伝播遅延
時間を一定にする回路を含むＩＣチップ２２に、測定遅
延回路２０が内臓されている。この測定遅延回路２０
は、ＩＣチップ２２に内臓されているので、測定遅延回
路２０の伝播遅延時間は、ＩＣチップ２２の温度変化に
応じてＩＣチップ２２内の他の回路と略同様の影響を受
ける。FIG. 5 shows a block diagram of a conventional example introduced in Japanese Patent Laid-Open No. 1-114067. The measurement delay circuit 20 is incorporated in the IC chip 22 including a circuit for keeping the signal propagation delay time constant. This measurement delay circuit 20
Is incorporated in the IC chip 22, the propagation delay time of the measurement delay circuit 20 is affected by the temperature change of the IC chip 22 in substantially the same manner as other circuits in the IC chip 22.
【０００５】ＩＣチップ２２と熱的に結合したヒータ２
４がＩＣチップ２２を選択的に加熱して信号伝播遅延時
間を調整する。ヒータ２４は、ＩＣチップ２２上に他の
回路と共に実装した集積加熱素子であることが望まし
い。また、ヒータ２４は、測定遅延回路２０に比較的近
い位置に設けられるのが普通である。これにより、ヒー
タ２４からの熱により測定遅延回路２０の温度が変化す
るまでの時間的遅れを最小にすることが出来る。金属製
リードフレームを用いている代表的なＩＣチップは、比
較的熱伝導性が良く、ヒータ２４の発生した熱をチップ
内の回路に伝えることが出来る。また、通常プラスチッ
ク製又は、セラミック製の比較的熱絶縁性のあるパッケ
ージ２６がＩＣチップ２２の周囲を覆っている。このパ
ッケージ２６により、ＩＣチップ２２の温度を周囲温度
に対して高くすることが出来る。The heater 2 thermally coupled to the IC chip 22
4 selectively heats the IC chip 22 to adjust the signal propagation delay time. The heater 24 is preferably an integrated heating element mounted on the IC chip 22 together with other circuits. Further, the heater 24 is usually provided at a position relatively close to the measurement delay circuit 20. As a result, the time delay until the temperature of the measurement delay circuit 20 changes due to the heat from the heater 24 can be minimized. A typical IC chip using a metal lead frame has a relatively good thermal conductivity, and can transfer the heat generated by the heater 24 to a circuit in the chip. A package 26, which is usually made of plastic or ceramic and has a relatively heat insulating property, covers the periphery of the IC chip 22. With this package 26, the temperature of the IC chip 22 can be made higher than the ambient temperature.
【０００６】このように、ＩＣチップ２２内の総ての回
路は接近しており、熱伝導性の高い材料で形成されてい
るので、ＩＣチップ２２内の総ての回路は略同一の温度
に維持されている。また、温度及び電圧のような、チッ
プ内の１つの回路の信号伝播遅延時間を変化させる要因
は、同一のチップ内の総ての回路に関して略同一にな
る。従って、例えば測定遅延回路２０のようなチップ内
のどれかの回路の伝播遅延時間を測定し、その情報から
チップの温度を調整することにより、チップ内の総ての
回路の伝播遅延時間を一定に調整することが出来る。As described above, all the circuits in the IC chip 22 are close to each other and are formed of a material having a high thermal conductivity. Therefore, all the circuits in the IC chip 22 are kept at substantially the same temperature. Has been maintained. Also, the factors that change the signal propagation delay time of one circuit in the chip, such as temperature and voltage, are substantially the same for all circuits in the same chip. Therefore, by measuring the propagation delay time of any circuit in the chip such as the measurement delay circuit 20 and adjusting the temperature of the chip from the information, the propagation delay time of all the circuits in the chip is made constant. Can be adjusted.
【０００７】測定遅延回路２０からの伝播遅延時間の測
定情報に基づいて、制御手段３０はヒータ２４を制御す
る。即ち、遅延時間の測定値が所望の値より短いと、ヒ
ータ２４の発生する熱を増加するように制御する。逆
に、測定された伝播遅延時間が所望の値より長いと、ヒ
ータ２４の発生する熱を減少するように制御する。この
ようにして、信号伝播遅延時間が極めて精密に制御され
る。The control means 30 controls the heater 24 based on the measurement information of the propagation delay time from the measurement delay circuit 20. That is, when the measured value of the delay time is shorter than the desired value, the heat generated by the heater 24 is controlled to increase. On the contrary, when the measured propagation delay time is longer than the desired value, the heat generated by the heater 24 is controlled to be reduced. In this way, the signal propagation delay time is controlled very precisely.
【０００８】図５の基準遅延回路３２は、所望の伝播遅
延時間に相当する基準遅延信号を発生する。遅延比較回
路３４が、基準遅延回路３２からの基準遅延信号と測定
遅延回路２０からの測定遅延信号とを比較する。遅延比
較回路３４の出力は、所望の遅延時間と実際に測定され
た遅延時間との時間差に相当する。基準遅延信号及び測
定遅延信号間の関係に基づき、発生する熱をそのまま維
持するか又は調整するようにヒータ制御回路３６からの
信号によりヒータ２４が制御される。マイクロプロセッ
サを含む基準遅延時間設定回路４０が所望の基準遅延信
号を設定する。更に、測定遅延回路２０はテスト信号源
４２からのテスト信号に応じて伝播遅延した信号を発生
する。The reference delay circuit 32 of FIG. 5 generates a reference delay signal corresponding to a desired propagation delay time. The delay comparison circuit 34 compares the reference delay signal from the reference delay circuit 32 and the measurement delay signal from the measurement delay circuit 20. The output of the delay comparison circuit 34 corresponds to the time difference between the desired delay time and the actually measured delay time. Based on the relationship between the reference delay signal and the measurement delay signal, the heater 24 is controlled by a signal from the heater control circuit 36 so as to maintain or adjust the generated heat as it is. A reference delay time setting circuit 40 including a microprocessor sets a desired reference delay signal. Further, the measurement delay circuit 20 generates a signal whose propagation is delayed according to the test signal from the test signal source 42.
【０００９】[0009]
【発明が解決しようとする課題】以上の構成によりヒー
タを制御することで内部回路の伝搬遅延時間を安定させ
ることが可能であるが、常にヒータを動作させなければ
ならないため、消費電力が大きくなるという欠点があ
る。また、放熱のための機構が必要になりコストアップ
になる。本発明は、消費電力を大きくする温度制御によ
らず、温度及び電源電圧に対する遅延時間の変化を測定
して得たテーブルをメモリ内に作成し、温度センサから
のデバイス温度と前述したテーブルにより、ゲートの伝
搬遅延時間を安定させる遅延時間安定化回路を実現する
ことを目的としている。By controlling the heater with the above configuration, it is possible to stabilize the propagation delay time of the internal circuit, but since the heater must be operated at all times, power consumption increases. There is a drawback that. In addition, a mechanism for heat dissipation is required, which increases the cost. The present invention does not rely on temperature control to increase power consumption, creates a table obtained by measuring changes in delay time with respect to temperature and power supply voltage in the memory, and by the device temperature from the temperature sensor and the above-mentioned table, The objective is to realize a delay time stabilization circuit that stabilizes the propagation delay time of a gate.
【００１０】[0010]
【課題を解決するための手段】上記目的を達成するため
に、本発明の遅延時間安定化回路は次のように構成して
いる。つまり、被安定回路１０の電源電圧（Ｖｄｄ）を
変化し制御するＶｄｄ制御回路１５を設け、被安定回路
１０の温度を測定する温度センサ１１を設け、被安定回
路１０の遅延時間を測定するＴｐｄ測定回路１４を設
け、温度及び電源電圧の変動に対する遅延時間を測定と
演算で外挿したＴｐｄ特性テーブル１７を設け、温度セ
ンサ１１で得たデバイス温度とテーブル１７より得たデ
ータでＶｄｄ制御回路１５に設定電圧データを与える演
算回路１６を設けている。また、別の構成として、被安
定回路１０のサブストレイト電圧（Ｖｂｓ）を変化し制
御するＶｂｓ制御回路１９を設け、被安定回路１０の温
度を測定する温度センサ１１を設け、被安定回路１０の
遅延時間を測定するＴｐｄ測定回路１４を設け、温度及
びサブストレイト電圧の変動に対する遅延時間を測定と
演算で外挿したＴｐｄ特性テーブル１８を設け、温度セ
ンサ１１で得たデバイス温度とテーブル１８より得たデ
ータでＶｂｓ制御回路１９に設定電圧データを与える演
算回路１６を設けている。ここで、温度センサ１１は、
温度特性の明らかな抵抗であり、Ｔｐｄ測定回路１４
は、ループオシレータであってもよい。In order to achieve the above object, the delay time stabilizing circuit of the present invention is constructed as follows. That is, the Vdd control circuit 15 that changes and controls the power supply voltage (Vdd) of the stabilized circuit 10 is provided, the temperature sensor 11 that measures the temperature of the stabilized circuit 10 is provided, and the delay time of the stabilized circuit 10 is measured by Tpd. A measurement circuit 14 is provided, and a Tpd characteristic table 17 in which a delay time with respect to variations in temperature and power supply voltage is extrapolated by measurement and calculation is provided, and a device temperature obtained by the temperature sensor 11 and data obtained from the table 17 are used for the Vdd control circuit 15 Is provided with an arithmetic circuit 16 for giving set voltage data. As another configuration, a Vbs control circuit 19 that changes and controls the substrate voltage (Vbs) of the stabilized circuit 10 is provided, and a temperature sensor 11 that measures the temperature of the stabilized circuit 10 is provided. A Tpd measuring circuit 14 for measuring the delay time is provided, and a Tpd characteristic table 18 is provided by extrapolating the delay time with respect to temperature and substrate voltage fluctuations by measurement and calculation, and is obtained from the device temperature obtained by the temperature sensor 11 and the table 18. An arithmetic circuit 16 is provided which gives set voltage data to the Vbs control circuit 19 with the data. Here, the temperature sensor 11 is
It is a resistance with a clear temperature characteristic, and the Tpd measurement circuit 14
May be a loop oscillator.
【００１１】[0011]
【作用】上記のように構成された遅延時間安定化回路に
おいては、消費電力を大きくする温度制御によらず、温
度及び電源電圧に対する遅延時間の変化を測定して得た
Ｔｐｄ特性テーブルをメモリ内に作成し、温度センサか
らのデバイス温度と前述したテーブルにより、ゲートの
伝搬遅延時間を安定させているため、消費電力を増加さ
せることがない。その結果、放熱のための機構が必要で
なくなり、コストアップの要因がなくなる。In the delay time stabilizing circuit configured as described above, the Tpd characteristic table obtained by measuring the change of the delay time with respect to the temperature and the power supply voltage is stored in the memory regardless of the temperature control for increasing the power consumption. The propagation delay time of the gate is stabilized by the device temperature from the temperature sensor and the table described above, so that power consumption is not increased. As a result, a mechanism for radiating heat is not required, and the factor of cost increase is eliminated.
【００１２】[0012]
（実施例１）図１に本発明の一実施例を示す。この回路
は、被安定回路１０の電源電圧（Ｖｄｄ）を変化し制御
するＶｄｄ制御回路１５と、被安定回路１０の温度を測
定する温度センサ１１と、被安定回路１０の遅延時間を
測定するＴｐｄ測定回路１４と、温度及び電源電圧の変
動に対する遅延時間を測定と演算で外挿したテーブル１
７と、温度センサ１１からのデバイス温度とテーブル１
７より得たデータでＶｄｄ制御回路１５に設定電圧デー
タを与える演算回路１６とで構成される。(Embodiment 1) FIG. 1 shows an embodiment of the present invention. This circuit includes a Vdd control circuit 15 that changes and controls the power supply voltage (Vdd) of the stabilized circuit 10, a temperature sensor 11 that measures the temperature of the stabilized circuit 10, and a Tpd that measures the delay time of the stabilized circuit 10. Measurement circuit 14 and table 1 in which the delay time with respect to temperature and power supply voltage fluctuations is extrapolated by measurement and calculation.
7 and the device temperature from the temperature sensor 11 and the table 1
7 and the arithmetic circuit 16 for giving the set voltage data to the Vdd control circuit 15.
【００１３】この回路は次のように動作する。 （１）まず、システム初期化時にＴｐｄ測定回路１４と
温度センサ１１により、温度に対するＴｐｄの変化特性
を測定しメモリに記録する。 （２）続いて、ＶｄｄをＶｄｄ制御回路１５により変化
させ、Ｖｄｄに対するＴｐｄの変化特性を測定しメモリ
に記録する。 （３）測定できない範囲に関しては演算で外挿し、図２
に示すような、温度及び電源電圧を変動値としたＴｐｄ
特性テーブル１７を作成しメモリに記録する。 （４）実動作時は、温度センサ１１からのデバイス温度
とテーブル１７により、デバイスのＴｐｄが一定になる
ようにＶｄｄを変化させる。This circuit operates as follows. (1) First, when the system is initialized, the Tpd measuring circuit 14 and the temperature sensor 11 measure the change characteristic of Tpd with respect to temperature and record it in the memory. (2) Subsequently, Vdd is changed by the Vdd control circuit 15, and the change characteristic of Tpd with respect to Vdd is measured and recorded in the memory. (3) For the range that cannot be measured, extrapolate by calculation, and
Tpd with temperature and power supply voltage as fluctuation values
The characteristic table 17 is created and recorded in the memory. (4) At the time of actual operation, Vdd is changed so that Tpd of the device becomes constant by the device temperature from the temperature sensor 11 and the table 17.
【００１４】（実施例２）図３に本発明の別の実施例を
示す。この回路は、被安定回路１０のサブストレイト電
圧（Ｖｂｓ）を変化し制御するＶｂｓ制御回路１９と、
被安定回路１０の温度を測定する温度センサ１１と、被
安定回路１０の遅延時間を測定するＴｐｄ測定回路１４
と、温度及びサブストレイト電圧の変動に対する遅延時
間を測定と演算で外挿したテーブル１８と、温度センサ
１１からのデバイス温度とテーブル１８より得たデータ
でＶｂｓ制御回路１９に設定電圧データを与える演算回
路１６とで構成される。この回路の動作は、実施例１の
ＶｄｄをＶｂｓに置き換える以外は、実施例１と同じで
ある。(Embodiment 2) FIG. 3 shows another embodiment of the present invention. This circuit includes a Vbs control circuit 19 that changes and controls the substitute voltage (Vbs) of the stabilized circuit 10.
A temperature sensor 11 for measuring the temperature of the stabilized circuit 10 and a Tpd measuring circuit 14 for measuring the delay time of the stabilized circuit 10.
And a table 18 in which a delay time with respect to temperature and substrate voltage fluctuations is extrapolated by measurement and calculation, and a device temperature from the temperature sensor 11 and a calculation for giving set voltage data to the Vbs control circuit 19 by data obtained from the table 18. And a circuit 16. The operation of this circuit is the same as that of the first embodiment except that Vdd in the first embodiment is replaced with Vbs.
【００１５】なお、以上の回路において、温度センサ１
１として温度特性の明らかな抵抗や温度特性が明らかな
ダイオードフォワード特性が、また、Ｔｐｄ測定回路１
４としてループオシレータや高速カウンタが利用でき
る。In the above circuit, the temperature sensor 1
1, the resistance having a clear temperature characteristic and the diode forward characteristic having a clear temperature characteristic, and the Tpd measuring circuit 1
A loop oscillator or a high speed counter can be used as 4.
【００１６】[0016]
【発明の効果】本発明は、以上説明したように構成され
ているので、以下に記載されるような効果を奏する。つ
まり、消費電力を大きくする温度制御によらず、温度及
び電源電圧に対する遅延時間の変化を測定して得たＴｐ
ｄ特性テーブルをメモリ内に作成し、温度センサからの
デバイス温度と前述したテーブルにより、ゲートの伝搬
遅延時間を安定させているため、消費電力を増加させる
ことがない。また、その結果、放熱のための機構が必要
でなくなり、コストアップの要因がなくなる効果があ
る。Since the present invention is configured as described above, it has the following effects. That is, Tp obtained by measuring the change in the delay time with respect to the temperature and the power supply voltage, regardless of the temperature control for increasing the power consumption.
Since the d characteristic table is created in the memory and the propagation delay time of the gate is stabilized by the device temperature from the temperature sensor and the above-mentioned table, power consumption is not increased. Further, as a result, there is an effect that a mechanism for heat dissipation is not needed and a factor of cost increase is eliminated.
【図１】本発明の一実施例を示す回路ブロック図であ
る。FIG. 1 is a circuit block diagram showing an embodiment of the present invention.
【図２】本発明のＴｐｄ特性テーブルの説明図である。FIG. 2 is an explanatory diagram of a Tpd characteristic table of the present invention.
【図３】本発明の別の実施例を示す回路ブロック図であ
る。FIG. 3 is a circuit block diagram showing another embodiment of the present invention.
【図４】従来の温度補正回路の概念図である。FIG. 4 is a conceptual diagram of a conventional temperature correction circuit.
【図５】従来の温度補正回路の一例を示す回路ブロック
図である。FIG. 5 is a circuit block diagram showing an example of a conventional temperature correction circuit.
１０ 被安定回路 １１ 温度センサ １２ 温度制御装置 １３ ヒータ １４ Ｔｐｄ測定回路 １５ Ｖｄｄ制御回路 １６ 演算回路 １７、１８ テーブル １９ Ｖｂｓ制御回路 ２０ 測定遅延回路 ２２ ＩＣチップ ２４ ヒータ ２６ パッケージ ３０ 制御手段 ３２ 基準遅延回路 ３４ 遅延比較回路 ３６ ヒータ制御回路 ４０ 基準遅延時間設定回路 ４２ テスト信号源 10 Stabilized Circuit 11 Temperature Sensor 12 Temperature Controller 13 Heater 14 Tpd Measurement Circuit 15 Vdd Control Circuit 16 Arithmetic Circuit 17, 18 Table 19 Vbs Control Circuit 20 Measurement Delay Circuit 22 IC Chip 24 Heater 26 Package 30 Control Means 32 Reference Delay Circuit 34 Delay Comparison Circuit 36 Heater Control Circuit 40 Reference Delay Time Setting Circuit 42 Test Signal Source
Claims (4)
ｄ）を変化し制御するＶｄｄ制御回路（１５）を設け、 被安定回路（１０）の温度を測定する温度センサ（１
１）を設け、 被安定回路（１０）の遅延時間を測定するＴｐｄ測定回
路（１４）を設け、 温度及び電源電圧の変動に対する遅延時間を測定と演算
で外挿したＴｐｄ特性テーブル（１７）を設け、 温度センサ（１１）で得たデバイス温度とテーブル（１
７）より得たデータでＶｄｄ制御回路（１５）に設定電
圧データを与える演算回路（１６）を設けた、ことを特
徴とする遅延時間安定化回路。1. A power supply voltage (Vd) of a stabilized circuit (10).
The temperature sensor (1) for measuring the temperature of the stabilized circuit (10) is provided with the Vdd control circuit (15) for changing and controlling d).
1) is provided, a Tpd measurement circuit (14) for measuring the delay time of the stabilized circuit (10) is provided, and a Tpd characteristic table (17) is obtained by extrapolating the delay time with respect to temperature and power supply voltage variations by measurement and calculation. The device temperature and the table (1) obtained by the temperature sensor (11) are provided.
7. A delay time stabilizing circuit characterized in that an arithmetic circuit (16) for giving set voltage data to a Vdd control circuit (15) is provided with the data obtained from 7).
圧（Ｖｂｓ）を変化し制御するＶｂｓ制御回路（１９）
を設け、 被安定回路（１０）の温度を測定する温度センサ（１
１）を設け、 被安定回路（１０）の遅延時間を測定するＴｐｄ測定回
路（１４）を設け、 温度及びサブストレイト電圧の変動に対する遅延時間を
測定と演算で外挿したＴｐｄ特性テーブル（１８）を設
け、 温度センサ（１１）で得たデバイス温度とテーブル（１
８）より得たデータでＶｂｓ制御回路（１９）に設定電
圧データを与える演算回路（１６）を設けた、ことを特
徴とする遅延時間安定化回路。2. A Vbs control circuit (19) for changing and controlling the substitute voltage (Vbs) of the stabilized circuit (10).
And a temperature sensor (1) for measuring the temperature of the stabilized circuit (10).
1) is provided, and a Tpd measuring circuit (14) for measuring the delay time of the stabilized circuit (10) is provided. The device temperature obtained by the temperature sensor (11) and the table (1
8. A delay time stabilizing circuit, characterized in that an arithmetic circuit (16) for giving set voltage data to a Vbs control circuit (19) is provided with the data obtained from 8).
かな抵抗であることを特徴とする請求項１及び請求項２
記載の遅延時間安定化回路。3. The temperature sensor (11) is a resistance having a clear temperature characteristic, and the temperature sensor (11) is characterized in that:
The described delay time stabilizing circuit.
レータであることを特徴とする請求項１、請求項２及び
請求項３記載の遅延時間安定化回路。4. The delay time stabilizing circuit according to claim 1, 2, or 3, wherein the Tpd measuring circuit (14) is a loop oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7090368A JPH08265118A (en) | 1995-03-23 | 1995-03-23 | Delay time stabilizing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7090368A JPH08265118A (en) | 1995-03-23 | 1995-03-23 | Delay time stabilizing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08265118A true JPH08265118A (en) | 1996-10-11 |
Family
ID=13996617
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7090368A Withdrawn JPH08265118A (en) | 1995-03-23 | 1995-03-23 | Delay time stabilizing circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08265118A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016138799A (en) * | 2015-01-27 | 2016-08-04 | 株式会社ソシオネクスト | Semiconductor integrated circuit device and semiconductor integrated circuit device testing method |
| US10720908B2 (en) | 2018-12-20 | 2020-07-21 | Fujitsu Limited | Control circuit and control method |
-
1995
- 1995-03-23 JP JP7090368A patent/JPH08265118A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016138799A (en) * | 2015-01-27 | 2016-08-04 | 株式会社ソシオネクスト | Semiconductor integrated circuit device and semiconductor integrated circuit device testing method |
| US10720908B2 (en) | 2018-12-20 | 2020-07-21 | Fujitsu Limited | Control circuit and control method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20020604 |