JPH08264945A - Low-temperature burned ceramic multilayered circuit board - Google Patents

Low-temperature burned ceramic multilayered circuit board

Info

Publication number
JPH08264945A
JPH08264945A JP7062311A JP6231195A JPH08264945A JP H08264945 A JPH08264945 A JP H08264945A JP 7062311 A JP7062311 A JP 7062311A JP 6231195 A JP6231195 A JP 6231195A JP H08264945 A JPH08264945 A JP H08264945A
Authority
JP
Japan
Prior art keywords
conductor
firing
ceramic multilayer
temperature
low temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7062311A
Other languages
Japanese (ja)
Other versions
JP3076214B2 (en
Inventor
Junzo Fukuda
順三 福田
Hideaki Araki
英明 荒木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Metal SMI Electronics Device Inc
Original Assignee
Sumitomo Metal SMI Electronics Device Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal SMI Electronics Device Inc filed Critical Sumitomo Metal SMI Electronics Device Inc
Priority to JP07062311A priority Critical patent/JP3076214B2/en
Publication of JPH08264945A publication Critical patent/JPH08264945A/en
Application granted granted Critical
Publication of JP3076214B2 publication Critical patent/JP3076214B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE: To improve an Ag-Au joint in reliability and to simplify a joint forming process. CONSTITUTION: Viaholes 13 are bored in a green sheet 12 which contains 60% CaO-SiO2 -Al2 O3 -B2 O3 glass powder by weight and 40% alumina powder by weight, Ag conductor paste (via) 14 is applied in the viaholes 13, and inner conductors 15 of Ag are provided by printing. Green sheets 12 are placed, thermocompressed, and burned at low temperatures into a ceramic multilayer board 11. An Au conductor 16 is screen-printed on the surface of the ceramic multilayer board 11 by the use of Au conductor paste which is capable of being burned below a temperature of 750 deg.C so as to be bonded to the vias 14. Thereafter, the ceramic multilayer board 11 is burned in a usual electrical continuous belt even in an oxidizing atmosphere (air) under such conditions that temperature is kept below 750 deg.C and the board 11 is held for ten minutes, whereby the surface Au conductor 16 on the surface of the ceramic multilayer board 11 is burned at low temperatures.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、Ag系の内層導体及び
ビアを低温焼成セラミックと同時焼成して成る低温焼成
セラミック多層回路基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a low temperature fired ceramic multilayer circuit board formed by co-firing Ag-based inner layer conductors and vias with low temperature fired ceramics.

【0002】[0002]

【従来の技術】Ag系の配線導体は、導通抵抗が小さく
電気的特性に優れているが、融点がアルミナ基板等の一
般的なセラミック基板の焼成温度(1600℃前後)よ
りも低いため、アルミナ基板等にはAg系の配線導体を
使用できない。このため、アルミナ基板等では配線導体
として高融点のWやMoを用いているが、これらの高融
点金属は導通抵抗が大きく、しかも、酸化防止のために
還元雰囲気中で高温焼成しなければならないという欠点
がある。
2. Description of the Related Art An Ag-based wiring conductor has a low conduction resistance and excellent electrical characteristics, but since its melting point is lower than the firing temperature (around 1600 ° C.) of a general ceramic substrate such as an alumina substrate, Ag-based wiring conductors cannot be used for substrates and the like. For this reason, high melting point W and Mo are used as the wiring conductor in the alumina substrate and the like. However, these high melting point metals have a large conduction resistance and must be fired at a high temperature in a reducing atmosphere to prevent oxidation. There is a drawback that.

【0003】そこで、本出願人は、特公平3−5326
9号公報に示すように、Ag系導体の融点以下の温度
(800〜1000℃)の空気中で焼成できる低温焼成
セラミック多層回路基板を開発し、この低温焼成セラミ
ック多層回路基板にAg系の内層導体を同時焼成するよ
うにしている。この場合、Ag系導体は特定条件下でマ
イグレーションを生じるため、耐マイグレーション性が
要求される基板表面の電極部等には、耐マイグレーショ
ン性に優れたAu系導体をAg系導体上に成膜する必要
がある。現在、使用されている通常のAu系導体は、8
50℃前後で焼成する必要があるため、このAu系導体
をAg系導体上に直接印刷して850℃前後で焼成する
と、カーケンドール効果によりAg原子がAu系導体中
に拡散して接合界面に多数の空孔が発生し、接合部の信
頼性を低下させてしまう。
Therefore, the applicant of the present invention has filed Japanese Patent Publication No. 3326/1993.
As shown in Japanese Patent Publication No. 9, a low-temperature fired ceramic multilayer circuit board that can be fired in air at a temperature (800 to 1000 ° C.) below the melting point of an Ag-based conductor has been developed, and an Ag-based inner layer is added to this low-temperature fired ceramic multilayer circuit board. The conductors are simultaneously fired. In this case, since the Ag-based conductor causes migration under a specific condition, an Au-based conductor having excellent migration resistance is formed on the Ag-based conductor in an electrode portion or the like on the surface of the substrate where migration resistance is required. There is a need. The usual Au-based conductor currently used is 8
Since it is necessary to fire at around 50 ° C., if this Au-based conductor is directly printed on the Ag-based conductor and fired at around 850 ° C., Ag atoms diffuse into the Au-based conductor due to the Kirkendall effect and form a bond interface. A large number of holes are generated, which reduces the reliability of the joint.

【0004】これを防ぐために、本出願人は、特公平5
−69319号公報に示すように、Ag系導体とAu系
導体との間にNi,Cr,Ti等の中間金属層をメッ
キ,スパッタ等により形成し、Ag原子がAu系導体中
に拡散することを中間金属層により防いで、Ag−Au
接合部の信頼性を向上させるようにしている。
In order to prevent this, the applicant of the present invention has proposed Japanese Patent Publication No.
As disclosed in JP-69319-A, an intermediate metal layer of Ni, Cr, Ti or the like is formed between an Ag-based conductor and an Au-based conductor by plating, sputtering, etc., and Ag atoms are diffused in the Au-based conductor. Is prevented by an intermediate metal layer, and Ag-Au
The reliability of the joint is improved.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、Ag系
導体とAu系導体との間にNi,Cr,Ti等の中間金
属層を介在させる構成とすると、中間金属層をコストの
かかるメッキ,スパッタにより形成しなければならず、
コスト高になってしまう。そこで、中間金属層を厚膜印
刷法で形成することも考えられるが、Niの焼成は酸化
防止のためにN2雰囲気中で行う必要があり、やはりコ
スト高になってしまう。
However, when an intermediate metal layer of Ni, Cr, Ti or the like is interposed between the Ag-based conductor and the Au-based conductor, the intermediate metal layer is subjected to costly plating and sputtering. Must be formed,
The cost will be high. Therefore, it is conceivable to form the intermediate metal layer by a thick film printing method, but the firing of Ni needs to be performed in an N 2 atmosphere to prevent oxidation, which also increases the cost.

【0006】また、中間金属層上にAu系導体の厚膜を
焼成した後、抵抗等の他の回路素子を形成するために、
800〜900℃程度の焼成を繰り返し行うと、Ag−
Au接合部に断線等が生じることがあり、Ag−Au接
合部の信頼性にも今一歩の向上が望まれていた。
In order to form another circuit element such as a resistor after firing a thick film of an Au-based conductor on the intermediate metal layer,
Repeated firing at about 800 to 900 ° C results in Ag-
There is a case where a wire breakage occurs in the Au joint portion, and it has been desired to improve the reliability of the Ag—Au joint portion one step further.

【0007】更に、例えばRuO2 系抵抗を焼成した
後、Au系の表層導体を850℃前後で焼成すると、R
uO2 系抵抗の抵抗値がドリフトしやすく、また、予め
Ag−Cu接合が形成されている基板では、Au系の表
層導体の焼成温度(850℃前後)がAg−Cu接合の
共晶点776℃を越えてしまい、Au系の表層導体を後
付けできないというという問題もあった。
Further, for example, after firing the RuO 2 system resistor and firing the Au system surface layer conductor at around 850 ° C., R
In a substrate in which the resistance value of the uO 2 system resistor is apt to drift, and in a substrate in which an Ag—Cu junction is formed in advance, the firing temperature (around 850 ° C.) of the Au-based surface layer conductor is the eutectic point 776 of the Ag—Cu junction. There is also a problem that the temperature exceeds ℃ and the Au-based surface layer conductor cannot be attached later.

【0008】本発明はこのような事情を考慮してなされ
たものであり、従ってその目的は、製造のプロセスを簡
単化して低コスト化を実現できると共に、Ag−Au接
合部の信頼性も向上することができ、しかも、Au系導
体の焼成温度が高いことに起因する上述した各種の問題
を解決できる低温焼成セラミック多層回路基板を提供す
ることにある。
The present invention has been made in consideration of such circumstances, and therefore an object thereof is to simplify the manufacturing process and realize cost reduction, and also improve the reliability of the Ag-Au joint. It is an object of the present invention to provide a low temperature fired ceramic multi-layer circuit board which can achieve the above-mentioned problems and can solve the above-mentioned various problems caused by the high firing temperature of the Au-based conductor.

【0009】[0009]

【課題を解決するための手段】上述した目的を達成する
ために、本発明の低温焼成セラミック多層回路基板は、
Ag系の内層導体及びAg系のビアを低温焼成セラミッ
クと同時焼成したものであって、前記Ag系のビアに接
合する表層導体の少なくとも一部を、焼成後の基板表面
に低温焼成用のAu系導体を印刷して750℃以下の低
温度で焼成して形成している(請求項1)。この場合、
低温焼成セラミックは、CaO−SiO2 −Al2 3
−B2 3系ガラス粉末とAl2 3 粉末との混合物を
用いると良い(請求項2)。
In order to achieve the above-mentioned object, a low temperature fired ceramic multilayer circuit board of the present invention comprises:
An Ag-based inner layer conductor and an Ag-based via are co-fired with a low-temperature fired ceramic, and at least a part of a surface layer conductor joined to the Ag-based via is placed on a surface of a substrate after firing, and is Au for low-temperature firing. It is formed by printing a system conductor and firing it at a low temperature of 750 ° C. or lower (Claim 1). in this case,
Low temperature co-fired ceramic, CaO-SiO 2 -Al 2 O 3
-B 2 O 3 system may the use of a mixture of glass powder and Al 2 O 3 powder (claim 2).

【0010】[0010]

【作用】本発明の低温焼成セラミック多層回路基板は、
Ag系のビアに接合する表層導体の少なくとも一部をA
u系導体で形成するものであるが、ここで用いるAu系
導体は、従来のAu系導体とは異なり、750℃以下の
低温度で焼成可能なAu系導体を用いる。この低温焼成
用のAu系導体は、Au粉体の微粒化等による易焼結性
Au粉を採用したり、低融点フリットを採用すること
で、焼成温度を低温化したものである。このような低温
焼成用のAu系導体を焼成後の基板表面に印刷して75
0℃以下の低温度で焼成すれば、Ag原子がAu系導体
中に拡散するカーケンドール効果が抑えられて、接合界
面に空孔が発生せず、Ag−Au接合部の信頼性が向上
する。
The low temperature fired ceramic multilayer circuit board of the present invention is
At least a part of the surface conductor to be joined to the Ag-based via is A
The Au-based conductor used here is, unlike the conventional Au-based conductor, an Au-based conductor that can be fired at a low temperature of 750 ° C. or lower. The Au-based conductor for low-temperature firing has a low firing temperature by using easily sinterable Au powder obtained by atomizing Au powder or by using a low melting point frit. 75 such an Au-based conductor for low temperature firing is printed on the surface of the substrate after firing.
By firing at a low temperature of 0 ° C. or lower, the Kirkendall effect in which Ag atoms diffuse into the Au-based conductor is suppressed, voids are not generated at the bonding interface, and the reliability of the Ag-Au bonding portion is improved. .

【0011】また、低温焼成セラミックとして、CaO
−SiO2 −Al2 3 −B2 3系ガラス粉末とAl
2 3 粉末との混合物を用いると、焼成過程においてア
ノーサイト若しくはアノーサイト+ケイ酸カルシウムの
部分結晶化を起こさせて、酸化雰囲気(空気)中で80
0〜1000℃の低温焼成を可能にするだけでなく、焼
成過程における微細パターンのずれを上述した部分結晶
化により抑えながら、焼成時間の短時間化が可能とな
る。
Further, CaO is used as a low temperature fired ceramic.
-SiO 2 -Al 2 O 3 -B 2 O 3 based glass powder and Al
If a mixture with 2 O 3 powder is used, partial crystallization of anorthite or anorthite + calcium silicate occurs in the firing process, and 80% in an oxidizing atmosphere (air).
Not only is it possible to perform low temperature firing at 0 to 1000 ° C., but it is also possible to shorten the firing time while suppressing the deviation of the fine pattern in the firing process by the above-described partial crystallization.

【0012】[0012]

【実施例】まず、本発明の実施例1における低温焼成セ
ラミック多層回路基板の構成を図1に基づいて説明す
る。セラミック多層基板11は、後述する組成の低温焼
成用のグリーンシート12を複数枚積層して焼成して一
体化したものである。各層のグリーンシート12の所定
位置には、0.05〜1.00mmφ程度のビアホール
13が打ち抜き形成され、層間を電気的に接続できるよ
うに、各ビアホール13にAg系導体ペースト(ビア)
14が充填されている。更に、表層を除く各層のグリー
ンシート12の表面には、ビア14と同じAg系導体ペ
ーストで内層導体15がスクリーン印刷されている。こ
れらAg系導体のビア14と内層導体15は、グリーン
シート12の積層体と同時焼成されている。
EXAMPLE First, the structure of a low temperature fired ceramic multilayer circuit board in Example 1 of the present invention will be described with reference to FIG. The ceramic multilayer substrate 11 is formed by laminating a plurality of green sheets 12 for low temperature firing having a composition described later and firing them to integrate them. A via hole 13 of about 0.05 to 1.00 mmφ is punched at a predetermined position of the green sheet 12 of each layer, and an Ag-based conductor paste (via) is formed in each via hole 13 so that the layers can be electrically connected.
14 are filled. Furthermore, the inner layer conductor 15 is screen-printed on the surface of the green sheet 12 of each layer except the surface layer with the same Ag-based conductor paste as the via 14. The via 14 and the inner conductor 15 of the Ag-based conductor are co-fired with the laminated body of the green sheets 12.

【0013】一方、セラミック多層基板11の表面に形
成するAu系の表層導体16は、焼成後のセラミック多
層基板11の表面に低温焼成用のAu系導体ペーストを
スクリーン印刷して750℃以下の低温度で焼成したも
のであり、このAu系の表層導体16が基板表面に出た
Ag系のビア14に接合されている。このAu系の表層
導体16上には、半導体チップ18がダイボンディング
され、この半導体チップ18上面の電極とAu系の表層
導体16とが金線等のボンディングワイヤ19で接続さ
れている。
On the other hand, the Au-based surface layer conductor 16 formed on the surface of the ceramic multi-layer substrate 11 is screen-printed with Au-based conductor paste for low temperature firing on the surface of the fired ceramic multi-layer substrate 11 to reduce the temperature to 750 ° C. or lower. The Au-based surface conductor 16 is fired at a temperature, and is joined to the Ag-based via 14 exposed on the substrate surface. A semiconductor chip 18 is die-bonded on the Au-based surface conductor 16, and electrodes on the upper surface of the semiconductor chip 18 and the Au-based surface conductor 16 are connected by bonding wires 19 such as gold wires.

【0014】次に、上記構成の低温焼成セラミック多層
回路基板の製造方法を説明する。まず、CaO18.2
重量%、Al2 3 18.2重量%、SiO2 54.5
重量%及びB2 3 9.1重量%を含む混合物を145
0℃で溶融してガラス化した後、水中で急冷しこれを粉
砕して平均粒径が3〜3.5μmのCaO−SiO2
Al2 3 −B2 3 系ガラス粉末を作製する。このガ
ラス粉末60重量%と平均粒径1.2μmのアルミナ粉
末40重量%とを混合したセラミック絶縁体用混合粉末
に溶剤(例えばトルエン、キシレン)、バインダー(例
えばアクリル樹脂)及び可塑性(例えばDOP)を加
え、充分混練して粘度2000〜40000cpsのス
ラリーを作製し、通常のドクターブレード法を用いて厚
み0.4mmのグリーンシート12を作製する。
Next, a method of manufacturing the low temperature fired ceramic multilayer circuit board having the above-mentioned structure will be described. First, CaO 18.2
% By weight, Al 2 O 3 18.2% by weight, SiO 2 54.5
145 with a mixture containing 1% by weight and 9.1% by weight B 2 O 3.
After melting and vitrifying at 0 ° C., it was rapidly cooled in water and crushed to obtain CaO—SiO 2 — having an average particle size of 3 to 3.5 μm.
Producing Al 2 O 3 -B 2 O 3 based glass powder. 60% by weight of this glass powder and 40% by weight of alumina powder having an average particle size of 1.2 μm are mixed with a mixed powder for a ceramic insulator, a solvent (eg toluene, xylene), a binder (eg acrylic resin) and a plasticity (eg DOP). Is added and sufficiently kneaded to prepare a slurry having a viscosity of 2000 to 40,000 cps, and a green sheet 12 having a thickness of 0.4 mm is prepared by using an ordinary doctor blade method.

【0015】この後、打抜き型やパンチングマシーン等
を用いて、このグリーンシート12を例えば30mm角
に切断すると共に、所定位置に例えば0.3mmφのビ
アホール13を打ち抜き形成する。予め、Ag粉末にバ
インダー(例えばエチルセルローズ)と溶剤(例えばテ
ルピオネール)を加え、これらを充分混練して作製した
Ag系導体ペースト14を上記ビアホール13に充填
し、同じAg系導体ペーストを使用して内層導体15を
スクリーン印刷する。同様の方法で、複数枚のグリーン
シート12にAg系導体の内層導体15を順次印刷し
(但し表層のグリーンシート12にはAg系導体を印刷
しない)、これら複数枚のグリーンシート12を積層
し、この積層体を例えば80〜150℃、50〜250
kg/cm2 の条件で熱圧着して一体化する。次いで、
この積層体を通常の電気式連続ベルト炉を使用して、8
00〜1000℃(好ましくは900℃)、20分ホー
ルドの条件で酸化雰囲気(空気)中で焼成して、セラミ
ック多層基板11を作製する。このセラミック多層基板
11に同時焼成されたAg系導体(ビア14と内層導体
15)の導通抵抗は2.4mΩ/□と小さかった。
Thereafter, the green sheet 12 is cut into, for example, a 30 mm square by using a punching die or a punching machine, and a via hole 13 of 0.3 mmφ is punched and formed at a predetermined position. A binder (for example, ethyl cellulose) and a solvent (for example, terpionel) were added to Ag powder in advance, and the Ag-based conductor paste 14 prepared by sufficiently kneading these was filled in the via hole 13 and the same Ag-based conductor paste was used. Then, the inner layer conductor 15 is screen-printed. In the same manner, the inner layer conductors 15 of Ag-based conductors are sequentially printed on the plurality of green sheets 12 (however, the Ag-based conductors are not printed on the surface green sheet 12), and the plurality of green sheets 12 are laminated. , This laminated body is, for example, 80 to 150 ° C., 50 to 250
It is integrated by thermocompression bonding under the condition of kg / cm 2 . Then
This laminate was placed in a conventional electric continuous belt furnace for 8
The ceramic multi-layer substrate 11 is manufactured by firing in an oxidizing atmosphere (air) under a condition of holding at 20 to 1000 ° C. (preferably 900 ° C.) for 20 minutes. The conduction resistance of the Ag-based conductor (via 14 and inner layer conductor 15) co-fired on this ceramic multilayer substrate 11 was as low as 2.4 mΩ / □.

【0016】上述したようにして低温焼成されたセラミ
ック多層基板11表面に、低温焼成用のAu系導体ペー
ストを使用してAu系の表層導体16を基板表面のAg
系のビア14に接合させるようにスクリーン印刷する。
ここで使用する低温焼成用のAu系導体ペーストは、7
50℃以下の低温度で焼成可能なAu系導体ペースト
(例えば田中貴金属インターナショナル株式会社製の商
品名「TR−140S」)を用いる。この低温焼成用の
Au系導体ペーストは、Au粉体の微粒化等による易焼
結性Au粉を採用したり、低融点フリットを採用するこ
とで、焼成温度を低温化したものである。表層導体16
の印刷後、600℃、10分ホールドの条件で通常の電
気式連続ベルト炉を使用して酸化雰囲気(空気)中で焼
成し、セラミック多層基板11表面にAu系の表層導体
16を低温焼成する。
On the surface of the ceramic multilayer substrate 11 fired at a low temperature as described above, an Au-based conductor 16 for low temperature firing is used to form an Au-based surface conductor 16 on the surface of the substrate.
It is screen printed so as to be bonded to the via 14 of the system.
The Au-based conductor paste for low temperature firing used here is 7
An Au-based conductor paste that can be fired at a low temperature of 50 ° C. or lower (for example, trade name “TR-140S” manufactured by Tanaka Kikinzoku International Co., Ltd.) is used. The Au-based conductor paste for low-temperature firing has a low firing temperature by using easily sinterable Au powder obtained by atomizing Au powder or by using a low-melting frit. Surface conductor 16
After the printing, is fired in an oxidizing atmosphere (air) using an ordinary electric continuous belt furnace under the conditions of 600 ° C. and hold for 10 minutes, and the Au-based surface layer conductor 16 is fired at a low temperature on the surface of the ceramic multilayer substrate 11. .

【0017】本発明者らは、以上のようにして作製した
低温焼成セラミック多層回路基板のAg系導体のビア1
4とAu系の表層導体16との間の接合部(以下「Ag
−Au接合部」という)の信頼性を評価するために、こ
の低温焼成セラミック多層回路基板(実施例1)につい
て、0℃〜+100℃のヒートショックテストを100
サイクル行い、Ag−Au接合部を含む配線パターンの
抵抗変化率を測定したところ、抵抗変化率は1%以下で
あり、実質的な抵抗変化は認められなかった。
The inventors of the present invention have made the via 1 of the Ag-based conductor of the low temperature fired ceramic multilayer circuit board manufactured as described above.
4 and an Au-based surface layer conductor 16 (hereinafter referred to as “Ag”).
In order to evaluate the reliability of the “-Au joint”), a heat shock test of 0 ° C. to + 100 ° C. was performed on the low temperature fired ceramic multilayer circuit board (Example 1) for 100 times.
When the cycle was repeated and the resistance change rate of the wiring pattern including the Ag—Au junction was measured, the resistance change rate was 1% or less, and no substantial resistance change was observed.

【0018】また、実施例2として次のようなプロセス
で低温焼成セラミック多層回路基板を作製した。まず、
上記実施例1と同様なグリーンシート積層法でセラミッ
ク多層基板を低温焼成した後、その基板表面のビア以外
の領域にAg/Pd導体を印刷し、900℃、10分ホ
ールドの条件で酸化雰囲気(空気)中で焼成し、更にR
uO2 系抵抗体を印刷し、900℃、10分ホールドの
条件で酸化雰囲気(空気)中で焼成する。出来上がった
Ag/Pd表層導体とRuO2 系抵抗体とを有するセラ
ミック多層基板の表面のビアを含む領域に、実施例1と
同じ低温焼成用のAu系表層導体をAg系のビアに接合
させるように印刷する。この後、750℃、10分ホー
ルドの条件で通常の電気式連続ベルト炉を使用して酸化
雰囲気(空気)中で焼成し、セラミック多層基板表面に
Au系の表層導体を低温焼成する。
As Example 2, a low temperature fired ceramic multilayer circuit board was manufactured by the following process. First,
After the ceramic multilayer substrate was fired at a low temperature by the same green sheet laminating method as in Example 1, Ag / Pd conductors were printed on a region other than the via on the substrate surface, and an oxidizing atmosphere ( Firing in air) and then R
A uO 2 -based resistor is printed and baked in an oxidizing atmosphere (air) under the conditions of 900 ° C. and hold for 10 minutes. The same Au-based surface conductor for low temperature firing as in Example 1 is bonded to the Ag-based via in the region including the via on the surface of the ceramic multilayer substrate having the finished Ag / Pd surface-layer conductor and the RuO 2 -based resistor. To print. Then, it is fired in an oxidizing atmosphere (air) using an ordinary electric continuous belt furnace under the conditions of 750 ° C. and hold for 10 minutes, and the Au-based surface layer conductor is fired on the surface of the ceramic multilayer substrate at a low temperature.

【0019】以上のようにして作製した実施例2の低温
焼成セラミック多層回路基板について、0℃〜+100
℃のヒートショックテストを100サイクル行い、Ag
−Au接合部とRuO2 系抵抗体とを含む配線パターン
の抵抗変化率を測定したところ、実施例1の場合と同じ
く、抵抗変化率は1%以下であり、実質的な抵抗変化は
認められなかった。
Regarding the low temperature fired ceramic multilayer circuit board of Example 2 produced as described above, 0 ° C. to +100
℃ heat shock test 100 cycles, Ag
When the resistance change rate of the wiring pattern including the —Au junction portion and the RuO 2 type resistor was measured, the resistance change rate was 1% or less as in Example 1, and a substantial resistance change was recognized. There wasn't.

【0020】一方、比較例として次のようなプロセスで
低温焼成セラミック多層回路基板を作製した。まず、上
記実施例1と同様なグリーンシート積層法でセラミック
多層基板を低温焼成した後、その基板表面にAu系導体
をAg系のビアに接合させるように印刷し、850℃、
10分ホールドの条件で酸化雰囲気(空気)中で焼成す
る。このようにして作製した比較例の低温焼成セラミッ
ク多層回路基板について、0℃〜+100℃のヒートシ
ョックテストを100サイクル行い、Ag−Au接合部
を含む配線パターンの抵抗変化率を測定したところ、一
部に断線が発生し、その断線箇所を調査したところ、A
g−Au接合部であった。
On the other hand, as a comparative example, a low temperature fired ceramic multilayer circuit board was manufactured by the following process. First, a ceramic multilayer substrate was baked at a low temperature by the same green sheet laminating method as in Example 1 above, and then printed so that an Au-based conductor was bonded to an Ag-based via on the substrate surface at 850 ° C.
Baking is performed in an oxidizing atmosphere (air) under the condition of holding for 10 minutes. The low temperature fired ceramic multilayer circuit board of the comparative example thus produced was subjected to a heat shock test of 0 ° C. to + 100 ° C. for 100 cycles, and the resistance change rate of the wiring pattern including the Ag—Au joint was measured. A disconnection occurred in the part, and when the disconnection location was investigated, A
It was a g-Au joint.

【0021】以上説明した実施例1,2と比較例から明
らかなように、Ag系のビア14に接合する表層導体1
6として、750℃以下で焼成するAu系導体を用いる
と、ヒートショックテストでもAg−Au接合部の実質
的な劣化が認められず、Ag−Au接合部の信頼性が向
上する。この低温焼成用のAu系導体は、500℃程度
でも焼成可能である。
As is apparent from the first and second embodiments and the comparative example described above, the surface layer conductor 1 joined to the Ag-based via 14 is formed.
When an Au-based conductor fired at 750 ° C. or less is used as 6, the Ag-Au joint is not substantially deteriorated in the heat shock test, and the reliability of the Ag-Au joint is improved. The Au-based conductor for low temperature firing can be fired even at about 500 ° C.

【0022】また、実施例2から明らかなように、Au
系の表層導体の焼成前に基板表面に焼成したRuO2
抵抗体の抵抗値のドリフトも認められない。しかも、A
u系の表層導体の焼成温度(750℃以下)がAg−C
u接合の共晶点776℃より低いため、Au系の表層導
体の焼成前にAg−Cu接合が焼成されていてもAg−
Cu接合を劣化させること無くAu系の表層導体を後付
けすることができ、従来のAu系導体の焼成温度が高い
ことに起因する各種の問題を解決できる。
As is clear from the second embodiment, Au
No drift of the resistance value of the RuO 2 series resistor fired on the substrate surface before firing the surface conductor of the system was observed. Moreover, A
The firing temperature (750 ° C or lower) of the u-based surface layer conductor is Ag-C.
Since the eutectic point of the u junction is lower than 776 ° C., even if the Ag—Cu junction is fired before firing the Au-based surface layer conductor, Ag−
An Au-based surface layer conductor can be retrofitted without degrading Cu bonding, and various problems caused by the high firing temperature of the conventional Au-based conductor can be solved.

【0023】更に、実施例1,2では、Ag系のビアと
Au系表層導体との間にNi,Cr,Ti等の中間金属
層を介在させる必要がなく、製造のプロセスを短縮でき
ると共に、Au系の表層導体の焼成温度の低温化により
焼成コストも低減でき、低コスト化の要求を十分に満た
すことができる。
Further, in Examples 1 and 2, it is not necessary to interpose an intermediate metal layer such as Ni, Cr, or Ti between the Ag-based via and the Au-based surface layer conductor, and the manufacturing process can be shortened. By lowering the firing temperature of the Au-based surface layer conductor, the firing cost can be reduced, and the requirement for cost reduction can be sufficiently satisfied.

【0024】一方、セラミック多層基板11を作製する
ためのグリーンシート12はCaO−SiO2 −Al2
3 −B2 3 系ガラス粉末とAl2 3 粉末との混合
物を用いると良く、その好ましい組成は、CaO10〜
55重量%、SiO2 45〜70重量%、Al2 3
〜30重量%、B2 3 5〜20重量%からなるガラス
粉末65〜50重量%、Al2 3 粉末50〜35重量
%である。このような組成のグリーンシート12を用い
ると、焼成過程においてアノーサイト若しくはアノーサ
イト+ケイ酸カルシウムの部分結晶化を起こさせて、酸
化雰囲気(空気)中で800〜1000℃の低温焼成を
可能にするだけでなく、焼成過程における微細パターン
のずれを上述した部分結晶化により抑えることができ
て、ファインパターンの形成が容易である。また、焼成
時に30〜50℃/分という早いスピードで昇温して
も、730〜850℃までガラス層が全く軟化せず、収
縮もしない多孔質体を維持するため、クラックが入った
り、カーボンをガラス層に封じ込めること無く、バイン
ダーを容易に除去でき、更に、800〜1000℃の焼
成温度付近で急速に収縮焼結するため、大型の緻密なセ
ラミック基板を短時間で焼成可能である。
On the other hand, the green sheet 12 for making the ceramic multilayer substrate 11 is made of CaO--SiO 2 --Al 2
It is advisable to use a mixture of O 3 —B 2 O 3 glass powder and Al 2 O 3 powder, and the preferred composition is CaO10-
55% by weight, SiO 2 45 to 70% by weight, Al 2 O 3 0
˜30 wt%, 65 to 50 wt% of glass powder consisting of 5 to 20 wt% of B 2 O 3, and 50 to 35 wt% of Al 2 O 3 powder. When the green sheet 12 having such a composition is used, partial crystallization of anorthite or anorthite + calcium silicate is caused in the firing process, and low temperature firing at 800 to 1000 ° C. is possible in an oxidizing atmosphere (air). Not only that, the deviation of the fine pattern in the firing process can be suppressed by the above-described partial crystallization, and the fine pattern can be easily formed. In addition, even if the temperature is raised at a high speed of 30 to 50 ° C./minute during firing, the glass layer does not soften to 730 to 850 ° C. at all and maintains a porous body that does not shrink, so that cracks or carbon are generated. It is possible to easily remove the binder without enclosing it in the glass layer, and to perform shrink shrink sintering rapidly near the firing temperature of 800 to 1000 ° C., so that a large and dense ceramic substrate can be fired in a short time.

【0025】尚、図1に示す低温焼成セラミック回路基
板は、片面のみにAu系表層導体16を低温焼成してい
るが、基板両面にAu系の表層導体を低温焼成するよう
にしても良い。その他、本発明は、グリーンシート12
の積層枚数を変更しても良い等、要旨を逸脱しない範囲
で種々変更して実施できることは言うまでもない。
In the low temperature fired ceramic circuit board shown in FIG. 1, the Au-based surface layer conductor 16 is fired on only one surface at low temperature, but the Au-based surface layer conductor may be fired on both surfaces of the substrate at low temperature. In addition, the present invention relates to the green sheet 12
It goes without saying that various changes can be made without departing from the scope of the invention, such as changing the number of stacked layers.

【0026】[0026]

【発明の効果】以上の説明から明らかなように、本発明
の低温焼成セラミック多層回路基板によれば、Ag系の
ビアに接合する表層導体の少なくとも一部を、焼成後の
基板表面に低温焼成用のAu系導体を印刷して750℃
以下の低温度で焼成するようにしたので、Ag原子がA
u系導体中に拡散するカーケンドール効果を抑えること
ができて、Ag−Au接合部の信頼性を向上させること
ができると共に、従来のAu系導体の焼成温度が高いこ
とに起因するRuO2 系抵抗体の抵抗値のドリフト等の
各種の問題を解決できる。しかも、Ag系のビアとAu
系の表層導体との間にNi,Cr,Ti等の中間金属層
を介在させる必要がなく、製造のプロセスを短縮できる
と共に、Au系の表層導体の焼成温度の低温化により焼
成コストも低減でき、低コスト化の要求を十分に満たす
ことができる。
As is apparent from the above description, according to the low temperature fired ceramic multilayer circuit board of the present invention, at least a part of the surface layer conductor joined to the Ag-based via is fired at a low temperature on the board surface after firing. 750 ℃ by printing Au-based conductor for
Since the firing was performed at the following low temperature, the Ag atom was
The Kirkendall effect diffusing into the u-based conductor can be suppressed, the reliability of the Ag—Au joint can be improved, and the RuO 2 system is caused by the high firing temperature of the conventional Au-based conductor. Various problems such as drift of the resistance value of the resistor can be solved. Moreover, Ag-based vias and Au
Since it is not necessary to interpose an intermediate metal layer of Ni, Cr, Ti, etc. with the surface conductor of the system, the manufacturing process can be shortened and the firing cost can be reduced by lowering the firing temperature of the Au surface conductor. Therefore, the demand for cost reduction can be sufficiently satisfied.

【0027】また、低温焼成セラミックとして、CaO
−SiO2 −Al2 3 −B2 3系ガラス粉末とAl
2 3 粉末との混合物を用いれば、焼成過程における部
分結晶化により、酸化雰囲気(空気)中で800〜10
00℃の低温焼成を行い得ると共に、焼成過程における
微細パターンのずれを上述した部分結晶化により抑えな
がら、焼成時間を短時間化することができる。
Further, as a low temperature fired ceramic, CaO
-SiO 2 -Al 2 O 3 -B 2 O 3 based glass powder and Al
If a mixture with 2 O 3 powder is used, 800 to 10 in an oxidizing atmosphere (air) due to partial crystallization in the firing process.
The firing time can be shortened while the low temperature firing at 00 ° C. can be performed and the deviation of the fine pattern in the firing process can be suppressed by the partial crystallization described above.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す低温焼成セラミック多
層回路基板の拡大縦断面図である。
FIG. 1 is an enlarged vertical cross-sectional view of a low temperature fired ceramic multilayer circuit board showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11…セラミック基板、12…焼成後のグリーンシー
ト、13…ビアホール、14…ビア(Ag系導体)、1
5…Ag系の内層導体、16…低温焼成Au系の表層導
体、18…半導体チップ、19…ボンディングワイヤ。
11 ... Ceramic substrate, 12 ... Green sheet after firing, 13 ... Via hole, 14 ... Via (Ag-based conductor), 1
5 ... Ag-based inner layer conductor, 16 ... Low temperature firing Au-based surface layer conductor, 18 ... Semiconductor chip, 19 ... Bonding wire.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 Ag系の内層導体及びAg系のビアを低
温焼成セラミックと同時焼成して成る低温焼成セラミッ
ク多層回路基板において、前記Ag系のビアに接合する
表層導体の少なくとも一部を、焼成後の基板表面に低温
焼成用のAu系導体を印刷して750℃以下の低温度で
焼成して形成したことを特徴とする低温焼成セラミック
多層回路基板。
1. A low-temperature fired ceramic multilayer circuit board obtained by co-firing an Ag-based inner layer conductor and an Ag-based via with a low-temperature fired ceramic, and at least a part of a surface layer conductor joined to the Ag-based via is fired. A low-temperature-fired ceramic multilayer circuit board, characterized in that an Au-based conductor for low-temperature firing is printed on the surface of the subsequent substrate and fired at a low temperature of 750 ° C. or lower.
【請求項2】 前記低温焼成セラミックは、CaO−S
iO2 −Al2 3−B2 3 系ガラス粉末とAl2
3 粉末との混合物より成ることを特徴とする請求項1に
記載の低温焼成セラミック多層回路基板。
2. The low temperature fired ceramic is CaO--S.
iO 2 -Al 2 O 3 -B 2 O 3 based glass powder and Al 2 O
The low temperature fired ceramic multilayer circuit board according to claim 1, wherein the low temperature fired ceramic multilayer circuit board comprises a mixture with three powders.
JP07062311A 1995-03-22 1995-03-22 Low temperature firing ceramic multilayer circuit board Expired - Lifetime JP3076214B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP07062311A JP3076214B2 (en) 1995-03-22 1995-03-22 Low temperature firing ceramic multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP07062311A JP3076214B2 (en) 1995-03-22 1995-03-22 Low temperature firing ceramic multilayer circuit board

Publications (2)

Publication Number Publication Date
JPH08264945A true JPH08264945A (en) 1996-10-11
JP3076214B2 JP3076214B2 (en) 2000-08-14

Family

ID=13196473

Family Applications (1)

Application Number Title Priority Date Filing Date
JP07062311A Expired - Lifetime JP3076214B2 (en) 1995-03-22 1995-03-22 Low temperature firing ceramic multilayer circuit board

Country Status (1)

Country Link
JP (1) JP3076214B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100674843B1 (en) * 2005-03-15 2007-01-26 삼성전기주식회사 Method for manufacturing LTCC substrate having minimized deimension change, and LTCC substrate thus obtained

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100674843B1 (en) * 2005-03-15 2007-01-26 삼성전기주식회사 Method for manufacturing LTCC substrate having minimized deimension change, and LTCC substrate thus obtained

Also Published As

Publication number Publication date
JP3076214B2 (en) 2000-08-14

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