JPH0823159A - Circuit board and method for mounting electronic component - Google Patents

Circuit board and method for mounting electronic component

Info

Publication number
JPH0823159A
JPH0823159A JP15687694A JP15687694A JPH0823159A JP H0823159 A JPH0823159 A JP H0823159A JP 15687694 A JP15687694 A JP 15687694A JP 15687694 A JP15687694 A JP 15687694A JP H0823159 A JPH0823159 A JP H0823159A
Authority
JP
Japan
Prior art keywords
circuit board
solder
electronic component
metal
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15687694A
Other languages
Japanese (ja)
Inventor
Koichi Tsurumi
浩一 鶴見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP15687694A priority Critical patent/JPH0823159A/en
Publication of JPH0823159A publication Critical patent/JPH0823159A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3489Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To provide an electronic circuit board for surface mounting, which allows easy mounting of a fine pitch QFP with a specific pitch or less. CONSTITUTION:A circuit board is provided by forming the layer of solder 2, which contains flux 4, and a layer of adhesive material 1 on the conductive bonding part 5 on a substrate 3. After mounting an electronic component on the board, soldering is performed by melting solder by heat.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品を搭載して電
子回路を形成するために用いる回路基板およびそれを用
いた電子部品実装方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board used for mounting an electronic component to form an electronic circuit, and an electronic component mounting method using the same.

【0002】[0002]

【従来の技術】回路基板において電子回路を形成するた
めには、電子部品と回路基板の電気的な接合を行なう必
要がある。一般的に広く行なわれているのは、融点の低
い金属を溶解させて電子部品と回路基板両者の接合を行
なう半田付け法がある。融点の低い金属には錫と鉛の合
金が通常用いられる。半田付けの方法は挿入実装工法と
表面実装工法に大別される。挿入実装工法は回路基板上
に加工された穴に電子部品を挿入し、裏側からフラック
ス塗布工程と溶融半田の噴流をあて半田付けを行なう工
程による。表面実装工法は図6に示すように回路基板3
上の電気的接合部5に、図7に示すようにクリーム半田
10をスクリーン印刷法などにより形成し、この上に電
子部品6を装着後、加熱してクリーム半田10を溶融さ
せ電子部品6の電極7に半田8を接着させる方法であ
る。すなわち、表面実装工法はクリーム半田の印刷、部
品装着、リフローの工程で行なわれる。
2. Description of the Related Art In order to form an electronic circuit on a circuit board, it is necessary to electrically connect an electronic component and the circuit board. Generally widely used is a soldering method in which a metal having a low melting point is melted to bond both an electronic component and a circuit board. An alloy of tin and lead is usually used for a metal having a low melting point. The soldering method is roughly classified into an insertion mounting method and a surface mounting method. The insertion mounting method consists of inserting an electronic component into a hole machined on a circuit board, applying a flux from the back side and applying a jet of molten solder to perform soldering. The surface mounting method is as shown in FIG.
As shown in FIG. 7, cream solder 10 is formed on the upper electrical joint portion 5 by a screen printing method or the like, and after mounting the electronic component 6 thereon, the cream solder 10 is melted by heating to melt the electronic component 6. This is a method of bonding the solder 8 to the electrode 7. That is, the surface mounting method is performed in the steps of printing cream solder, mounting components, and reflowing.

【0003】[0003]

【発明が解決しようとする課題】電子機器の小型、軽量
化が進み、電子回路基板の高密度化が急速に進んでい
る。表面実装工法においても部品の小型化やリードピッ
チの極小化が進んでおり、半田付け技術にもますます高
い技術が要求されている。特に0.3mmピッチQFP
以下の部品については、クリーム半田のスクリーン印刷
法では非常に困難になる。連続で印刷する場合の印刷品
質の安定性に課題が多い。仮に印刷できても、印刷形状
が崩れていればリフロー後にブリッジや半田ボールなど
の半田付け不良が発生する。この問題を解決するためあ
らかじめ回路基板の電気的接合部に半田を形成するプリ
コート法がある。半田の形成法にはメッキ法や有機金属
の析出反応によるものがある。プリコートをした基板を
用いる場合の工程は基板へのフラックス塗布、部品装
着、リフローとなる。この場合、フラックス塗布工程に
おいて粘着力不足による部品ずれやピン浮きなどが生じ
る問題点があった。
The size and weight of electronic equipment have been reduced, and the density of electronic circuit boards has been rapidly increased. Even in the surface mounting method, miniaturization of components and miniaturization of lead pitch are progressing, and higher and higher soldering technology is required. Especially 0.3mm pitch QFP
For the following parts, the screen printing method of cream solder becomes very difficult. There are many problems in the stability of print quality when printing continuously. Even if it is possible to print, if the print shape is broken, soldering defects such as bridges and solder balls will occur after reflow. In order to solve this problem, there is a pre-coating method in which solder is formed in advance on the electrical joint portion of the circuit board. The solder forming method includes a plating method and a deposition reaction of an organic metal. When using a precoated substrate, the steps are flux application to the substrate, component mounting, and reflow. In this case, there has been a problem that component displacement and pin floating due to insufficient adhesive force occur in the flux applying step.

【0004】本発明は前記の問題に留意し、表面実装工
法による電子回路基板の製造工程において、0.3mm
ピッチQFP以下のファインピッチQFPを容易に実装
できるようにすることを目的とする。
In the present invention, in consideration of the above-mentioned problems, in the manufacturing process of the electronic circuit board by the surface mounting method, 0.3 mm
An object of the present invention is to easily mount a fine pitch QFP equal to or less than the pitch QFP.

【0005】[0005]

【課題を解決するための手段】前記問題を解決するため
に本発明の回路基板は、電気的接合部にあらかじめ半田
のような金属と粘着性物質の両方を形成した回路基板ま
たは、半田のような金属およびフラックスと粘着性物質
を形成した回路基板の構成とする。また前記金属と粘着
性物質は、交互に積層した構成とする。また、フラック
スもあわせて形成する場合は、粘着性物質、金属、フラ
ックス、金属、粘着性物質の順で積層するのが好まし
い。
In order to solve the above problems, a circuit board according to the present invention is a circuit board in which both a metal such as solder and an adhesive substance are formed in advance in an electrical joint portion, or The circuit board is formed by forming a metal and a flux and an adhesive material. The metal and the adhesive substance are alternately laminated. When the flux is also formed, it is preferable to stack the adhesive substance, the metal, the flux, the metal, and the adhesive substance in this order.

【0006】また回路基板上に形成した粘着性物質の粘
着性を保持するため、あるいは半田のような金属の汚染
や酸化を防ぐために、半田のような金属と粘着性物質の
両方を形成した層の上に保護層を形成した構成とする。
この保護層は剥離可能なフィルム状の層であることが望
ましい。
A layer formed with both a metal such as solder and an adhesive substance in order to maintain the adhesiveness of the adhesive substance formed on the circuit board or to prevent the contamination and oxidation of the metal such as solder. A protective layer is formed on top of this.
This protective layer is preferably a peelable film-like layer.

【0007】[0007]

【作用】この回路基板の製造工程の一例は回路基板の導
電性接合部に粘着性の物質を塗布する。粘着性物質の上
に半田のような金属のシートを置いて行く。金属シート
の内部にはフラックスが含まれていてもかまわない。
In one example of the manufacturing process of this circuit board, an adhesive substance is applied to the conductive joint portion of the circuit board. Place a sheet of metal such as solder on top of the sticky material. Flux may be contained inside the metal sheet.

【0008】回路基板を用いることで表面実装工法はク
リーム半田の印刷工程がなくなり、部品の装着、リフロ
ーの工程だけとなる。このため、0.3mmピッチQF
Pを用いても高品質で半田付けが可能となる。
By using the circuit board, the surface mounting method eliminates the step of printing cream solder, and only the steps of component mounting and reflow. Therefore, 0.3 mm pitch QF
Even if P is used, high quality soldering is possible.

【0009】剥離可能なフィルム状の層を保護層にした
場合、表面実装工法の工程はフィルム剥離、部品装着、
リフローの工程からなる。フィルムの剥離は生産直前に
行なうことにより、常に一定の粘着力を保持することが
できる。基板の保管についてもフィルムで保護している
ため大きな注意を払う必要はない。
When a peelable film-like layer is used as a protective layer, the steps of the surface mounting method are film peeling, component mounting,
It consists of a reflow process. By peeling the film immediately before production, a constant adhesive force can be always maintained. There is no need to pay much attention to the storage of the substrate as it is protected by the film.

【0010】[0010]

【実施例】以下本発明の一実施例について図面を参照し
ながら説明する。図1は本発明に基づく回路基板の構造
の一例を示している。図示のように回路基板3の導電性
接合部5に粘着性物質1と半田2を層状に積層する。下
部の粘着性物質1は導電性接合部5と半田1の接着を行
なうためであり、上部の粘着性物質1は半田2と後程に
装着する電子部品との接着を行なう。半田2の層の厚さ
は後程に装着、半田付けされる電子部品の電極に対して
適正な強度が確保できるように決められる。通常、80
μmから200μmの範囲で決定される。基板3の両面
に電子部品を実装する場合は両面に粘着性物質と半田の
層を形成してもかまわない。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an example of the structure of a circuit board according to the present invention. As shown in the figure, the adhesive substance 1 and the solder 2 are laminated in layers on the conductive joint portion 5 of the circuit board 3. The lower sticky substance 1 bonds the conductive joint 5 to the solder 1, and the upper sticky substance 1 bonds the solder 2 to the electronic parts to be mounted later. The thickness of the layer of the solder 2 is determined so that proper strength can be ensured for the electrodes of the electronic component to be mounted and soldered later. Usually 80
It is determined in the range of μm to 200 μm. When mounting electronic components on both sides of the substrate 3, a layer of an adhesive substance and a solder may be formed on both sides.

【0011】図2は本発明に基づく回路基板の構造の別
の一例を示している。この例では図示のように半田2の
層の内部にフラックス層4を有している。このフラック
ス層4によって半田2を溶融させて半田付けを行なう際
に、濡れ性が向上して適正な半田付けができるようにな
る。
FIG. 2 shows another example of the structure of the circuit board according to the present invention. In this example, as shown in the drawing, the flux layer 4 is provided inside the layer of the solder 2. When the solder 2 is melted and soldered by the flux layer 4, the wettability is improved and proper soldering can be performed.

【0012】図3にはこのような回路基板の製造工程の
一例を示す。同図(a)に示す導電性接合部5をもつ回
路基板3を準備し、同図(b)に示すように導電性接合
部5に粘着性物質1を形成する。形成方法は導電接合部
5に対応するパターンの開口部を持つスクリーンを用い
て粘着性物質1を印刷する。同図(c)に示すようにこ
の上に所望の寸法にした半田2の層を搭載する。半田2
の層はプレス工程により製造される。プレス工程の前に
あらかじめ半田2の内部にフラックス層4を形成してお
けば、プレス工程にて薄いフラックス層4が形成され
る。同図(d)のようにこの上に同様のスクリーン印刷
工程を用いて粘着性物質1を形成する。
FIG. 3 shows an example of a manufacturing process of such a circuit board. The circuit board 3 having the conductive joint portion 5 shown in FIG. 4A is prepared, and the adhesive substance 1 is formed on the conductive joint portion 5 as shown in FIG. As a forming method, the adhesive substance 1 is printed using a screen having a pattern of openings corresponding to the conductive joints 5. As shown in FIG. 3C, a layer of the solder 2 having a desired size is mounted thereon. Solder 2
Layers are manufactured by a pressing process. If the flux layer 4 is previously formed inside the solder 2 before the pressing step, the thin flux layer 4 is formed in the pressing step. As shown in FIG. 3D, the adhesive substance 1 is formed on the same by using the same screen printing process.

【0013】図4にはこのような回路基板を用いた場合
の電子部品実装方法についての工程を示す。図4(a)
に示す本実施例における回路基板の上に、同図(b)に
示すように電子部品6を搭載する。電子部品6は粘着性
物質1によって保持され、はずれたり位置ずれを起こさ
ない。この状態で加熱し半田2の層を溶解させると同図
(c)のように電子部品6の電極7と導電性接合部5が
溶融した半田8で半田付けが行なわれる。
FIG. 4 shows steps of a method of mounting electronic components when such a circuit board is used. Figure 4 (a)
The electronic component 6 is mounted on the circuit board in the present embodiment shown in FIG. The electronic component 6 is held by the adhesive substance 1 and does not come off or move. When the layer of the solder 2 is melted by heating in this state, soldering is performed with the solder 8 in which the electrode 7 of the electronic component 6 and the conductive joint portion 5 are melted as shown in FIG.

【0014】図5には回路基板の粘着性物質1の上面に
保護膜9を形成した場合の一例を示す。保護膜9は離形
可能なたとえばフィルムで形成され、電子部品の装着工
程の直前に剥離される。
FIG. 5 shows an example in which the protective film 9 is formed on the upper surface of the adhesive substance 1 of the circuit board. The protective film 9 is formed of, for example, a film that can be released, and is peeled off immediately before the electronic component mounting process.

【0015】[0015]

【発明の効果】以上説明したように本発明によれば、表
面実装工法による電子回路基板の製造工程において0.
3mmピッチQFP以下のファインピッチQFPを容易
に実装できるようになる。また、クリーム半田の印刷工
程を省略することができ、クリーム半田の印刷にともな
うブリッジや半田ボールなどの半田付け不良をなくすこ
とが可能となる。
As described above, according to the present invention, in the manufacturing process of the electronic circuit board by the surface mounting method,
It becomes possible to easily mount a fine pitch QFP having a pitch of 3 mm or less. Further, the step of printing the cream solder can be omitted, and it becomes possible to eliminate the soldering failure such as the bridge and the solder ball due to the printing of the cream solder.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の回路基板の断面図FIG. 1 is a sectional view of a circuit board according to an embodiment of the present invention.

【図2】本発明の別の実施例の回路基板の断面図FIG. 2 is a sectional view of a circuit board according to another embodiment of the present invention.

【図3】本発明の回路基板の製造工程図FIG. 3 is a manufacturing process diagram of the circuit board of the present invention.

【図4】本発明の回路基板を用いた場合の電子部品実装
工程図
FIG. 4 is an electronic component mounting process diagram when the circuit board of the present invention is used.

【図5】本発明の別の実施例の回路基板の断面図FIG. 5 is a sectional view of a circuit board according to another embodiment of the present invention.

【図6】従来の回路基板の断面図FIG. 6 is a sectional view of a conventional circuit board.

【図7】従来の回路基板を用いた場合の電子部品実装工
程図
FIG. 7: Electronic component mounting process diagram when a conventional circuit board is used

【符号の説明】[Explanation of symbols]

1 粘着性物質 2 半田 3 回路基板 4 フラックス 5 導電性接合部 6 電子部品 7 電極 8 溶融後の半田 9 保護膜 1 Adhesive substance 2 Solder 3 Circuit board 4 Flux 5 Conductive joint 6 Electronic component 7 Electrode 8 Solder after melting 9 Protective film

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 回路基板上の導電性の回路配線と電子部
品の電極を半田のような金属によって電気的接合を行な
う表面実装用の回路基板において、回路基板上の電気的
接合部にあらかじめ半田のような金属と粘着性物質の両
方を形成した回路基板。
1. A surface mounting circuit board in which conductive circuit wiring on a circuit board and electrodes of an electronic component are electrically connected by a metal such as solder. A circuit board that has both metal and adhesive substance.
【請求項2】 回路基板上の導電性の回路配線と電子部
品の電極を半田のような金属によって電気的接合を行な
う表面実装用の回路基板において、回路基板上の電気的
接合部にあらかじめ半田のような金属およびフラックス
と粘着性物質を形成した回路基板。
2. A surface-mounting circuit board for electrically connecting conductive circuit wiring on a circuit board and electrodes of electronic parts with a metal such as solder, wherein solder is previously applied to an electrically connecting portion on the circuit board. A circuit board on which a metal and flux such as the above and a sticky substance are formed.
【請求項3】 半田のような金属を半田とし、粘着性物
質を粘着性材料とし、両者を交互に積層したことを特徴
とする請求項1または2記載の回路基板。
3. The circuit board according to claim 1, wherein a metal such as solder is used as a solder, an adhesive material is used as an adhesive material, and both are alternately laminated.
【請求項4】 半田のような金属と粘着性物質の両方を
形成した層の上に保護層を形成した請求項1または2記
載の回路基板。
4. The circuit board according to claim 1, wherein a protective layer is formed on a layer on which both a metal such as solder and an adhesive substance are formed.
【請求項5】 保護層が剥離可能なフィルム状の層であ
ることを特徴とする請求項4記載の回路基板。
5. The circuit board according to claim 4, wherein the protective layer is a peelable film-like layer.
【請求項6】 基板上に形成した半田を導電性接合材料
として電子部品との電気的接合を行なう電子部品表面実
装方法において、請求項1または2記載の粘着性物質と
半田の両方を形成した回路基板を用いて、電子部品の装
着および、加熱による半田の溶融により半田付けを行な
うことを特徴とする電子部品実装方法。
6. An electronic component surface mounting method in which the solder formed on a substrate is used as a conductive bonding material to electrically bond with an electronic component, and both the adhesive substance and the solder according to claim 1 or 2 are formed. An electronic component mounting method comprising mounting an electronic component using a circuit board and soldering by melting the solder by heating.
JP15687694A 1994-07-08 1994-07-08 Circuit board and method for mounting electronic component Pending JPH0823159A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15687694A JPH0823159A (en) 1994-07-08 1994-07-08 Circuit board and method for mounting electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15687694A JPH0823159A (en) 1994-07-08 1994-07-08 Circuit board and method for mounting electronic component

Publications (1)

Publication Number Publication Date
JPH0823159A true JPH0823159A (en) 1996-01-23

Family

ID=15637326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15687694A Pending JPH0823159A (en) 1994-07-08 1994-07-08 Circuit board and method for mounting electronic component

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008078384A (en) * 2006-09-21 2008-04-03 Toppan Printing Co Ltd Printed wiring board manufacturing method, protection sheet, and printed wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008078384A (en) * 2006-09-21 2008-04-03 Toppan Printing Co Ltd Printed wiring board manufacturing method, protection sheet, and printed wiring board

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