JPH08222770A - Manufacture of thermoelectric element - Google Patents

Manufacture of thermoelectric element

Info

Publication number
JPH08222770A
JPH08222770A JP7026515A JP2651595A JPH08222770A JP H08222770 A JPH08222770 A JP H08222770A JP 7026515 A JP7026515 A JP 7026515A JP 2651595 A JP2651595 A JP 2651595A JP H08222770 A JPH08222770 A JP H08222770A
Authority
JP
Japan
Prior art keywords
type
thermoelectric
chips
laminate
insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7026515A
Other languages
Japanese (ja)
Inventor
Shigeru Watanabe
渡辺  滋
Munetaka Tamaru
宗孝 田丸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP7026515A priority Critical patent/JPH08222770A/en
Publication of JPH08222770A publication Critical patent/JPH08222770A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To provide a laminating method of a stable thermoelectric semiconductor, and improve the reliability of cutting work, by alternately connecting neighboring N-type chips and P-type chips by using an upper surface wiring electrode and a lower surface wiring electrode, and forming a plurality of thermoelectric couples to be connected in series. CONSTITUTION: A specific number of N-type thermoelectric semiconductors to be worked into planes and epoxy resin sheets 100μm thick as insulators 20 are alternately laminated, and cut rectangularity to the lamination surface, thereby forming a plurality of N-type laminates 12 containing a plurality of columnar N-type chips. Similarly a plurality of P-type thermoelectric semiconductor and insulators 20 are alternately laminated, and cut vertically to the lamination surface, thereby forming a plurality of P-type laminates 32 containing a plurality of P-type chips. A specific number of the N-type laminates 12 and the P-type laminates 32 obtained in the above manner are alternately laminated while interposing insulators 20, thereby forming a compound laminate 40. An upper surface electrode, a lower surface electrode and an outer connection electrode are formed, and all the N-type semiconductor chips and the P-type semiconductor chips are alternately connected in series by the upper and the lower electrodes.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は本体内部のスペースが非
常に狭い小型の電子機器のエネルギー源として利用する
熱電素子の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thermoelectric element used as an energy source for a small electronic device having a very small space inside the main body.

【0002】[0002]

【従来の技術】熱電素子は異種金属あるいは異種半導体
を対にした、いわゆる熱電対が多数直列に接続する構造
を有しており、温度差を与えることで電圧を発生させる
ことができる。
2. Description of the Related Art A thermoelectric element has a structure in which a large number of so-called thermocouples, which are a pair of different metals or different semiconductors, are connected in series, and a voltage can be generated by applying a temperature difference.

【0003】この電圧を電気エネルギーとして利用する
のが熱電発電であり、熱電発電は熱エネルギーを直接電
気エネルギーに変換できる方法として、廃熱の利用を含
め熱エネルギーの有効な利用法として考えられている。
Thermoelectric power generation uses this voltage as electric energy. Thermoelectric power generation is considered as an effective method of utilizing thermal energy including utilization of waste heat as a method of directly converting thermal energy into electrical energy. There is.

【0004】さらに熱電素子は構造が簡単なため他の発
電器に比較して小型化に有利なことから、腕時計に代表
されるような携帯用の小型の電子機器への応用が注目さ
れている。
Further, since the thermoelectric element has a simple structure and is advantageous in downsizing as compared with other power generators, attention is focused on its application to small portable electronic devices such as wristwatches. .

【0005】ここで腕時計を例にあげて考えると、腕時
計に熱電素子を利用する場合エネルギー源は体温と気温
との差であり、一般に腕時計が体温と気温から得られる
温度差は1〜3℃程度である。そして腕時計の消費電流
は1μA以下と少ないが、電圧は1V以上必要とする。
Considering a wristwatch as an example, when a thermoelectric element is used in the wristwatch, the energy source is the difference between the body temperature and the air temperature. Generally, the temperature difference obtained by the wristwatch from the body temperature and the air temperature is 1 to 3 ° C. It is a degree. The wristwatch consumes as little as 1 μA or less, but requires a voltage of 1 V or more.

【0006】これに対して、常温付近で優れた性能をも
つ熱電半導体である(Bi,Sb)2(Te,Se)3 合
金はN型およびP型ともゼーベック係数は約200μV
/Kであり、温度差2℃で電圧2Vを得るためにはN型
とP型の熱電半導体チップは合わせて5000個も必要
になる。
On the other hand, the (Bi, Sb) 2 (Te, Se) 3 alloy, which is a thermoelectric semiconductor having excellent performance near room temperature, has a Seebeck coefficient of about 200 μV for both N type and P type.
/ K, and in order to obtain a voltage of 2 V with a temperature difference of 2 ° C., a total of 5000 N-type and P-type thermoelectric semiconductor chips are required.

【0007】ここで従来の熱電素子の第1の製造方法に
ついて述べる。これは、現在熱電素子の製造に使われて
いる一般的な方法である。
A first conventional method for manufacturing a thermoelectric element will be described here. This is a common method currently used in the manufacture of thermoelectric devices.

【0008】まず燒結法により作成されたブロック状の
熱電半導体は、ダイシングソーによって切断して、直方
体のチップに分割する。このチップはP型の熱電半導体
およびN型の熱電半導体について作製し、それぞれのチ
ップはマトリクス状に配列する。
First, the block-shaped thermoelectric semiconductor prepared by the sintering method is cut by a dicing saw and divided into rectangular parallelepiped chips. This chip is manufactured for a P-type thermoelectric semiconductor and an N-type thermoelectric semiconductor, and the chips are arranged in a matrix.

【0009】そののち、隣り合ったチップの両端を金属
板で接続し多数の熱電対を直列接続した熱電素子を得る
ことができる。この接続には主にハンダを介することで
行われる。以上の方法で製作する熱電素子の斜視図を図
7に示す。
After that, it is possible to obtain a thermoelectric element in which a plurality of thermocouples are connected in series by connecting both ends of adjacent chips with metal plates. This connection is mainly made via solder. FIG. 7 shows a perspective view of a thermoelectric element manufactured by the above method.

【0010】しかしながら、前述したように腕時計の内
部に5000個のチップからなる熱電素子を収納しよう
と考えると、チップ1個の大きさは0.1×0.1×3
mm程度である。
However, considering that the thermoelectric element consisting of 5000 chips is to be housed in the wristwatch as described above, the size of one chip is 0.1 × 0.1 × 3.
It is about mm.

【0011】このため、非常に小さな大きさになってし
まい、現在の熱電素子の製造方法ではチップの作製と、
1個1個の配列と、配線との作成工程のすべてが難し
く、実現は非常に困難である。
For this reason, the size becomes very small, and in the current method for manufacturing a thermoelectric element, chip fabrication and
It is very difficult to realize because it is difficult to carry out all the steps of forming each array and wiring.

【0012】従来の熱電素子の別の製造方法にとして
は、たとえば特開昭63−20880号公報や特開昭6
3−20881号公報がある。
Another conventional method for manufacturing a thermoelectric element is disclosed in, for example, JP-A-63-20880 and JP-A-SHO-6.
There is a publication of 3-20881.

【0013】これらの公報に記載の製造方法において
は、板状のN型熱電半導体とP型熱電半導体と絶縁体の
3種類を積層し、これを積層面に直角に切断してN型P
型混合の積層体を作り、再び絶縁体と交互に積層するこ
とからなっている。
In the manufacturing methods described in these publications, three types of plate-shaped N-type thermoelectric semiconductors, P-type thermoelectric semiconductors, and insulators are laminated and cut at right angles to the laminated surface to form N-type P
It consists of making a mold-mixed stack and stacking it again with the insulators alternately.

【0014】この製造方法は、従来の第1の方法と異な
り単独の微小なチップを作る必要がないため、配列や配
線の難しさも低減されて、小型の携帯機機に収納できる
ような微小な熱電素子を作るには適している。
Unlike the first method of the related art, this manufacturing method does not require the production of a single minute chip, so that the difficulty of arrangement and wiring is reduced and the minute chip can be stored in a small portable device. It is suitable for making thermoelectric elements.

【0015】[0015]

【発明が解決しようとする課題】ここで最も問題な点は
第2の従来法においては、はじめに板状のN型熱電半導
体とP型熱電半導体という物理的に異種の材料を絶縁体
を介して積層するところにある。
The most problematic point here is that, in the second conventional method, first, physically different materials, that is, a plate-shaped N-type thermoelectric semiconductor and a P-type thermoelectric semiconductor, are inserted through an insulator. It is in the place of stacking.

【0016】このとき絶縁体には、エポキシ樹脂からな
る熱硬化性樹脂を用いてP型熱電半導体とN型熱電半導
体を接着する。このため、温度150℃ほどのエポキシ
樹脂の加熱硬化工程が必ず含まれる。
At this time, the P-type thermoelectric semiconductor and the N-type thermoelectric semiconductor are bonded to the insulator by using a thermosetting resin made of epoxy resin. Therefore, a step of heat curing the epoxy resin at a temperature of about 150 ° C. is always included.

【0017】用いる熱電半導体はBiおよびTeをベー
スとした材料ではあるが、その熱的特性あるいは機械的
特性には違いがある。
The thermoelectric semiconductors used are materials based on Bi and Te, but their thermal or mechanical properties differ.

【0018】たとえば熱膨張係数はP型熱電半導体が約
2×10-5K-1であり、N型熱電半導体が約1×10-5
K-1である。このように、P型半導体の熱膨張係数はN
型熱電半導体の熱膨張係数より2倍大きい。
For example, the P-type thermoelectric semiconductor has a coefficient of thermal expansion of about 2 × 10 -5 K -1, and the N-type thermoelectric semiconductor has a coefficient of thermal expansion of about 1 × 10 -5.
It is K-1. Thus, the thermal expansion coefficient of the P-type semiconductor is N
The thermal expansion coefficient of the type thermoelectric semiconductor is twice as large.

【0019】積層するそれぞれの熱電半導体の板は厚み
が約100μmと薄いにもかかわらず、長さは数cmと
なり板の寸法比はかなり大きい。
Although each of the laminated thermoelectric semiconductor plates has a thin thickness of about 100 μm, the length thereof is several cm, and the dimensional ratio of the plates is considerably large.

【0020】積層工程では、およそ150℃の温度で熱
硬化性樹脂の加熱硬化工程が含まれることを考えても、
N型熱電半導体とP型熱電半導体とを積層する従来方法
においては積層物の変形は問題となる。
Considering that the laminating step includes a heat curing step of the thermosetting resin at a temperature of about 150 ° C.,
In the conventional method of laminating the N-type thermoelectric semiconductor and the P-type thermoelectric semiconductor, the deformation of the laminate becomes a problem.

【0021】さらに、機械的強度を比較するとN型熱電
半導体はP型熱電半導体より20〜50%引っ張り強度
や、圧縮強度や、ビッカース硬度がすべて大きい。
Further, comparing the mechanical strengths, the N-type thermoelectric semiconductor has a tensile strength, compressive strength and Vickers hardness which are all 20 to 50% higher than those of the P-type thermoelectric semiconductor.

【0022】これは従来の製造方法における積層物を、
たとえばダイシングソーで切断するとき、回転数や送り
速度の条件設定が難しくなり、さらに前述のN型熱電半
導体とP型熱電半導体を積層する変形と合わせて歩留ま
りを低下させる要因となる。
This is a laminate manufactured by the conventional manufacturing method,
For example, when cutting with a dicing saw, it becomes difficult to set conditions such as the number of rotations and the feed rate, and it becomes a factor of lowering the yield together with the above-described deformation of laminating the N-type thermoelectric semiconductor and the P-type thermoelectric semiconductor.

【0023】上述したように第2の従来の製造方法にお
いても、N型熱電半導体とP型熱電半導体の熱膨張係数
の違いによる反りの問題あるいは機械的特性の違いによ
る切断加工において信頼性に欠けるなどの問題が残って
いる。
As described above, also in the second conventional manufacturing method, the problem of warpage due to the difference in the thermal expansion coefficient between the N-type thermoelectric semiconductor and the P-type thermoelectric semiconductor or the reliability of the cutting process due to the difference in the mechanical characteristics is lacking. There are still problems.

【0024】そこで本発明の目的は、上記の問題を解決
し、熱硬化性樹脂を用いた安定した熱電半導体の積層法
を提供し、切断加工上の信頼性を向上させ、少しでも小
型で低コストの熱電素子を得ることである。
Therefore, an object of the present invention is to solve the above problems, to provide a stable method for laminating a thermoelectric semiconductor using a thermosetting resin, to improve the reliability in cutting, and to reduce the size to a small extent. To get the cost thermoelectric element.

【0025】[0025]

【課題を解決するための手段】以上の目的を達成するた
め本発明の熱電素子の製造方法においては、板状のN型
熱電半導体と絶縁体とを交互に積層し、これを積層面に
直角に切断することで柱状のN型熱電チップが複数配列
するN型積層体を作る工程と、板状のP型熱電半導体と
絶縁体を交互に積層し、これを積層面に直角に切断する
ことで柱状のP型熱電チップが複数配列するP型積層体
を作る工程と、さらに絶縁体を挟んでN型積層体とP型
積層体とを積層し複合積層体を作る工程と、上面配線電
極と下面配線電極とを用いて隣接するN型チップとP型
チップとを交互に接続することで直列に接続する複数の
熱電対を形成することを特徴とする。
In order to achieve the above object, in the method of manufacturing a thermoelectric element of the present invention, plate-shaped N-type thermoelectric semiconductors and insulators are alternately laminated, and these are perpendicular to the laminated surface. A step of making an N-type laminated body in which a plurality of columnar N-type thermoelectric chips are arrayed by cutting into two pieces, and a plate-shaped P-type thermoelectric semiconductor and an insulator are alternately laminated, and this is cut at a right angle to the laminated surface. A step of forming a P-type laminated body in which a plurality of columnar P-type thermoelectric chips are arranged, a step of further laminating an N-type laminated body and a P-type laminated body with an insulator sandwiched between them to form a composite laminated body, and an upper surface wiring electrode A plurality of thermocouples connected in series are formed by alternately connecting adjacent N-type chips and P-type chips using the and lower surface wiring electrodes.

【0026】[0026]

【作用】本発明の熱電素子の製造方法においては、P型
熱電材料あるいはN型熱電材料それぞれを別個に積層す
ることから、加熱工程を通した場合の熱膨張係数の違い
による反りなどの問題がない。
In the thermoelectric element manufacturing method of the present invention, since the P-type thermoelectric material and the N-type thermoelectric material are separately laminated, there is a problem such as warpage due to the difference in the thermal expansion coefficient during the heating step. Absent.

【0027】さらに、積層物の切断工程において同じ材
料を切断することから、条件設定が容易で加工歩留まり
を向上させることができる。
Further, since the same material is cut in the step of cutting the laminate, the conditions can be set easily and the processing yield can be improved.

【0028】以上のことから本発明の熱電素子の製造方
法は、非常に微細な素子を製造するための方法として従
来の方法より優れていると考えられる。
From the above, it is considered that the method for producing a thermoelectric element of the present invention is superior to the conventional method as a method for producing a very fine element.

【0029】[0029]

【実施例】以下、本発明による実施例を図面に基づいて
説明する。図1〜図6は本発明の熱電素子の製造工程を
示す図面である。
Embodiments of the present invention will be described below with reference to the drawings. 1 to 6 are drawings showing a manufacturing process of a thermoelectric element of the present invention.

【0030】あらかじめN型熱電材料として(Bi、S
b)2 (Se、Te)3 系の燒結体ブロックを用意し、
ダイシングソーで所定の厚さに切断し、その後ラッピン
グ法によって約100μmの厚さに加工したN型熱電半
導体10を形成する。
As an N-type thermoelectric material (Bi, S
b) Prepare a 2 (Se, Te) 3 series sintered block,
The N-type thermoelectric semiconductor 10 is formed by cutting it to a predetermined thickness with a dicing saw and then processing it to a thickness of about 100 μm by a lapping method.

【0031】図1に示すように板状に加工したN型熱電
半導体10と、絶縁体20としてこれも100μm厚の
シート状エポキシ樹脂を用意し、交互に所定数積層す
る。
As shown in FIG. 1, an N-type thermoelectric semiconductor 10 processed into a plate shape and a sheet-shaped epoxy resin also having a thickness of 100 μm are prepared as an insulator 20, and a predetermined number of layers are alternately laminated.

【0032】積層物は約2kg/cm2 の力で加圧しつ
つ150℃において30分加熱し、エポキシ樹脂を硬化
させるとともにN型熱電半導体10を接着する。
The laminate is heated at 150 ° C. for 30 minutes while applying a force of about 2 kg / cm 2 to cure the epoxy resin and bond the N-type thermoelectric semiconductor 10.

【0033】続いて図2に示すように上記積層物をダイ
ヤモンド刃を用いたダイシングソーにより積層面に直角
方向に切断し、複数の柱状のN型チップ11を含むN型
積層体12を複数形成する。このとき、N型積層体12
の厚さもやはり100μmほどに制御する。
Subsequently, as shown in FIG. 2, the above-mentioned laminated body is cut in a direction perpendicular to the laminated surface with a dicing saw using a diamond blade to form a plurality of N-type laminated bodies 12 including a plurality of columnar N-type chips 11. To do. At this time, the N-type laminated body 12
The thickness is also controlled to about 100 μm.

【0034】同じように、図3に示すように、約100
μmの厚さの板状の形状に加工した(Bi、Sb)2
(Se、Te)3 系のP型熱電半導体30と、絶縁体2
0としてこれも100μm厚のシート状エポキシ樹脂を
用意し、交互に所定の枚数積層する。
Similarly, as shown in FIG.
Processed into a plate shape with a thickness of μm (Bi, Sb) 2
(Se, Te) 3 -based P-type thermoelectric semiconductor 30 and insulator 2
A sheet-shaped epoxy resin having a thickness of 100 μm is prepared as 0, and a predetermined number of sheets are alternately laminated.

【0035】ここで、P型熱電半導体30もN型熱電半
導体10と同様に、燒結体ブロックを切断しラッピング
加工することで形成する。
Here, similarly to the N-type thermoelectric semiconductor 10, the P-type thermoelectric semiconductor 30 is also formed by cutting and lapping the sintered block.

【0036】P型熱電半導体30を積層したものも温度
150℃で硬化後、積層面に直角に切断加工し、図4に
示すように複数のP型チップ31が含まれた約100μ
m厚の複数のP型積層体32を形成する。
A stack of P-type thermoelectric semiconductors 30 is also cured at a temperature of 150 ° C. and then cut at a right angle to the stacking surface, and as shown in FIG.
A plurality of m-thick P-type stacked bodies 32 are formed.

【0037】このとき、P型熱電半導体30はN型熱電
半導体10よりも機械的強度が低いため、ダイヤモンド
刃の送り速度はN型熱電半導体10を切断する場合より
も遅く設定する。
At this time, since the P-type thermoelectric semiconductor 30 has lower mechanical strength than the N-type thermoelectric semiconductor 10, the feeding speed of the diamond blade is set to be slower than when the N-type thermoelectric semiconductor 10 is cut.

【0038】このようにして得られたN型積層体12と
P型積層体32とは改めて図5に示すように、絶縁体2
0として、これも100μm厚のシート状エポキシ樹脂
を挟みながらN型積層体12−絶縁体20−P型積層体
32−絶縁体20−N型積層体12−絶縁体20−P型
積層体32のように交互に所定の数を積層して、複合積
層体40を形成する。
The N-type laminated body 12 and the P-type laminated body 32 thus obtained are shown in FIG.
0, this is also N-type laminate 12-insulator 20-P-type laminate 32-insulator 20-N-type laminate 12-insulator 20-P-type laminate 32 while sandwiching a sheet-like epoxy resin having a thickness of 100 μm. As described above, a predetermined number of layers are alternately laminated to form the composite laminated body 40.

【0039】そして、およそ150℃の温度で、時間3
0分加熱硬化させることでN型積層体12とP型積層体
32を接着固化させる。
Then, at a temperature of about 150 ° C., time 3
The N-type laminate 12 and the P-type laminate 32 are adhered and solidified by heating and curing for 0 minutes.

【0040】この後、複合積層体40の上面41と下面
42を粒径#4000までのアルミナ砥粒を用いた遊星
歯車方式のラッピング装置により研磨し、真空蒸着法あ
るいはスパッタリング法により両面に金膜を約1μm付
着させる。
Thereafter, the upper surface 41 and the lower surface 42 of the composite laminated body 40 are polished by a planetary gear type lapping apparatus using alumina abrasive grains having a grain size of up to # 4000, and a gold film is formed on both surfaces by a vacuum deposition method or a sputtering method. Of about 1 μm.

【0041】そして感光性樹脂をコーティング後フォト
マスクを用いて光照射し露光部のみを溶解除去するいわ
ゆるフォトリソグラフィー法と、王水によるウェットエ
ッチング法を用い金膜の不必要部分をエッチング除去
し、上面配線電極51と、下面配線電極52と、外部接
続電極60とを形成する。
Then, after coating the photosensitive resin, a so-called photolithography method of irradiating light with a photomask to dissolve and remove only the exposed portion and a wet etching method with aqua regia are used to etch and remove unnecessary portions of the gold film. The upper surface wiring electrode 51, the lower surface wiring electrode 52, and the external connection electrode 60 are formed.

【0042】図6は複合積層体40の上面41側から見
た平面図である。実線部は上面配線電極51そして破線
部は下面配線電極52であり、両電極によってN型半導
体チップとP型半導体チップはすべてが交互に直列に接
続されることになる。
FIG. 6 is a plan view seen from the upper surface 41 side of the composite laminate 40. The solid line portion is the upper surface wiring electrode 51 and the broken line portion is the lower surface wiring electrode 52, and all of the N-type semiconductor chip and the P-type semiconductor chip are alternately connected in series by both electrodes.

【0043】そして、直列された素子の2つの末端部分
には外部接続電極60があり、この2電極間において発
電した出力を取り出すことができる。
The external connection electrodes 60 are provided at the two end portions of the serially connected elements, and the output generated between the two electrodes can be taken out.

【0044】上記の方法により形成する熱電素子は1c
m×2cmの外形で本発明で必要とする5000個のN
型およびP型の熱電半導体を含むことになる。これによ
り温度差2℃において2Vの起電力が得られ、腕時計を
駆動するに充分な出力が得られることが分かる。
The thermoelectric element formed by the above method is 1c
5000 N required in the present invention with an external size of m × 2 cm
Type and P type thermoelectric semiconductors will be included. As a result, it can be seen that an electromotive force of 2 V is obtained at a temperature difference of 2 ° C., and an output sufficient for driving the wristwatch is obtained.

【0045】ここで、腕時計用の熱電素子の大きさは1
cm×2cm×3mm程であり、上記の実施例において
はN型熱電半導体10と、P型熱電半導体30とを積層
する時点でこのディメンジョンに合致するよう大きさを
規定しておく。
Here, the size of the thermoelectric element for wristwatch is 1
The size is about cm × 2 cm × 3 mm, and in the above-described embodiment, the size is defined so as to match this dimension when the N-type thermoelectric semiconductor 10 and the P-type thermoelectric semiconductor 30 are stacked.

【0046】しかしながら、生産工程においてさらに効
率を向上させたい場合は、数cmあるいは必要に応じて
10cm以上の大きさのN型およびP型半導体の板を用
意し積層工程を経た後、研磨工程の前において所定の大
きさに切断加工して複数の素子を作り上げることも可能
である。
However, if it is desired to further improve the efficiency in the production process, N-type and P-type semiconductor plates having a size of several cm or, if necessary, 10 cm or more are prepared, and after the laminating process, the polishing process is performed. It is also possible to cut and form a plurality of elements into a predetermined size in advance.

【0047】以上の実施例においては絶縁体20にエポ
キシ樹脂を用いたが、その他アクリル系樹脂、ゴム系樹
脂など絶縁性のものなら利用可能である。
Although an epoxy resin is used for the insulator 20 in the above embodiments, any insulating material such as acrylic resin or rubber resin can be used.

【0048】そして絶縁体20は、シート状の接着剤を
用いたが熱電半導体の板や積層体に液状の接着剤をコー
ティングして張り合わせても問題はない。
As the insulator 20, a sheet-like adhesive is used, but there is no problem even if a thermoelectric semiconductor plate or laminate is coated with a liquid adhesive and laminated.

【0049】またこの場合、ガラス板などの絶縁物の両
面に液状の接着剤をコーティングしたものを絶縁体20
とすることで、厚さを任意に制御したり、強度を増大さ
せることも可能である。
In this case, the insulator 20 is made by coating both surfaces of an insulator such as a glass plate with a liquid adhesive.
With this, it is possible to arbitrarily control the thickness and increase the strength.

【0050】さらに、切断の方法はダイシングソーを用
いているが、ワイヤーソーあるいはレーザーによる切断
なども用いることはできる。
Further, although a dicing saw is used as the cutting method, a wire saw or a laser cutting can also be used.

【0051】ここでは腕時計を例に挙げているため、室
温近辺で高性能の(Bi、Sb)2(Se、Te)3 系
の熱電半導体を用いているが、その他たとえば数100
℃の中温域ではPbTe系の熱電半導体、あるいは10
00℃近辺の高温域ではFeSi系、GeSi系の熱電
半導体など、板状に加工可能な熱電半導体ならば他の材
料も利用可能である。
Since a wristwatch is taken as an example here, a high-performance (Bi, Sb) 2 (Se, Te) 3 type thermoelectric semiconductor is used near room temperature, but others such as several hundreds.
PbTe-based thermoelectric semiconductors or 10
In the high temperature region around 00 ° C., other materials can be used as long as they are plate-shaped thermoelectric semiconductors such as FeSi-based and GeSi-based thermoelectric semiconductors.

【0052】[0052]

【発明の効果】以上述べたように、本発明ではN型積層
体とP型積層体を別個に作ることから、材料の物理的特
性からくる加工技術上の問題がなくなることから、微細
な熱電素子を従来より歩留りよく製造することができ
る。
As described above, according to the present invention, since the N-type laminate and the P-type laminate are separately produced, there is no problem in the processing technique due to the physical characteristics of the material, and therefore, the fine thermoelectric effect can be obtained. The device can be manufactured with a higher yield than ever before.

【0053】本発明の製造方法を用いることで、従来実
用化できなかった腕時計などの小型の電子機器へ熱電発
電を利用できるようになる。さらに、この熱電素子の製
造方法は同じ原理を用いる冷却用の熱電素子の製造にも
応用することができる。
By using the manufacturing method of the present invention, it becomes possible to utilize thermoelectric power generation for small electronic devices such as wristwatches which have not been practically used in the past. Furthermore, this method for manufacturing a thermoelectric element can be applied to manufacturing a thermoelectric element for cooling using the same principle.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例における熱電素子の製造方法を
示し、N型熱電半導体と絶縁体を積層した後の状態を示
す斜視図である。
FIG. 1 is a perspective view showing a method for manufacturing a thermoelectric element in an example of the present invention, showing a state after laminating an N-type thermoelectric semiconductor and an insulator.

【図2】本発明の実施例における熱電素子の製造方法を
示し、N型積層体を示す斜視図である。
FIG. 2 is a perspective view showing an N-type laminated body, showing a method for manufacturing a thermoelectric element in an example of the present invention.

【図3】本発明の実施例における熱電素子の製造方法を
示し、P型熱電半導体と絶縁体を積層した後の状態を示
す斜視図である。
FIG. 3 is a perspective view showing a method for manufacturing a thermoelectric element according to an example of the present invention, showing a state after laminating a P-type thermoelectric semiconductor and an insulator.

【図4】本発明の実施例における熱電素子の製造方法を
示し、P型積層体を示す斜視図である。
FIG. 4 is a perspective view showing a P-type laminate, showing a method for manufacturing a thermoelectric element in an example of the present invention.

【図5】本発明の実施例における熱電素子の製造方法を
示し、複合積層体を示す斜視図である。
FIG. 5 is a perspective view showing a composite laminate showing a method for manufacturing a thermoelectric element in an example of the present invention.

【図6】本発明の実施例における熱電素子の製造方法を
示し、複合積層体を上面から見た平面図である。
FIG. 6 is a plan view showing the composite laminated body as seen from above, showing the method for manufacturing a thermoelectric element in the example of the present invention.

【図7】従来の製造方法で製造する熱電素子を示す斜視
図である。
FIG. 7 is a perspective view showing a thermoelectric element manufactured by a conventional manufacturing method.

【符号の説明】[Explanation of symbols]

10 N型熱電半導体 11 N型チップ 12 N型積層体 20 絶縁体 30 P型熱電半導体 31 P型チップ 32 P型積層体 40 複合積層体 51 上面配線電極 52 下面配線電極 60 外部接続電極 10 N-type thermoelectric semiconductor 11 N-type chip 12 N-type laminated body 20 Insulator 30 P-type thermoelectric semiconductor 31 P-type chip 32 P-type laminated body 40 Composite laminated body 51 Upper surface wiring electrode 52 Lower surface wiring electrode 60 External connection electrode

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 板状のN型熱電半導体と絶縁体とを交互
に積層し、これを積層面に直角に切断することで柱状の
N型熱電チップが複数配列するN型積層体を作る工程
と、板状のP型熱電半導体と絶縁体を交互に積層し、こ
れを積層面に直角に切断することで柱状のP型熱電チッ
プが複数配列するP型積層体を作る工程と、さらに絶縁
体を挟んでN型積層体とP型積層体とを積層し複合積層
体を作る工程と、上面配線電極と下面配線電極とを用い
て隣接するN型チップとP型チップとを交互に接続する
ことで直列に接続する複数の熱電対を形成することを特
徴とする熱電素子の製造方法。
1. A step of producing an N-type laminated body in which a plurality of columnar N-type thermoelectric chips are arranged by alternately laminating plate-shaped N-type thermoelectric semiconductors and insulators and cutting the laminated body at a right angle to a laminating plane. And a step of forming a P-type laminated body in which a plurality of columnar P-type thermoelectric chips are arranged by alternately laminating plate-shaped P-type thermoelectric semiconductors and insulators and cutting the laminate at right angles to the lamination plane, and further insulating A step of stacking an N-type laminated body and a P-type laminated body with a body sandwiched between them to form a composite laminated body, and adjacent N-type chips and P-type chips are alternately connected by using upper surface wiring electrodes and lower surface wiring electrodes. A method for manufacturing a thermoelectric element, characterized in that a plurality of thermocouples connected in series are thereby formed.
【請求項2】 絶縁体を挟んで積層するN型積層体とP
型積層体とは、絶縁体−N型積層体−絶縁体−P型積層
体−絶縁体−N型積層体−絶縁体−P型積層体の様に交
互に積層することを特徴とする請求項1に記載する熱電
素子の製造方法。
2. An N-type laminate and a P which are laminated with an insulator interposed therebetween.
The type laminate is characterized by alternately laminating like an insulator-N type laminate-insulator-P type laminate-insulator-N type laminate-insulator-P type laminate. Item 1. A method for manufacturing a thermoelectric element according to item 1.
JP7026515A 1995-02-15 1995-02-15 Manufacture of thermoelectric element Pending JPH08222770A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7026515A JPH08222770A (en) 1995-02-15 1995-02-15 Manufacture of thermoelectric element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7026515A JPH08222770A (en) 1995-02-15 1995-02-15 Manufacture of thermoelectric element

Publications (1)

Publication Number Publication Date
JPH08222770A true JPH08222770A (en) 1996-08-30

Family

ID=12195622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7026515A Pending JPH08222770A (en) 1995-02-15 1995-02-15 Manufacture of thermoelectric element

Country Status (1)

Country Link
JP (1) JPH08222770A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998022984A1 (en) * 1996-11-15 1998-05-28 Citizen Watch Co., Ltd. Method of manufacturing thermionic element
JP2009065075A (en) * 2007-09-10 2009-03-26 Yamaha Corp Thermoelectric module and manufacturing method thereof
WO2012114650A1 (en) 2011-02-22 2012-08-30 Panasonic Corporation Thermoelectric conversion element and producing method thereof
JP2014179372A (en) * 2013-03-13 2014-09-25 Kitagawa Kogyo Co Ltd Thermoelectric conversion module
JP2017183709A (en) * 2016-03-24 2017-10-05 三菱マテリアル株式会社 Thermoelectric conversion module
CN107293634A (en) * 2017-06-14 2017-10-24 上海萃励电子科技有限公司 A kind of preparation method of novel flexible thermoelectric element

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998022984A1 (en) * 1996-11-15 1998-05-28 Citizen Watch Co., Ltd. Method of manufacturing thermionic element
US6232542B1 (en) 1996-11-15 2001-05-15 Citizen Watch Co., Ltd. Method of fabricating thermoelectric device
US6441296B2 (en) 1996-11-15 2002-08-27 Citizen Watch Co., Ltd. Method of fabricating thermoelectric device
US6441295B2 (en) 1996-11-15 2002-08-27 Citizen Watch Co. Ltd. Method of fabricating thermoelectric device
JP2009065075A (en) * 2007-09-10 2009-03-26 Yamaha Corp Thermoelectric module and manufacturing method thereof
WO2012114650A1 (en) 2011-02-22 2012-08-30 Panasonic Corporation Thermoelectric conversion element and producing method thereof
US9219214B2 (en) 2011-02-22 2015-12-22 Panasonic Intellectual Property Management Co., Ltd. Thermoelectric conversion element and producing method thereof
JP2014179372A (en) * 2013-03-13 2014-09-25 Kitagawa Kogyo Co Ltd Thermoelectric conversion module
JP2017183709A (en) * 2016-03-24 2017-10-05 三菱マテリアル株式会社 Thermoelectric conversion module
CN107293634A (en) * 2017-06-14 2017-10-24 上海萃励电子科技有限公司 A kind of preparation method of novel flexible thermoelectric element

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