JPH08222580A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH08222580A JPH08222580A JP4904595A JP4904595A JPH08222580A JP H08222580 A JPH08222580 A JP H08222580A JP 4904595 A JP4904595 A JP 4904595A JP 4904595 A JP4904595 A JP 4904595A JP H08222580 A JPH08222580 A JP H08222580A
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- Japan
- Prior art keywords
- layer
- type
- amorphous
- substrate
- electrode layer
- Prior art date
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、II−VI族化合物半導体
エピタキシャル結晶からなるｐ型層を基板上に有する半
導体装置の製造方法に関し、特に、有機金属化学気相成
長法（ＭＯＣＶＤ法）にて形成されたｐ型層と電極層と
の接触部分に特徴を有する半導体装置の製造方法に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a p-type layer made of a II-VI group compound semiconductor epitaxial crystal on a substrate, and more particularly to a metal organic chemical vapor deposition method (MOCVD method). The present invention relates to a method for manufacturing a semiconductor device having a contact portion between a p-type layer and an electrode layer formed as described above.
【０００２】[0002]
【従来の技術】従来、例えばＺｎＳｅ（セレン化亜鉛）
等のII−VI族エピタキシャル結晶からなるｐ型層を基板
上に形成し、このｐ型層上にＡｕ（金）電極層を形成す
る場合、このｐ型層を形成した基板を一旦容器外に出
し、別の容器に入れてＡｕ電極層を形成するという過程
があるため、ｐ型層が外気に接触し、ｐ型層の表面に酸
化絶縁層が形成されることがあった。この酸化絶縁層
は、Ａｕ電極層を形成した後も残り、Ａｕ電極層とｐ型
層との間に介在することとなるため、特に酸化絶縁層と
Ａｕ電極層との界面の電位障壁が大きく（２〜１０Ｖ程
度）なり、オーム性接触が得られず、その電気的特性を
低下させる因となっている。2. Description of the Related Art Conventionally, for example, ZnSe (zinc selenide) is used.
When a p-type layer made of II-VI group epitaxial crystal such as the above is formed on a substrate and an Au (gold) electrode layer is formed on the p-type layer, the substrate on which the p-type layer is formed is temporarily placed outside the container. Since there is a process in which the p-type layer comes out and is placed in another container to form the Au electrode layer, the p-type layer may come into contact with the outside air, and an oxide insulating layer may be formed on the surface of the p-type layer. This oxide insulating layer remains after the Au electrode layer is formed and is interposed between the Au electrode layer and the p-type layer, so that the potential barrier at the interface between the oxide insulating layer and the Au electrode layer is particularly large. (About 2 to 10 V), an ohmic contact cannot be obtained, which is a cause of lowering the electrical characteristics.
【０００３】そこで、II−VI族エピタキシャル結晶から
なるｐ型層上にＡｕ電極層を形成する場合、ｐ型層が形
成された基板を、Ａｕ電極層を形成する直前に、飽和ブ
ロム水系エッチャント（飽和ブロム水と臭化ブロムと水
の混合液）で化学処理することによってｐ型層上の酸化
絶縁層を取り除き、その後直ちに電極蒸着室に基板を入
れてＡｕ電極層を形成する方法が提案されている（第５
４回応用物理学会学術講演会講演予稿集 Ｐ２５７ ２
９ｐ−ＺＬ−１７（１９９３）参照）。Therefore, when the Au electrode layer is formed on the p-type layer made of II-VI group epitaxial crystal, the substrate on which the p-type layer is formed is replaced with a saturated bromine aqueous etchant (immediately before the formation of the Au electrode layer). A method has been proposed in which the oxidation insulating layer on the p-type layer is removed by chemical treatment with saturated bromine water, a mixed solution of bromine and water, and the Au electrode layer is immediately formed by placing the substrate in the electrode deposition chamber. (The fifth
Proceedings of the 4th JSAP Academic Lecture Meeting P257 2
9p-ZL-17 (1993)).
【０００４】しかしながらこの方法では、飽和ブロム水
系エッチャントで化学処理をするために操作が繁雑であ
るばかりでなく、ｐ型層上の酸化絶縁層を完全に取り除
くことができないために界面残留電位障壁（０．８〜
１．５Ｖ程度）が残り、完全なオーム性接触が得られな
いという問題があった（第５５回応用物理学会学術講演
会講演予稿集 Ｐ２６３ ２１ａ−ＭＢ−３（１９９
４）参照）。However, in this method, not only the operation is complicated due to the chemical treatment with the saturated bromine aqueous etchant, but also the interfacial residual potential barrier ( 0.8 ~
There is a problem that a perfect ohmic contact cannot be obtained (about 1.5 V) (Proceedings of the 55th JSAP Academic Lecture Meeting P263 21a-MB-3 (199).
See 4)).
【０００５】[0005]
【発明が解決しようとする課題】本発明は、このような
従来技術の問題点を解消するべく案出されたものであ
り、その主な目的は、II−VI族化合物半導体エピタキシ
ャル結晶からなるｐ型層と電極層間のオーム性接触が容
易に得られる半導体装置の製造方法を提供することにあ
る。SUMMARY OF THE INVENTION The present invention has been devised to solve the above-mentioned problems of the prior art, and its main purpose is to provide a p-type compound semiconductor II-VI compound semiconductor epitaxial crystal. It is an object of the present invention to provide a method for manufacturing a semiconductor device in which an ohmic contact between a mold layer and an electrode layer can be easily obtained.
【０００６】[0006]
【課題を解決するための手段】このような目的は、本発
明によれば、II−VI族化合物半導体エピタキシャル結晶
からなるｐ型層を有機金属化学気相成長法または光有機
金属気相成長法により第１の基板温度にて基板上に形成
する過程と、VI族元素であるＳ、Ｓｅ、或いはＴｅの非
晶質層を光有機金属気相成長法により第１の基板温度よ
りも低い第２の基板温度にてｐ型層上に形成する過程
と、別の真空容器内で熱処理して非晶質層のみを蒸発さ
せる過程と、非晶質層が蒸発したｐ型層上に電極層を形
成する過程とを有することを特徴とする半導体装置の製
造方法を提供することにより達成される。According to the present invention, a p-type layer made of a II-VI compound semiconductor epitaxial crystal is formed by a metal organic chemical vapor deposition method or a photo-metal organic chemical vapor deposition method. By the process of forming on the substrate at the first substrate temperature by using the group VI element S, Se, or Te amorphous layer by the photo-organic metal vapor phase epitaxy method lower than the first substrate temperature. 2. Forming on the p-type layer at the substrate temperature of 2; heat-treating in another vacuum container to evaporate only the amorphous layer; and electrode layer on the p-type layer from which the amorphous layer is evaporated. And a process for forming a semiconductor device.
【０００７】[0007]
【作用】このように、II−VI族化合物半導体エピタキシ
ャル結晶からなるｐ型層上に、電極層を形成する前にVI
族元素の非晶質層を形成し、電極層を形成する真空容器
内で熱処理してこの非晶質層のみを蒸発させるものとす
れば、非晶質層上の酸化絶縁層が非晶質層と共に蒸発す
るため、ｐ型層上に酸化絶縁層が形成されることがなく
なる。これにより、電極層がｐ型層に直接接触するため
に電極層とｐ型層間の界面残留電位障壁が小さくなり、
両者間にオーム性接触が得られることとなる。特に、光
有機金属気相成長法（光ＭＯＣＶＤ法）を用いることに
より、低温で非晶質層を成長させることができる。As described above, VI is formed before the electrode layer is formed on the p-type layer made of II-VI group compound semiconductor epitaxial crystal.
If an amorphous layer of a group element is formed and heat-treated in a vacuum container for forming an electrode layer to evaporate only this amorphous layer, the oxide insulating layer on the amorphous layer is amorphous. Evaporation with the layer prevents the oxide insulating layer from being formed on the p-type layer. This reduces the interface residual potential barrier between the electrode layer and the p-type layer because the electrode layer directly contacts the p-type layer,
An ohmic contact will be obtained between them. In particular, an amorphous layer can be grown at a low temperature by using the photometal organic chemical vapor deposition method (optical MOCVD method).
【０００８】[0008]
【実施例】以下、添付の図面を参照して本発明の好適実
施例について詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings.
【０００９】図１は、本発明に基づく方法により製造さ
れた半導体レーザ装置の要部断面図である。図１−
（ａ）に於て、ｎ型ＧａＡｓ基板１上には、ｎ型ＺｎＳ
ｅのバッファ層２と、ｎ型ＺｎＳＳｅのクラッド層３
と、ＣｄＺｎＳｅからなる活性層４と、ｐ型ＺｎＳＳｅ
のクラッド層５と、ｐ型ＺｎＳｅの高濃度ドープ層６と
が、光ＭＯＣＶＤ法によりこの順に形成され、積層され
ている。また、ｐ型ＺｎＳｅの高濃度ドープ層６の上層
には、Ｓからなる非晶質層７が、光ＭＯＣＶＤ法により
積層されている。FIG. 1 is a cross-sectional view of a main part of a semiconductor laser device manufactured by the method according to the present invention. Figure 1-
In (a), n-type ZnS is formed on the n-type GaAs substrate 1.
e buffer layer 2 and n-type ZnSSe cladding layer 3
An active layer 4 made of CdZnSe, and p-type ZnSSe
The clad layer 5 and the p-type ZnSe high-concentration doped layer 6 are formed and stacked in this order by the optical MOCVD method. Further, an amorphous layer 7 made of S is laminated on the upper layer of the heavily doped p-type ZnSe layer 6 by an optical MOCVD method.
【００１０】ここで、ｎ型ＺｎＳｅのバッファ層２は、
厚みが１０００オングストローム、ｎ型ＺｎＳＳｅのク
ラッド層３は、厚みが２．０μｍ（組成；１Ｚｎ、０．
０７Ｓ、０．９３Ｓｅ）、ＣｄＺｎＳｅの活性層４は、
厚みが１００オングストローム（組成；０．１Ｃｄ、
０．９Ｚｎ、１Ｓｅ）、ｐ型ＺｎＳＳｅのクラッド層５
は、厚みが１．５μｍ（組成；１Ｚｎ、０．０７Ｓ、
０．９３Ｓｅ）、ｐ型ＺｎＳｅの高濃度ドープ層６は、
厚みが１０００オングストローム、キャリア濃度１×１
０18ｃｍ-3となるように、光ＭＯＣＶＤ法により、第１
の基板温度３５０℃で順に結晶成長させた。また、非晶
質層７は、ｐ型ＺｎＳｅの高濃度ドープ層６を光ＭＯＣ
ＶＤ法により形成した後、第２の基板温度１００℃に下
げ、即ちＳが結晶化しない温度に下げて同じ光ＭＯＣＶ
Ｄ法にて非晶質のＳを成膜させることによって形成し
た。このように、光で励起する光ＭＯＣＶＤ法を用いる
ことにより、ＡｒＦエキシマレーザ等によって比較的低
温で原料を分解させることができるので、基板温度が低
温でも非晶質層を成長させることができる。尚、上記し
た各ｎ型層のドーパントにはＩ（ヨウ素）を用い、各ｐ
型層のドーパントにはＮ（窒素）を用いた。Here, the n-type ZnSe buffer layer 2 is
The clad layer 3 made of n-type ZnSSe having a thickness of 1000 angstroms has a thickness of 2.0 μm (composition: 1 Zn, 0.
07S, 0.93Se), the active layer 4 of CdZnSe is
Thickness is 100 Å (composition; 0.1 Cd,
0.9Zn, 1Se), p-type ZnSSe cladding layer 5
Has a thickness of 1.5 μm (composition: 1 Zn, 0.07 S,
0.93 Se), the high-concentration doped layer 6 of p-type ZnSe is
Thickness is 1000 Å, carrier concentration is 1 × 1
0 18 so that the cm -3, by the light MOCVD method, first
Were sequentially grown at a substrate temperature of 350 ° C. Further, the amorphous layer 7 is formed by using a high-concentration doped layer 6 of p-type ZnSe as an optical MOC.
After forming by the VD method, the second substrate temperature is lowered to 100 ° C., that is, the temperature at which S is not crystallized, and the same optical MOCV is obtained.
It was formed by depositing amorphous S by the D method. As described above, by using the optical MOCVD method excited by light, the raw material can be decomposed at a relatively low temperature by an ArF excimer laser or the like, so that the amorphous layer can be grown even when the substrate temperature is low. In addition, I (iodine) was used as a dopant for each of the n-type layers described above, and each p
N (nitrogen) was used as the dopant of the mold layer.
【００１１】次に、このようにして各層を成長させた基
板を別の真空容器に移し、図１−（ｂ）に示すように、
真空状態にした容器内にて基板温度２００℃で非晶質層
７を蒸発させた。これにより、非晶質層７と共に酸化絶
縁層が蒸発し、酸化絶縁層のないｐ型ＺｎＳｅの高濃度
ドープ層６の表面が現れる。Next, the substrate on which each layer is grown in this way is transferred to another vacuum container, and as shown in FIG. 1- (b),
The amorphous layer 7 was evaporated at a substrate temperature of 200 ° C. in a vacuumed container. As a result, the oxide insulating layer is evaporated together with the amorphous layer 7, and the surface of the p-type ZnSe heavily doped layer 6 without the oxide insulating layer appears.
【００１２】この後、図１−（ｃ）に示すように、同じ
容器内にてｐ型ＺｎＳｅの高濃度ドープ層６上にＡｕ電
極層８を蒸着により成膜させた。Thereafter, as shown in FIG. 1- (c), an Au electrode layer 8 was formed on the heavily doped p-type ZnSe layer 6 by vapor deposition in the same container.
【００１３】更にｎ型ＧａＡｓ基板１の裏面には、図１
−（ｄ）に示すように、Ａｕ／Ｇｅ（ゲルマニウム）電
極層９を蒸着により形成した。Further, on the back surface of the n-type GaAs substrate 1, as shown in FIG.
As shown in (d), an Au / Ge (germanium) electrode layer 9 was formed by vapor deposition.
【００１４】このようにして製造された半導体装置によ
れば、ｐ型層の上層から酸化絶縁層が略完全に除去され
るため、ｐ型層とＡｕ電極層８との間の界面電位障壁が
小さくなり、両層間のオーム性接触が可能となる。According to the semiconductor device manufactured as described above, the oxide insulating layer is almost completely removed from the upper layer of the p-type layer, so that the interface potential barrier between the p-type layer and the Au electrode layer 8 is eliminated. It becomes smaller and allows ohmic contact between both layers.
【００１５】尚、本実施例では、ｐ型ＺｎＳｅの高濃度
ドープ層６上にＳの非晶質層７を形成したが、非晶質層
７を構成する原料として、ＴｅあるいはＳｅを用いても
同様の結果が得られる。但し、非晶質層７を容易にかつ
確実に蒸発させるためには、非晶質層７の厚さを１００
０オングストローム以下に抑えることが望ましい。In this embodiment, the amorphous layer 7 of S is formed on the heavily doped p-type ZnSe layer 6. However, Te or Se is used as a raw material for the amorphous layer 7. Produces similar results. However, in order to vaporize the amorphous layer 7 easily and surely, the thickness of the amorphous layer 7 is set to 100.
It is desirable to keep it below 0 angstrom.
【００１６】また、本実施例では、ｐ型ＺｎＳＳｅのク
ラッド層５と非晶質層７との間にｐ型ＺｎＳｅの高濃度
ドープ層６を介在させたが、ｐ型ＺｎＳＳｅのクラッド
層５の上層に直接非晶質層７を形成しても良い。加え
て、本実施例では、結晶成長基板としてＧａＡｓ基板を
用いたが、ＺｎＳｅやＧａＰ、或いはＧａＡｓ基板上に
適宜な薄膜結晶（例えばエピタキシャル結晶成長させた
ＧａＡｓ膜など）を形成したものであっても良い。In this embodiment, the high-concentration p-type ZnSe heavily doped layer 6 is interposed between the p-type ZnSSe cladding layer 5 and the amorphous layer 7. The amorphous layer 7 may be formed directly on the upper layer. In addition, although the GaAs substrate is used as the crystal growth substrate in this embodiment, an appropriate thin film crystal (for example, an epitaxially grown GaAs film) is formed on the ZnSe, GaP, or GaAs substrate. Is also good.
【００１７】[0017]
【発明の効果】上記の説明により明らかなように、本発
明に基づく半導体装置の製造方法によれば、II−VI族化
合物半導体エピタキシャル結晶からなるｐ型層の成膜に
連続して光ＭＯＣＶＤ法によって非晶質層を成膜し、電
極層を形成する容器内にて非晶質層を蒸発させた後に電
極層を形成するものとしたので、ｐ型層上の酸化絶縁層
が略完全に除去され、ｐ型層と電極層間の界面残留電位
障壁が小さくなる。従って、単純な構成で容易にｐ型層
とＡｕ電極層との間でオーム性接触が得られる。以上の
ことから、電気的特性が良く信頼性の高い半導体装置が
歩留り良く製造できる。As is apparent from the above description, according to the method of manufacturing a semiconductor device of the present invention, the optical MOCVD method is continuously performed after the formation of the p-type layer made of the II-VI group compound semiconductor epitaxial crystal. Since the amorphous layer is formed by, and the electrode layer is formed after the amorphous layer is evaporated in the container for forming the electrode layer, the oxide insulating layer on the p-type layer is almost completely formed. As a result, the interface residual potential barrier between the p-type layer and the electrode layer becomes smaller. Therefore, an ohmic contact can be easily obtained between the p-type layer and the Au electrode layer with a simple structure. From the above, a semiconductor device having good electrical characteristics and high reliability can be manufactured with high yield.
【図１】本発明が適用された半導体装置としての半導体
レーザの製造過程を示す要部断面図。FIG. 1 is a main-portion cross-sectional view showing the manufacturing process of a semiconductor laser as a semiconductor device to which the present invention is applied.
１ ｎ型ＧａＡｓ基板 ２ ｎ型ＺｎＳｅのバッファ層 ３ ｎ型ＺｎＳＳｅのクラッド層 ４ ＣｄＺｎＳｅ活性層 ５ ｐ型ＺｎＳＳｅのクラッド層 ６ ｐ型ＺｎＳｅの高濃度ドープ層 ７ 非晶質層 ８ Ａｕ電極層 ９ Ａｕ／Ｇｅ電極層 1 n-type GaAs substrate 2 n-type ZnSe buffer layer 3 n-type ZnSSe cladding layer 4 CdZnSe active layer 5 p-type ZnSSe cladding layer 6 p-type ZnSe heavily doped layer 7 amorphous layer 8 Au electrode layer 9 Au / Ge electrode layer
───────────────────────────────────────────────────── フロントページの続き (72)発明者 藤井 智 東京都千代田区大手町２−６−３ 新日本 製鐵株式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Satoshi Fujii 2-6-3 Otemachi, Chiyoda-ku, Tokyo Shin Nippon Steel Corporation
Claims (1)
晶からなるｐ型層を有機金属化学気相成長法または光有
機金属気相成長法により第１の基板温度にて基板上に形
成する過程と、 VI族元素であるＳ（硫黄）、Ｓｅ（セレン）、或いはＴ
ｅ（テルル）の非晶質層を光有機金属気相成長法により
前記第１の基板温度よりも低い第２の基板温度にて前記
ｐ型層上に形成する過程と、 別の真空容器内で熱処理して前記非晶質層のみを蒸発さ
せる過程と、 前記非晶質層が蒸発した前記ｐ型層上に電極層を形成す
る過程とを有することを特徴とする半導体装置の製造方
法。1. A process of forming a p-type layer composed of a II-VI group compound semiconductor epitaxial crystal on a substrate at a first substrate temperature by a metal organic chemical vapor deposition method or a photo-metal organic chemical vapor deposition method, Group VI elements S (sulfur), Se (selenium), or T
Forming an amorphous layer of e (tellurium) on the p-type layer at a second substrate temperature lower than the first substrate temperature by a photo-organic metal organic chemical vapor deposition method, and in another vacuum container And a step of forming an electrode layer on the p-type layer where the amorphous layer is evaporated, and a method of manufacturing a semiconductor device, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4904595A JPH08222580A (en) | 1995-02-13 | 1995-02-13 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4904595A JPH08222580A (en) | 1995-02-13 | 1995-02-13 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08222580A true JPH08222580A (en) | 1996-08-30 |
Family
ID=12820121
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4904595A Withdrawn JPH08222580A (en) | 1995-02-13 | 1995-02-13 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08222580A (en) |
-
1995
- 1995-02-13 JP JP4904595A patent/JPH08222580A/en not_active Withdrawn
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