JPH08181236A - Substrate for mounting electronic part and electronic-part mounter - Google Patents
Substrate for mounting electronic part and electronic-part mounterInfo
- Publication number
- JPH08181236A JPH08181236A JP6336009A JP33600994A JPH08181236A JP H08181236 A JPH08181236 A JP H08181236A JP 6336009 A JP6336009 A JP 6336009A JP 33600994 A JP33600994 A JP 33600994A JP H08181236 A JPH08181236 A JP H08181236A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- mounting
- electronic
- substrate
- cap
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、電子部品搭載用基板及
び電子部品搭載装置に関し、特にはピングリッドアレイ
などの電子部品パッケージに応用するのに適した封止構
造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component mounting substrate and an electronic component mounting apparatus, and more particularly to a sealing structure suitable for application to an electronic component package such as a pin grid array.
【０００２】[0002]
【従来の技術】従来、チップキャリア、ピングリッドア
レイ等の電子部品搭載用基板の封止用キャップに関する
ものには、電子部品（半導体素子）の封止作業性及び封
止後の電子部品の信頼性を向上させることを目的とし、
電子部品搭載用基板との接着面側に接着層となる有機系
樹脂がＢ−ステージの状態で均一に塗布された電子部品
封止用キャップとその製造方法が開示されている。（特
公平３−５８５４１号公報）。2. Description of the Related Art Conventionally, a cap for sealing an electronic component mounting substrate such as a chip carrier or a pin grid array has a workability of sealing an electronic component (semiconductor element) and a reliability of the electronic component after sealing. For the purpose of improving
An electronic component sealing cap in which an organic resin that serves as an adhesive layer is evenly applied in the state of the B-stage on the adhesive surface side of an electronic component mounting substrate and a method for manufacturing the same are disclosed. (Japanese Patent Publication No. 3-58541).
【０００３】この種の電子部品封止用キャップにおいて
は、図５に示すように、電子部品を実装するに際して、
キャップに接着剤を直接塗布する方法は、キャップの形
状、特に切削加工又は絞り加工等により凹部を有するキ
ャップの場合、凹部の内底部への接着剤の塗布は極めて
困難であり、その対策として予め離型用の板又はフィル
ム上に所定の形状で有機系樹脂の接着層が形成された
後、キャップに有機系樹脂が搭載され加熱溶融により密
着されるのであらゆる形状のキャップの接着面側に均一
な接着層を形成できるという効果がある。In this type of electronic component sealing cap, when mounting electronic components, as shown in FIG.
The method of directly applying the adhesive to the cap is such that it is extremely difficult to apply the adhesive to the inner bottom of the recess in the case of a cap having a recess due to the shape of the cap, particularly cutting or drawing. After the organic resin adhesive layer is formed in a predetermined shape on the release plate or film, the organic resin is mounted on the cap and adhered by heating and melting, so it is uniform on the adhesive surface side of the cap of any shape. There is an effect that a different adhesive layer can be formed.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上記電
子部品封止用キャップにおいて、キャップの接着面側に
いくら均一な接着層を形成しても接着剤を加熱溶融する
ことで、接着剤のはみ出しは避けられない問題があっ
た。特に、電子部品の封止方法として、キャップ内部を
中空状態（電子部品を樹脂で封止しない状態）にする場
合には、キャップの接着剤が電子部品までかからないよ
うにするためにそのフロー管理が困難となる場合が多か
った。However, in the above-mentioned electronic component sealing cap, the adhesive does not squeeze out by heating and melting the adhesive even if a uniform adhesive layer is formed on the adhesive surface side of the cap. There was an unavoidable problem. In particular, as a method of sealing electronic parts, when the inside of the cap is in a hollow state (where the electronic parts are not sealed with resin), the flow control is performed to prevent the adhesive of the cap from reaching the electronic parts. It was often difficult.
【０００５】本発明は、上記問題点を解決するものであ
り、電子部品封止用キャップの接着剤のはみ出しを無く
し、信頼性の高い電子部品搭載用基板及びその搭載装置
を提供することを目的とする。The present invention solves the above-mentioned problems, and an object of the present invention is to provide a highly reliable electronic component mounting substrate and a mounting device for the same, in which the adhesive of the electronic component sealing cap does not stick out. And
【０００６】[0006]
【課題を解決するための手段】本発明者は、電子部品封
止用キャップの接着剤のはみ出しを無くし、信頼性の高
い電子部品搭載用基板及びその搭載装置を鋭意検討した
所、前記基板搭載部の近傍周囲で前記導体回路のない絶
縁層部分に、１つあるいは複数の溝を形成してその溝が
接着剤の流れをくい止めることを見出して、本発明を完
成したのである。DISCLOSURE OF THE INVENTION The inventors of the present invention have made earnest studies on a highly reliable electronic component mounting substrate and a mounting device therefor, which prevent the adhesive of the electronic component sealing cap from squeezing out. The present invention has been completed by finding that one or a plurality of grooves are formed in the insulating layer portion without the conductor circuit around the vicinity of the portion and the grooves block the flow of the adhesive.
【０００７】即ち、本第１発明の電子部品搭載用基板９
は、絶縁基板の表面に導体回路７が形成され、該導体回
路７と電気的に接続する電子部品２を搭載するための搭
載部８を有し、前記搭載部８の近傍周囲で前記導体回路
７のない絶縁層部分３に、１つあるいは複数の溝１が形
成されていることを特徴とし、前記溝は、電子部品を封
止するキャップ５の接着剤６流れ止め用の溝であること
を特徴とする。That is, the electronic component mounting substrate 9 of the first invention
Has a conductor circuit 7 formed on the surface of an insulating substrate, and has a mounting portion 8 for mounting an electronic component 2 electrically connected to the conductor circuit 7, and the conductor circuit 7 is provided around the mounting portion 8 in the vicinity thereof. One or a plurality of grooves 1 are formed in the insulating layer portion 3 where there is no 7. The groove is a groove for stopping the flow of the adhesive 6 of the cap 5 for sealing the electronic component. Is characterized by.
【０００８】[0008]
【実施例】以下、実施例により本発明を具体的に説明す
る。本実施例１の電子部品搭載用基板９（図１の斜視図
及び図２の断面図）を構成する電子部品搭載装置１０
は、図３に示すように、電子部品搭載用基板９に電子部
品２が実装され、その近傍周囲には電子部品搭載装置１
０の溝１が形成され、その大きさ・表面形状は、幅１．
０ｍｍ×深さ０．５ｍｍの四角状（電子部品搭載部の外
側周囲に配置）である場合が多いが、キャップの形状に
応じて円形状もしくは楕円状であっても良い。また、前
記溝は、一つである場合が多いが前記導体回路のない絶
縁層部分３の領域の大小に従い必要に応じて二つあるい
はそれ以上の種々変更した実施例とすることができる。The present invention will be described below in detail with reference to examples. The electronic component mounting apparatus 10 that constitutes the electronic component mounting substrate 9 (perspective view of FIG. 1 and sectional view of FIG. 2) of the first embodiment.
As shown in FIG. 3, the electronic component 2 is mounted on the electronic component mounting board 9, and the electronic component mounting apparatus 1 is mounted in the vicinity of the electronic component mounting substrate 9.
A groove 1 having a width of 1.
In many cases, the shape is a square with 0 mm and a depth of 0.5 mm (arranged around the outside of the electronic component mounting portion), but may be circular or elliptical depending on the shape of the cap. In addition, although the number of the grooves is often one, two or more various modified examples can be provided as necessary according to the size of the region of the insulating layer portion 3 where the conductor circuit is not provided.
【０００９】上記電子部品搭載用基板９はガラス布／エ
ポキシ樹脂からなり、その大きさは６０ｍｍ×６０ｍｍ
×２．０（厚さ）ｍｍである。尚、ガラス布／エポキシ
樹脂の代わりに、ガラス布とビスマレイミド・トリアジ
ン樹脂又はポリイミド樹脂等の耐熱性のある樹脂とから
なる基材であっても良い。そして、この表面には所定の
導体回路（銅箔製）７、電子部品搭載部８、スルーホー
ルが通常のプリント配線板の製造方法（例えばサブトラ
クティブ法）により形成されており、これらの表面には
ニッケル／金等によるめっき層が施されている。更に、
導体回路７上の一部には絶縁層部分３であるソルダーレ
ジスト層が形成されている。また、前記基板９はピング
リッドアレイやリードレスチップキャリア等の基板に応
用されるので、単層はもとより多層構造であっても良い
ことは言うまでもない。その多層構造の実施例を図４に
示す。The electronic component mounting substrate 9 is made of glass cloth / epoxy resin and has a size of 60 mm × 60 mm.
× 2.0 (thickness) mm. Instead of glass cloth / epoxy resin, a base material made of glass cloth and a heat-resistant resin such as bismaleimide / triazine resin or polyimide resin may be used. Then, a predetermined conductor circuit (made of copper foil) 7, an electronic component mounting portion 8 and a through hole are formed on this surface by an ordinary printed wiring board manufacturing method (for example, a subtractive method). Has a plated layer of nickel / gold or the like. Furthermore,
A solder resist layer, which is the insulating layer portion 3, is formed on a part of the conductor circuit 7. Since the substrate 9 is applied to a substrate such as a pin grid array or a leadless chip carrier, it goes without saying that it may have a single-layer structure or a multi-layer structure. An example of the multilayer structure is shown in FIG.
【００１０】上記電子部品搭載用基板９に設けられた電
子部品搭載部８には、電子部品（大きさ；１５．０ｍｍ
×１５．０ｍｍ×０．４（厚さ）ｍｍの半導体チップ）
２が接着剤層により接着固定される。この電子部品２
は、ボンディングワイヤー４により導体回路７に接続さ
れる。The electronic component mounting portion 8 provided on the electronic component mounting substrate 9 has an electronic component (size: 15.0 mm).
X 15.0 mm x 0.4 (thickness) mm semiconductor chip)
2 is adhesively fixed by the adhesive layer. This electronic component 2
Are connected to the conductor circuit 7 by the bonding wires 4.
【００１１】尚、本発明においては、前記具体的実施例
に示すものに限られず、目的、用途に応じて本発明の範
囲内で種々変更した実施例とすることができる。即ち、
ピングリッドアレイやリードレスチップキャリアに限ら
れず、電子部品搭載用基板の封止構造を形成するもので
あれば何でも良い。The present invention is not limited to the specific examples described above, but various modifications may be made within the scope of the present invention depending on the purpose and application. That is,
Not limited to the pin grid array or the leadless chip carrier, any material may be used as long as it forms the sealing structure of the electronic component mounting substrate.
【００１２】[0012]
【作用及び効果】本発明によれば、電子部品搭載用基板
９の搭載部８の近傍周囲で導体回路のない絶縁層部分３
に、１つあるいは複数の溝１を形成してその溝により接
着剤６の流れをくい止めることができ、電子部品封止用
キャップ５の接着剤の量をフロー管理をする必要がない
為、キャップの接着が容易であり、その結果、製品の不
良発生が少なくなり、コストダウンにつながる効果があ
る。According to the present invention, the insulating layer portion 3 having no conductor circuit around the mounting portion 8 of the electronic component mounting substrate 9 is provided.
In addition, since one or a plurality of grooves 1 can be formed and the flow of the adhesive 6 can be stopped by the grooves, it is not necessary to control the flow of the amount of the adhesive in the electronic component sealing cap 5. Is easily adhered, and as a result, defective products are less likely to occur, which leads to cost reduction.
【図１】本実施例１に係る、電子部品搭載用基板の斜視
図である。FIG. 1 is a perspective view of an electronic component mounting board according to a first embodiment.
【図２】本実施例１に係る、電子部品搭載用基板の断面
図である。FIG. 2 is a cross-sectional view of an electronic component mounting board according to the first embodiment.
【図３】本実施例１に係る、電子部品搭載装置の断面図
である。FIG. 3 is a sectional view of an electronic component mounting apparatus according to the first embodiment.
【図４】本発明に係る、他の態様を示す電子部品搭載装
置の断面図である。FIG. 4 is a sectional view of an electronic component mounting apparatus showing another embodiment according to the present invention.
【図５】従来の電子部品搭載装置である。FIG. 5 is a conventional electronic component mounting apparatus.
１；溝、２；電子部品、３；絶縁層部分、４；ボンディ
ングワイヤー、５；電子部品封止用キャップ、６；接着
剤、７；導体回路、８；電子部品搭載部、９；電子部品
搭載用基板、１０；電子部品搭載装置DESCRIPTION OF SYMBOLS 1; Groove, 2; Electronic part, 3; Insulating layer part, 4; Bonding wire, 5; Cap for sealing electronic part, 6; Adhesive, 7; Conductor circuit, 8; Electronic part mounting part, 9; Electronic part Mounting board, 10; Electronic component mounting device
Claims (4)
導体回路と電気的に接続する電子部品を搭載するための
搭載部を有する電子部品搭載用基板において、前記搭載
部の近傍周囲で前記導体回路のない絶縁層部分に、１つ
あるいは複数の溝が形成され、前記溝は、電子部品を封
止するキャップの接着剤流れ止め用に使われる溝である
ことを特徴とする電子部品搭載用基板。1. An electronic component mounting board having a conductor circuit formed on the surface of an insulating substrate and having a mounting portion for mounting an electronic component electrically connected to the conductor circuit, in the vicinity of the mounting portion. One or a plurality of grooves are formed in the insulating layer portion having no conductor circuit, and the grooves are grooves used as an adhesive flow stop for a cap that seals the electronic parts. Mounting board.
する請求項１に記載の電子部品搭載用基板。2. The electronic component mounting substrate according to claim 1, wherein the substrate has a multilayer structure.
レスチップキャリア、ランドグリッドアレイあるいはボ
ールグリッドアレイであることを特徴とする請求項１〜
２に記載の電子部品搭載用基板。3. The substrate is a pin grid array, a leadless chip carrier, a land grid array or a ball grid array.
The electronic component mounting substrate according to 2.
導体回路と電気的に接続する電子部品を搭載するための
搭載部を有する電子部品搭載用基板において、前記搭載
部の近傍周囲で前記導体回路のない絶縁層部分に、１つ
あるいは複数の溝が形成され、上記電子部品がキャップ
により封止されて該キャップの接着剤の流れを前記溝に
よりくい止めることができることを特徴とする電子部品
搭載装置。4. An electronic component mounting board having a conductive circuit formed on the surface of an insulating substrate and having a mounting portion for mounting an electronic component electrically connected to the conductive circuit, in the vicinity of the mounting portion. One or a plurality of grooves are formed in the insulating layer portion without the conductor circuit, the electronic component is sealed by a cap, and the flow of the adhesive of the cap can be stopped by the groove. Parts mounting device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6336009A JPH08181236A (en) | 1994-12-22 | 1994-12-22 | Substrate for mounting electronic part and electronic-part mounter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6336009A JPH08181236A (en) | 1994-12-22 | 1994-12-22 | Substrate for mounting electronic part and electronic-part mounter |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003134204A Division JP2003297960A (en) | 2003-05-13 | 2003-05-13 | Electronic component mounting substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08181236A true JPH08181236A (en) | 1996-07-12 |
Family
ID=18294755
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6336009A Pending JPH08181236A (en) | 1994-12-22 | 1994-12-22 | Substrate for mounting electronic part and electronic-part mounter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08181236A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006087686A2 (en) * | 2005-02-19 | 2006-08-24 | Assa Abloy Identification Technology Group Ab | Method and arrangement for contact-connecting semiconductor chips on a metallic substrate |
-
1994
- 1994-12-22 JP JP6336009A patent/JPH08181236A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006087686A2 (en) * | 2005-02-19 | 2006-08-24 | Assa Abloy Identification Technology Group Ab | Method and arrangement for contact-connecting semiconductor chips on a metallic substrate |
| WO2006087686A3 (en) * | 2005-02-19 | 2007-01-18 | Assa Abloy Identification Tech | Method and arrangement for contact-connecting semiconductor chips on a metallic substrate |
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