JPH0795721A - Device for detecting open-phase of neutral line of single-shape three-wire wiring - Google Patents
Device for detecting open-phase of neutral line of single-shape three-wire wiringInfo
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- JPH0795721A JPH0795721A JP23698793A JP23698793A JPH0795721A JP H0795721 A JPH0795721 A JP H0795721A JP 23698793 A JP23698793 A JP 23698793A JP 23698793 A JP23698793 A JP 23698793A JP H0795721 A JPH0795721 A JP H0795721A
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- voltage
- transistor
- phase
- neutral
- terminal
- Prior art date
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は単相３線式配線における
中性線欠相検出装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a neutral wire open phase detector for single-phase three-wire wiring.
【０００２】[0002]
【従来の技術】単相３線式配線は比較的大容量の配電方
式として用いられるもので、図４に示すように、例えば
中性点付の単相トランスからなる電源３０の電源端子Ｌ
1 ，Ｌ 2 および中性点端子Ｎからブレーカ３１を介して
給電される。電源端子Ｌ1 とＬ 2 の間の電圧は、例えば
２００Ｖで、電源端子Ｌ1 およびＬ2 と中性点端子Ｎと
の間は１００Ｖであり、電源端子Ｌ1 とＬ2 の間には２
００Ｖの機器３３が、電源端子Ｌ1 およびＬ2 と中性点
端子Ｎに接続された中性線ｎの間には１００Ｖの機器３
２が接続される。2. Description of the Related Art A single-phase three-wire system is a relatively large capacity distribution method.
It is used as a formula, and as shown in FIG.
Power supply terminal L of the power supply 30 consisting of a single-phase transformer with a neutral point
1, L 2And from the neutral terminal N via the breaker 31
Power is supplied. Power supply terminal L1And L 2The voltage between
Power supply terminal L at 200V1And L2And the neutral terminal N
Is 100V between the power supply terminal L1And L2Between 2
The device 33 of 00V is connected to the power supply terminal L1And L2And the neutral point
100 V equipment 3 between the neutral wires n connected to the terminals N
2 are connected.
【０００３】この単相３線式配線では中性線ｎに欠相が
生じると、この中性線ｎが浮いた形となり、１００Ｖの
機器には負荷のインピーダンスで定まる、例えば１５０
〜１８０Ｖの過電圧が印加されこれら機器が破損する危
険を生じる。このために図５に示すように単相３線式配
線の両電源端子Ｌ1 ，Ｌ2 および中性線ｎに、それぞれ
その両電源入力端子Ｉ1 ，Ｉ2 および中性線入力端子Ｉ
n が接続された中性線欠相検出装置３４を設け、中性線
ｎの欠相を検出したときその信号出力端子Ｐ1 ，Ｐ2 か
ら検出信号を出力し、ブレーカ３１をトリップして回路
を保護する。なお、中性線ｎに中性線入力端子Ｉn の接
続は、図４に示すように中性線ｎの負荷側端末に接続す
るようにすると、中性線ｎのすべての個所の欠相が検出
できる。In this single-phase three-wire type wiring, when a phase loss occurs in the neutral wire n, the neutral wire n is in a floating state, and the impedance of the load is set to 100 V equipment, for example, 150.
The risk of damage to these devices due to overvoltage of ~ 180V is applied. For this reason, as shown in FIG. 5, the two power supply terminals L 1 and L 2 and the neutral wire n of the single-phase three-wire system are connected to the both power supply input terminals I 1 and I 2 and the neutral wire input terminal I, respectively.
A neutral wire open phase detecting device 34 to which n is connected is provided, and when the open phase of the neutral wire n is detected, a detection signal is output from the signal output terminals P 1 and P 2 of the neutral wire n, and the circuit breaker 31 is tripped. Protect. When the neutral wire n is connected to the neutral wire input terminal I n as shown in FIG. 4, the neutral wire n is connected to the load-side terminal of the neutral wire n. Can be detected.
【０００４】図６はこの種の中性線欠相検出装置の従来
例を示す回路図である。図６において中性線欠相検出装
置は、その交流端子が両電源入力端子Ｉ1 およびＩ2 に
接続された整流回路１と、この整流回路１の負側直流端
子と中性線入力端子Ｉn との間に直列に接続された分圧
抵抗２および３と、この分圧抵抗３に並列に接続された
コンデンサ９と、この分圧抵抗３に並列にそれぞれ直列
に接続されたツェナーダイオード４のカソード・アノー
ドおよび抵抗５と、整流回路１の正側直流端子と負側直
流端子との間に直列に接続された抵抗８および１１と、
そのコレクタが抵抗８と１１の接続点に、そのエミッタ
が整流回路１の負側直流端子に、そのベースが抵抗７を
介しツェナーダイオード４と抵抗５の接続点に接続され
たトランジスタ６と、整流回路１の正側直流端子と負側
直流端子との間に直列に接続された抵抗１４およびコン
デンサ１５と、そのコレクタが抵抗１３を介して抵抗１
４とコンデンサ１５の接続点に、そのエミッタが整流回
路１の負側直流端子に、そのベースが抵抗８と１１の接
続点にそれぞれ接続されたトランジスタ１２と、コンデ
ンサ１５に並列にそれぞれ直列に接続されたツェナーダ
イオード１６，抵抗１７および１８と、そのアノードが
ダイオード２０のアノード・カソードを介し整流回路１
の正側直流端子に、そのカソードが整流回路１の負側直
流端子に、そのゲートが抵抗１７と１８の接続点にそれ
ぞれ接続されたサイリスタ１９とからなり、前記ダイオ
ード２０の両端子から信号出力端子Ｐ1 およびＰ2 が引
き出される。FIG. 6 is a circuit diagram showing a conventional example of this type of neutral wire open phase detecting device. In FIG. 6, the neutral line open-phase detecting device has a rectifier circuit 1 whose AC terminals are connected to both power source input terminals I 1 and I 2 , a negative side DC terminal of the rectifier circuit 1 and a neutral wire input terminal I. voltage dividing resistors 2 and 3 connected in series with n , a capacitor 9 connected in parallel to the voltage dividing resistor 3, and a zener diode 4 connected in series to the voltage dividing resistor 3 respectively. A cathode / anode and a resistor 5, and resistors 8 and 11 connected in series between the positive side DC terminal and the negative side DC terminal of the rectifier circuit 1,
The transistor 6 whose collector is connected to the connection point of the resistors 8 and 11, whose emitter is connected to the negative side DC terminal of the rectifier circuit 1, and whose base is connected to the connection point of the Zener diode 4 and the resistance 5 via the resistance 7 and the rectifier The resistor 14 and the capacitor 15 connected in series between the positive side DC terminal and the negative side DC terminal of the circuit 1, and the collector of the resistor 14 and the capacitor 15 via the resistor 13
4 and the capacitor 15, the emitter of which is connected to the negative side DC terminal of the rectifier circuit 1 and the base of which is connected to the connection point of the resistors 8 and 11, respectively, and the transistor 12 which is connected in series to the capacitor 15 in parallel. Zener diode 16, resistors 17 and 18, and the rectifier circuit 1 whose anode is connected via the anode / cathode of diode 20.
Of the rectifier circuit 1, the cathode of which is connected to the negative side DC terminal of the rectifier circuit 1 and the gate of which is connected to the connection point of the resistors 17 and 18, respectively. The terminals P 1 and P 2 are pulled out.
【０００５】この中性点欠相検出装置の動作は次の通り
である。まず中性線ｎに欠相を生じていない正常な状態
では、電源端子Ｌ1 と中性線ｎの間の電圧と、電源端子
Ｌ2と中性線ｎの間の電圧が分圧抵抗２と３の直列回路
に半波ごとに交互に加わり、分圧抵抗３にはこの電圧を
分圧抵抗２と３で分圧した電圧降下が生じる。ここで中
性線ｎに欠相を生じると、中性線ｎの電圧は負荷のイン
ピーダンスで定まる電圧に移動するので、電源端子Ｌ1
と中性線ｎの間、あるいは電源端子Ｌ2 と中性線ｎの間
のいずれか一方の電圧が上昇し、分圧抵抗３の電圧降下
が上昇する。この電圧降下はコンデンサ９で平滑化され
て、ツェナーダイオード４と抵抗５からなる直列回路に
加えられ、その電圧値が設定電圧としてのツェナーダイ
オード４の電圧を越えるとトランジスタ６がオンする。
トランジスタ６がオンするとトランジスタ１２がオフ
し、コンデンサ１５はこのコンデンサ１５の容量と抵抗
１４の抵抗値とで定まる充電の時定数で充電される。こ
のコンデンサ１５の両端子間電圧がツェナーダイオード
１６の電圧を越えるとサイリスタ１９がオン、出力端子
Ｐ1 ，Ｐ2 から直流電圧が検出信号として出力される。
この検出信号により、例えばブレーカをトリップして回
路を保護する。なお、抵抗１３はコンデンサ１５の放電
電流の限流用抵抗であり、ダイオード２０はブレーカの
トリップコイルのオフ時に生じるサージ電圧の防止用ダ
イオードである。The operation of this neutral point open phase detecting device is as follows. First, in a normal state where no phase loss occurs in the neutral line n, the voltage between the power supply terminal L 1 and the neutral line n and the voltage between the power supply terminal L 2 and the neutral line n are divided by the voltage dividing resistor 2. And 3 are alternately applied to the series circuit every half wave, and a voltage drop is generated in the voltage dividing resistor 3 by dividing this voltage by the voltage dividing resistors 2 and 3. If a phase loss occurs in the neutral wire n, the voltage of the neutral wire n moves to a voltage determined by the impedance of the load, so that the power supply terminal L 1
And the neutral wire n, or between the power supply terminal L 2 and the neutral wire n, the voltage rises, and the voltage drop of the voltage dividing resistor 3 rises. This voltage drop is smoothed by the capacitor 9 and added to the series circuit composed of the Zener diode 4 and the resistor 5. When the voltage value exceeds the voltage of the Zener diode 4 as the set voltage, the transistor 6 is turned on.
When the transistor 6 is turned on, the transistor 12 is turned off, and the capacitor 15 is charged with a charging time constant determined by the capacitance of the capacitor 15 and the resistance value of the resistor 14. When the voltage between both terminals of the capacitor 15 exceeds the voltage of the Zener diode 16, the thyristor 19 is turned on, and the DC voltage is output as a detection signal from the output terminals P 1 and P 2 .
This detection signal trips, for example, a breaker to protect the circuit. The resistor 13 is a resistor for limiting the discharge current of the capacitor 15, and the diode 20 is a diode for preventing a surge voltage generated when the trip coil of the breaker is turned off.
【０００６】[0006]
【発明が解決しようとする課題】前述の中性線欠相検出
装置においては、図６に示すように電源端子Ｌ1 と中性
線ｎの間の電圧と、電源端子Ｌ2 と中性線ｎとの電圧と
の間の差電圧を分圧抵抗３の電圧降下として取り出し、
この電圧降下をコンデンサ９で平滑化してツェナーダイ
オード４に入力し中性線の欠相を検出するようにしてい
るが、コンデンサ９でこの電圧降下を平滑化するため
に、検出動作に遅れを生じる問題がある。また、この中
性線欠相検出装置では、中性線入力端子Ｉn を単相３線
式配線の中性線ｎに接続し忘れると、このトランジスタ
６は動作しないので装置が不動作となるが、外部からは
識別できない問題がある。In the above-mentioned neutral wire open phase detecting device, as shown in FIG. 6, the voltage between the power supply terminal L 1 and the neutral wire n, the power supply terminal L 2 and the neutral wire n are detected. The voltage difference between n and the voltage is taken out as the voltage drop of the voltage dividing resistor 3,
This voltage drop is smoothed by the capacitor 9 and input to the Zener diode 4 to detect the open phase of the neutral line. However, since the capacitor 9 smoothes this voltage drop, the detection operation is delayed. There's a problem. Further, in this neutral line open phase detecting device, if the neutral line input terminal I n is forgotten to be connected to the neutral line n of the single-phase three-wire type wiring, the transistor 6 does not operate, and the device becomes inoperative. However, there is a problem that it cannot be identified from the outside.
【０００７】本発明の目的は、検出動作の遅れを少なく
し、更に中性線入力端子を単相３線式配線の中性線に接
続し忘れた場合の保護手段を設けた中性線欠相検出装置
を提供することにある。It is an object of the present invention to reduce the delay of the detection operation and to provide a neutral line disconnection provided with a protection means in the case of forgetting to connect the neutral line input terminal to the neutral line of the single-phase three-wire type wiring. It is to provide a phase detection device.
【０００８】[0008]
【課題を解決するための手段】前述の目的を達成するた
めに本発明は、単相３線式配線の両電源端子および中性
線にそれぞれ接続される両電源入力端子および中性線入
力端子と、この両電源入力端子にその交流端子が接続さ
れた整流回路と、この整流回路の負側直流端子と前記中
性線入力端子との間に接続された分圧抵抗と、この分圧
抵抗の電圧降下が設定電圧値を越えたときオンする第１
のトランジスタと、この第１のトランジスタのオンによ
ってオフする第２のトランジスタとを備え、この第２の
トランジスタのオフによって中性線の欠相を検出するも
のにおいて、前記第２のトランジスタのオフ動作を一電
源サイクルの間保持するオフ動作保持手段を設ける。あ
るいは、前記中性線入力端子の電圧と前記整流回路の負
側直流端子の電圧が等しくなったとき、前記第２のトラ
ンジスタをオフする保護手段を設ける。あるいは、前記
中性線入力端子と前記整流回路の正側直流端子との間に
接続された抵抗からなり、前記中性線入力端子がオープ
ンになったとき、この抵抗を通して前記分圧抵抗に前記
設定電圧値以上の電圧降下が生じるようにした保護手段
を設ける。In order to achieve the above-mentioned object, the present invention is directed to both power supply terminals and neutral wire input terminals of a single-phase three-wire wiring connected to both power supply terminals and neutral wires, respectively. A rectifier circuit in which the AC terminals are connected to the both power source input terminals, a voltage dividing resistor connected between the negative side DC terminal of the rectifying circuit and the neutral wire input terminal, and the voltage dividing resistor 1 which turns on when the voltage drop of the voltage exceeds the set voltage value
And a second transistor which is turned off by turning on the first transistor, and which detects the open phase of the neutral line by turning off the second transistor, the off operation of the second transistor Is provided for one power cycle, an OFF operation holding means is provided. Alternatively, there is provided protection means for turning off the second transistor when the voltage of the neutral wire input terminal and the voltage of the negative side DC terminal of the rectifier circuit become equal. Alternatively, it is composed of a resistor connected between the neutral wire input terminal and the positive side DC terminal of the rectifier circuit, and when the neutral wire input terminal is open, the resistor is connected to the voltage dividing resistor through the resistor. Protective measures are provided to prevent voltage drop above the set voltage value.
【０００９】[0009]
【作用】本発明の請求項１に記載した中性線欠相検出装
置においては、従来必要であった一方の電源端子と中性
線の間電圧と、他方の電源端子と中性線の電圧との電圧
差を取り出す分圧抵抗に並列に接続されていたコンデン
サを除去し、第１のトランジスタと第２のトランジスタ
の間に、第２のトランジスタのオフ動作保持手段を設け
たので、分圧抵抗の電圧降下によって第２のトランジス
タは遅れなくオフするので、検出動作の遅れは少なくな
る。そしてこのオフ動作は、次の電源サイクルまでの１
サイクルの間保持されるので、検出動作に支障をきたす
ことはない。In the neutral wire open phase detecting device according to claim 1 of the present invention, the voltage between one power supply terminal and the neutral wire and the voltage between the other power supply terminal and the neutral wire, which have been conventionally required. Since the capacitor connected in parallel to the voltage dividing resistor for extracting the voltage difference between the first transistor and the second transistor is provided with the OFF operation holding means for the second transistor, the voltage dividing resistor is provided. Since the second transistor is turned off without delay due to the voltage drop of the resistor, the delay of the detection operation is reduced. Then, this off operation is performed until the next power cycle.
Since it is held during the cycle, it does not affect the detection operation.
【００１０】また、請求項２に記載されたものでは、中
性線入力端子と整流回路の負側直流端子との間に中性線
ｎへの接続し忘れを保護する保護手段を設けたので、中
性線入力端子を単相３線式配線の中性線に接続し忘れる
と、中性線入力端子の電圧と整流回路の負側直流端子の
電圧が等しくなることを利用して欠相の検出動作を行
う。この欠相の検出動作によって、中性線入力端子の単
相３線式配線の中性線への接続忘れは表示される。Further, according to the second aspect of the present invention, the protective means is provided between the neutral wire input terminal and the negative side DC terminal of the rectifier circuit to protect the user from forgetting to connect to the neutral wire n. , If you forget to connect the neutral wire input terminal to the neutral wire of the single-phase three-wire type wiring, the voltage of the neutral wire input terminal and the voltage of the negative side DC terminal of the rectifier circuit become equal Is detected. By the operation of detecting the open phase, the forgetting to connect the neutral line input terminal to the neutral line of the single-phase three-wire system is displayed.
【００１１】あるいはまた、請求項３に記載されたもの
では、中性線入力端子と整流回路の正側直流端子との間
に接続された抵抗からなり、中性線入力端子がオープン
になったとき、この抵抗を通して分圧抵抗に設定電圧値
以上の電圧降下が生じるようにした保護手段を設けたの
で、中性線入力端子を単相３線式配線の中性線に接続し
忘れると、分圧抵抗には設定電圧値以上の電圧が誘起さ
れ欠相の検出動作を行う。この欠相の検出動作によっ
て、中性線入力端子の単相３線式配線の中性線への接続
忘れは表示される。Alternatively, according to the third aspect, the resistor is connected between the neutral wire input terminal and the positive side DC terminal of the rectifier circuit, and the neutral wire input terminal is opened. At this time, since the protection means is provided so that a voltage drop more than the set voltage value is generated in the voltage dividing resistance through this resistance, if the neutral wire input terminal is forgotten to be connected to the neutral wire of the single-phase three-wire type wiring, A voltage higher than the set voltage value is induced in the voltage dividing resistor to detect the open phase. By the operation of detecting the open phase, the forgetting to connect the neutral line input terminal to the neutral line of the single-phase three-wire system is displayed.
【００１２】[0012]
【実施例】図１は本発明の中性線欠相検出装置の一実施
例を示す回路図である。図１に示す本発明の中性線欠相
検出装置は、検出動作の遅れをなくするもので、図６に
示す従来の中性線欠相検出装置におけるコンデンサ９を
除去し、トランジスタ６のコレクタと抵抗１１の接続点
と、整流回路１の負側直流端子の間に接続されたコンデ
ンサ３１と、前記接続点とトランジスタ６のコレクタの
間に接続された抵抗３２と、前記接続点と抵抗１１との
間に接続された抵抗３３とからなるトランジスタ１２の
オフ動作保持手段３０を設けたものである。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a circuit diagram showing an embodiment of the neutral wire open phase detecting device of the present invention. The neutral line open phase detecting device of the present invention shown in FIG. 1 eliminates the delay of the detection operation. Therefore, the capacitor 9 in the conventional neutral line open phase detecting device shown in FIG. And a resistor 11, a capacitor 31 connected between the negative side DC terminal of the rectifier circuit 1, a resistor 32 connected between the connection point and the collector of the transistor 6, and a connection point and the resistor 11 The off-operation holding means 30 for the transistor 12 including the resistor 33 connected between and is provided.
【００１３】この中性線欠相検出装置の動作は次の通り
である。中性線ｎに欠相を生じると、図６の従来例と同
様に分圧抵抗３の電圧降下が上昇する。この場合、この
電圧降下は図６の従来例と比較してコンデンサ９がない
ので、電源周波数に対応した遅れのない脈動電圧とな
る。この脈動電圧の値がツェナーダイオード４の電圧、
すなわち設定電圧値を越えるとトランジスタ６はオン
し、このトランジスタ６のオンによりコンデンサ３１の
両端子間電圧は零となり、トランジスタ１２はオフす
る。次いでこの脈動電圧の値がツェナーダイオード電圧
以下に下がるとトランジスタ６はオフするが、トランジ
スタ１２のベース電圧はコンデンサ３１によってその立
ち上がりが抑えられ、トランジスタ１２はオフを継続す
る。そしてこのオフ状態は、次の電源サイクルでトラン
ジスタ６が再びオフするまで継続される。このようにし
て、分圧抵抗３の電圧降下が設定電圧値を越えたとき、
トランジスタ６は遅れなくオンし、このトランジスタ６
のオンによりトランジスタ１２はオフするので、検出動
作の遅れは少なくなる。そしてこのトランジスタ１２の
オフは、トランジスタ６がオフに切り換っても次の電源
サイクルまでの間はオフを継続するので、検出動作に支
障を生じることはない。なお、その他の動作は図６と同
様である。The operation of the neutral wire open phase detecting device is as follows. When a phase loss occurs in the neutral line n, the voltage drop of the voltage dividing resistor 3 increases as in the conventional example of FIG. In this case, this voltage drop is a pulsating voltage with no delay corresponding to the power supply frequency because the capacitor 9 is not provided as compared with the conventional example of FIG. The value of this pulsating voltage is the voltage of the Zener diode 4,
That is, when the set voltage value is exceeded, the transistor 6 is turned on, the voltage between both terminals of the capacitor 31 becomes zero by turning on the transistor 6, and the transistor 12 is turned off. Next, when the value of this pulsating voltage falls below the Zener diode voltage, the transistor 6 turns off, but the base voltage of the transistor 12 is suppressed from rising by the capacitor 31, and the transistor 12 continues to turn off. This off state continues until the transistor 6 is turned off again in the next power cycle. In this way, when the voltage drop of the voltage dividing resistor 3 exceeds the set voltage value,
The transistor 6 turns on without delay, and this transistor 6
Since the transistor 12 is turned off by turning on, the delay of the detection operation is reduced. The transistor 12 is kept off until the next power supply cycle even if the transistor 6 is switched off, so that the detection operation is not hindered. The other operations are the same as those in FIG.
【００１４】図２は本発明の異なる実施例を示す回路図
である。図２に示す本発明の中性線欠相検出装置は、中
性線入力端子Ｉn を中性線ｎに接続し忘れた場合の保護
手段を設けたもので、図１に示す中性線欠相検出装置と
異なる点は中性線入力端子Ｉ n と整流回路１の負側直流
端子との間にそれぞれ直列に接続された抵抗４１および
コンデンサ４２と、そのコレクタが抵抗４５を介し整流
回路１の正側直流端子に、そのエミッタが整流回路１の
負側直流端子に、そのベースが抵抗４３を介し抵抗４１
とコンデンサ４２の接続点に接続されたトランジスタ４
４と、そのコレクタがトランジスタ６のコレクタに、そ
のエミッタが整流回路１の負側直流端子に、そのベース
がトランジスタ４４のコレクタに接続されたトランジス
タ４６とからなる保護手段４０を設けた点である。FIG. 2 is a circuit diagram showing another embodiment of the present invention.
Is. The neutral wire open phase detecting device of the present invention shown in FIG.
Sex line input terminal InIf you forget to connect the to the neutral wire n
Means for providing the neutral wire open phase detecting device shown in FIG.
The difference is the neutral wire input terminal I nAnd the negative side DC of the rectifier circuit 1
A resistor 41 and a resistor 41 connected in series between the terminal and
Rectification of capacitor 42 and its collector via resistor 45
The emitter of the rectifier circuit 1 is connected to the positive side DC terminal of the circuit 1.
The base is connected to the negative side DC terminal through the resistance 43 and the resistance 41
Transistor 4 connected to the connection point between the capacitor and the capacitor 42
4 and its collector are the collectors of transistor 6,
Of the base of the rectifier circuit 1 to the negative side DC terminal of the rectifier circuit 1.
Is a transistor connected to the collector of transistor 44
This is the point that the protection means 40 including the switch 46 is provided.
【００１５】この中性線欠相検出装置の動作は次の通り
である。中性線入力端子Ｉn を中性線ｎに接続し忘れる
と、中性線入力端子Ｉn の電圧は整流回路１の負側直流
端子の電圧に等しくなり、抵抗４１およびコンデンサ４
２とからなる直列回路に印加される電圧は零となるの
で、トランジスタ４４はオフとなる。このトランジスタ
４４のオフによりトランジスタ４６はオンし、トランジ
スタ４６がオンするとトランジスタ１２がオフとなり、
欠相の検出動作を行う。この欠相の検出動作によって、
中性線入力端子Ｉn の単相３線式配線の中性線ｎへの接
続忘れを表示する。なお、その他の動作は図１と同様で
ある。また、この保護手段は図６に示す従来の中性線欠
相検出装置にも勿論用いることができる。The operation of the neutral wire open phase detecting device is as follows. If the neutral wire input terminal I n is forgotten to be connected to the neutral wire n, the voltage of the neutral wire input terminal I n becomes equal to the voltage of the negative side DC terminal of the rectifier circuit 1, and the resistor 41 and the capacitor 4 are connected.
Since the voltage applied to the series circuit composed of 2 and 0 becomes zero, the transistor 44 is turned off. When the transistor 44 is turned off, the transistor 46 is turned on, and when the transistor 46 is turned on, the transistor 12 is turned off,
Detects open phase. By this phase loss detection operation,
The forgetting connection to the neutral wire n of the single-phase three-wire type wiring of the neutral wire input terminal I n is displayed. The other operations are the same as in FIG. Further, this protection means can of course be used in the conventional neutral wire open phase detecting apparatus shown in FIG.
【００１６】図３は本発明の更に異なる実施例を示す回
路図である。図３に示す本発明の中性線欠相検出装置
は、図２と同様中性線入力端子Ｉn を中性線ｎに接続し
忘れた場合の保護手段を設けたもので、図１に示す中性
線欠相検出装置と異なる点は、中性線入力端子Ｉn と整
流回路１の正側直流端子との間に接続された抵抗５１か
らなる保護手段５０を設けた点である。FIG. 3 is a circuit diagram showing a further different embodiment of the present invention. The neutral wire open phase detecting device of the present invention shown in FIG. 3 is provided with a protection means for forgetting to connect the neutral wire input terminal I n to the neutral wire n as in FIG. different from the neutral wire open-phase detecting device shown is that a protective means 50 comprising a resistor connected 51 between the neutral input terminal I n and the positive-side DC terminal of the rectifier circuit 1.
【００１７】この中性線欠相検出装置の動作は次の通り
である。中性線入力端子Ｉn を中性線ｎに接続し忘れる
と、分圧抵抗３には整流回路１の正側および負側直流端
子間電圧（電源端子Ｌ1 およびＬ2 間電圧の全波整流電
圧になる）が、抵抗５１および分圧抵抗２，３で分圧さ
れた電圧降下を生じる。ここでこの電圧降下をツェナー
ダイオード４の電圧、すなわち設定電圧値より大きくな
るように抵抗５１の抵抗値を定めることによって、欠相
の検出動作が行われる。この欠相の検出動作によって、
中性線入力端子Ｉn の単相３線式配線の中性線ｎへの接
続忘れを表示する。なお、その他の動作は図１と同様で
ある。また、この保護手段は図６に示す従来の中性線欠
相検出装置にも勿論用いることができる。The operation of the neutral wire open phase detecting device is as follows. If the neutral wire input terminal I n is forgotten to be connected to the neutral wire n, the voltage dividing resistor 3 has a voltage between the positive and negative DC terminals of the rectifier circuit 1 (full wave of the voltage between the power supply terminals L 1 and L 2). (Which becomes a rectified voltage), a voltage drop is generated by the resistor 51 and the voltage dividing resistors 2 and 3. Here, the open phase detection operation is performed by setting the resistance value of the resistor 51 so that this voltage drop becomes larger than the voltage of the Zener diode 4, that is, the set voltage value. By this phase loss detection operation,
The forgetting connection to the neutral wire n of the single-phase three-wire type wiring of the neutral wire input terminal I n is displayed. The other operations are the same as in FIG. Further, this protection means can of course be used in the conventional neutral wire open phase detecting apparatus shown in FIG.
【００１８】なお、トランジスタ６を第１のトランジス
タ、トランジスタ１２を第２のトランジスタと称する。The transistor 6 is called a first transistor and the transistor 12 is called a second transistor.
【００１９】[0019]
【発明の効果】本発明の単相３線式配線の欠相検出装置
は検出動作の遅れが小さい。更に、中性線入力端子を単
相３線式配線の中性線に接続し忘れると保護手段によっ
て表示されるので、高性能で信頼性が高くその実用的効
果は大きい。As described above, the single-phase three-wire type open phase detecting device of the present invention has a small detection operation delay. Furthermore, if the neutral wire input terminal is forgotten to be connected to the neutral wire of the single-phase three-wire system, it is displayed by the protection means, so that it has high performance and high reliability, and its practical effect is great.
【図１】本発明の単相３線式配線の中性線欠相検出装置
の一実施例を示す回路図FIG. 1 is a circuit diagram showing an embodiment of a neutral-phase open-phase detector for single-phase three-wire type wiring according to the present invention.
【図２】本発明の単相３線式配線の中性線欠相検出装置
の異なる実施例を示す回路図FIG. 2 is a circuit diagram showing another embodiment of the neutral-phase open-phase detecting device for single-phase three-wire type wiring of the present invention.
【図３】本発明の単相３線式配線の中性線欠相検出装置
の更に異なる実施例を示す回路図FIG. 3 is a circuit diagram showing a further different embodiment of the neutral-phase open-phase detection device for single-phase three-wire wiring according to the present invention.
【図４】単相３線式配線を説明するための回路図FIG. 4 is a circuit diagram for explaining single-phase three-wire wiring.
【図５】単相３線式配線の中性線の欠相保護方式を説明
するための回路図FIG. 5 is a circuit diagram for explaining a neutral phase open phase protection system for single-phase three-wire wiring.
【図６】従来の単相３線式配線の中性線欠相検出装置の
一例を示す回路図FIG. 6 is a circuit diagram showing an example of a conventional neutral-phase open-phase detector for single-phase three-wire wiring.
１ 整流回路 ２ 分圧抵抗 ３ 分圧抵抗 ６ トランジスタ（第１の） １２ トランジスタ（第２の） ３０ オフ動作保持手段 ４０ 保護手段 ５０ 保護手段 DESCRIPTION OF SYMBOLS 1 rectifier circuit 2 voltage dividing resistor 3 voltage dividing resistor 6 transistor (first) 12 transistor (second) 30 off-operation holding means 40 protecting means 50 protecting means
Claims (3)
にそれぞれ接続される両電源入力端子および中性線入力
端子と、この両電源入力端子にその交流端子が接続され
た整流回路と、この整流回路の負側直流端子と前記中性
線入力端子との間に接続された分圧抵抗と、この分圧抵
抗の電圧降下が設定電圧値を越えたときオンする第１の
トランジスタと、この第１のトランジスタのオンによっ
てオフする第２のトランジスタとを備え、この第２のト
ランジスタのオフによって中性線の欠相を検出するもの
において、前記第２のトランジスタのオフ動作を一電源
サイクルの間保持するオフ動作保持手段を設けたことを
特徴とする単相３線式配線の中性線欠相検出装置。1. A power supply terminal and a neutral wire input terminal respectively connected to both power supply terminals and a neutral wire of a single-phase three-wire wiring, and a rectifier in which the AC terminal is connected to both power supply input terminals. A circuit, a voltage dividing resistor connected between the negative side DC terminal of the rectifier circuit and the neutral wire input terminal, and a first voltage-dividing resistor which is turned on when the voltage drop of the voltage dividing resistor exceeds a set voltage value. A transistor that includes a transistor and a second transistor that is turned off when the first transistor is turned on, and detects an open phase of a neutral line when the second transistor is turned off. A neutral-phase open-phase detecting device for single-phase three-wire type wiring, which is provided with an OFF operation holding means for holding during one power cycle.
にそれぞれ接続される両電源入力端子および中性線入力
端子と、この両電源入力端子にその交流端子が接続され
た整流回路と、この整流回路の負側直流端子と前記中性
線入力端子との間に接続された分圧抵抗と、この分圧抵
抗の電圧降下が設定電圧値を越えたときオンする第１の
トランジスタと、この第１のトランジスタのオンによっ
てオフする第２のトランジスタとを備え、この第２のト
ランジスタのオフによって中性線の欠相を検出するもの
において、前記中性線入力端子の電圧と前記整流回路の
負側直流端子の電圧が等しくなったとき、前記第２のト
ランジスタをオフする保護手段を設けたことを特徴とす
る単相３線式配線の中性線欠相検出装置。2. A power supply input terminal and a neutral wire input terminal connected to both power supply terminals and a neutral wire of a single-phase three-wire system, and a rectifier having an AC terminal connected to the both power supply input terminals. A circuit, a voltage dividing resistor connected between the negative side DC terminal of the rectifier circuit and the neutral wire input terminal, and a first voltage-dividing resistor which is turned on when the voltage drop of the voltage dividing resistor exceeds a set voltage value. A transistor comprising a transistor and a second transistor which is turned off when the first transistor is turned on, and which detects a phase loss of the neutral line when the second transistor is turned off. A neutral-phase open-phase detecting device for single-phase three-wire wiring, which is provided with a protection means for turning off the second transistor when the voltage of the negative side DC terminal of the rectifier circuit becomes equal.
にそれぞれ接続される両電源入力端子および中性線入力
端子と、この両電源入力端子にその交流端子が接続され
た整流回路と、この整流回路の負側直流端子と前記中性
線入力端子との間に接続された分圧抵抗と、この分圧抵
抗の電圧降下が設定電圧値を越えたときオンする第１の
トランジスタと、この第１のトランジスタのオンによっ
てオフする第２のトランジスタとを備え、この第２のト
ランジスタのオフによって中性線の欠相を検出するもの
において、前記中性線入力端子と前記整流回路の正側直
流端子との間に接続された抵抗からなり、前記中性線入
力端子がオープンになったとき、この抵抗を通して前記
分圧抵抗に前記設定電圧値以上の電圧降下が生じるよう
にした保護手段を設けたことを特徴とする単相３線式配
線の中性線欠相検出装置。3. A power supply terminal and a neutral wire input terminal connected to both power supply terminals and a neutral wire of a single-phase three-wire system, respectively, and a rectifier having an AC terminal connected to both power supply input terminals. A circuit, a voltage dividing resistor connected between the negative side DC terminal of the rectifier circuit and the neutral wire input terminal, and a first voltage-dividing resistor which is turned on when the voltage drop of the voltage dividing resistor exceeds a set voltage value. A neutral line input terminal and the rectifier, comprising a transistor and a second transistor which is turned off by turning on the first transistor, and which detects a phase loss of the neutral line by turning off the second transistor. It is composed of a resistor connected between the positive side DC terminal of the circuit, and when the neutral line input terminal is opened, a voltage drop of the preset voltage value or more is generated in the voltage dividing resistor through this resistor. Protection measures Neutral wire open-phase detection device of the single-phase three-wire wiring, characterized in that digit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23698793A JP3334008B2 (en) | 1993-09-24 | 1993-09-24 | Neutral line open phase detector for single-phase three-wire wiring |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23698793A JP3334008B2 (en) | 1993-09-24 | 1993-09-24 | Neutral line open phase detector for single-phase three-wire wiring |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0795721A true JPH0795721A (en) | 1995-04-07 |
| JP3334008B2 JP3334008B2 (en) | 2002-10-15 |
Family
ID=17008716
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23698793A Expired - Fee Related JP3334008B2 (en) | 1993-09-24 | 1993-09-24 | Neutral line open phase detector for single-phase three-wire wiring |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3334008B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003235266A (en) * | 2002-02-08 | 2003-08-22 | Origin Electric Co Ltd | Three-phase full-wave rectifier |
| KR102349343B1 (en) * | 2021-08-02 | 2022-01-10 | 대한기전 주식회사 | Switchboard having three phases open and netural line protecting function |
-
1993
- 1993-09-24 JP JP23698793A patent/JP3334008B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003235266A (en) * | 2002-02-08 | 2003-08-22 | Origin Electric Co Ltd | Three-phase full-wave rectifier |
| KR102349343B1 (en) * | 2021-08-02 | 2022-01-10 | 대한기전 주식회사 | Switchboard having three phases open and netural line protecting function |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3334008B2 (en) | 2002-10-15 |
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