JPH0793391B2 - Mounting method of sealing frame of semiconductor package - Google Patents

Mounting method of sealing frame of semiconductor package

Info

Publication number
JPH0793391B2
JPH0793391B2 JP63230610A JP23061088A JPH0793391B2 JP H0793391 B2 JPH0793391 B2 JP H0793391B2 JP 63230610 A JP63230610 A JP 63230610A JP 23061088 A JP23061088 A JP 23061088A JP H0793391 B2 JPH0793391 B2 JP H0793391B2
Authority
JP
Japan
Prior art keywords
sealing frame
printed wiring
sealing
substrate
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63230610A
Other languages
Japanese (ja)
Other versions
JPH0278250A (en
Inventor
宗勇 山田
徹 樋口
武司 加納
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP63230610A priority Critical patent/JPH0793391B2/en
Publication of JPH0278250A publication Critical patent/JPH0278250A/en
Publication of JPH0793391B2 publication Critical patent/JPH0793391B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Structure Of Printed Boards (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention 【産業上の利用分野】[Industrial applications]

本発明はPGAのような半導体パッケージの封止枠の装着
方法に関する。
The present invention relates to a method for mounting a sealing frame of a semiconductor package such as PGA.

【従来技術】[Prior art]

従来にあっては、封止枠用材を枠形状に切断加工して封
止枠6を形成し、この封止枠6に接着剤層2を設けて各
封止枠6を位置決めプレート10にセットし、パッケージ
本体となる複数のプリント配線板が配列形成された基板
5に各封止枠6を各プリント配線板4に対応させて接着
させることにより装着されている。
Conventionally, a sealing frame material is cut into a frame shape to form a sealing frame 6, an adhesive layer 2 is provided on the sealing frame 6, and each sealing frame 6 is set on a positioning plate 10. Then, each sealing frame 6 is attached to the substrate 5 on which a plurality of printed wiring boards to be a package body are formed in an array so as to correspond to each printed wiring board 4.

【発明が解決しようとする課題】[Problems to be Solved by the Invention]

従来の方法にあっては、封止枠6が単体であるため、逐
一位置決めプレート10にセットしなければならないなど
基本的に封止枠6を一個毎基板5のプリント配線板に装
着しなければならなく、従って、大量生産には適してい
ないという問題があった。 本発明は上記事情に鑑みて為されたものであり、その目
的とするところは、複数の封止枠を一度に装着でき、し
かも、装着位置のばらつきも少ない半導体パッケージの
封止枠の装着方法を提供することにある。
In the conventional method, since the sealing frame 6 is a single body, it must be set on the positioning plate 10 one by one. Basically, the sealing frame 6 must be mounted on the printed wiring board of the substrate 5 one by one. Therefore, there is a problem that it is not suitable for mass production. The present invention has been made in view of the above circumstances, and an object of the present invention is to attach a plurality of sealing frames at one time and to attach a sealing frame of a semiconductor package with less variation in mounting position. To provide.

【課題を解決するための手段】[Means for Solving the Problems]

本発明の半導体パッケージの封止枠の装着方法における
第1の手段は、封止枠用材1の片面に所定ピッチで接着
剤を枠状に塗布し、封止枠用材1の枠状の接着剤層2の
内側をくり抜くと共に接着剤層2の外周に凹溝3を設
け、封止枠用材1をプリント配線板4が所定のピッチで
配列形成された基板5に枠状の接着剤層2と各プリント
配線板4とを対応させて接合し、この後、凹溝3にて封
止枠用材1を切断し封止枠6を形成することにより基板
5の各プリント配線板4に封止枠6を装着し、次いで基
板1を各プリント配線板4毎に切断することを特徴とす
るものであり、第2の手段は、封止枠用材1の片面に所
定ピッチで接着剤を枠状に塗布すると共に他面に接着シ
ート7を貼着し、封止枠用材1を枠状の接着剤層2の内
周と外周に沿って切断して接着シート7上に所定の枠形
状の複数の封止枠6を形成し、この後、複数の封止枠6
を接着剤層2にて接着シート7を介して一体的にプリン
ト配線板4が所定のピッチで配列形成された基板5に各
封止枠6と各プリント配線板4とを対応させて接合し、
次いで、接着シート7を剥がすと共に基板5を各プリン
ト配線板4毎に切断することを特徴とするものであり、
この構成により上記課題が解決されたものである。 [作用] 本発明の第1の手段にあっては、封止枠用材1をプリン
ト配線板4が所定のピッチで配列形成された基板に枠状
の接着剤層2と各プリント配線板4とを対応させて接合
し、この後、凹溝3にて封止枠用材1を切断し封止枠6
を形成することにより基板1の各プリント配線板4に封
止枠6を装着し、次いで基板1を各プリント配線板4毎
に切断するので、又、第2の手段にあっては、接着シー
ト7上に所定の枠形状の複数の封止枠6を形成し、この
後、複数の封止枠6を接着剤層2にて接着シート7を介
して一体的にプリント配線板4が所定のピッチで配列形
成された基板5に各封止枠6と各プリント配線板4とを
対応させて接合し、次いで、接着シート7を剥がすと共
に基板5を各プリント配線板4毎に切断するので、複数
の封止枠6の装着が一度にでき、しかも、装着位置のば
らつきも少なくなるものである。 以下、本発明を添付の図面に基づいて説明する。 第1図及び第2図は本発明の一実施例を示しており、ま
ず封止枠用材1の片面に所定ピッチで接着剤を枠状に塗
布する(第1図(a))。 次に、この封止枠用材1の枠状の接着剤層2の内側をく
り抜くと共に接着剤層2の外周に凹溝3を貫通させない
ように設ける(第1図(b)(c))。 この後、封止枠用材1をプリント配線板4が所定のピッ
チで配列形成された基板5に枠状の接着剤層2と各プリ
ント配線板4とを対応させて接合する(第1図
(d))。 次に、カッター9により凹溝3にて封止枠用材1を切断
し封止枠6を形成することにより基板1の各プリント配
線板4に封止枠6を装着させる(第1図(f))。 次いで、基板5を各プリント配線板4毎に切断する(第
2図)。 尚、プリント配線板4の半導体実装用凹部8に半導体を
実装し、プリント配線板4の各導体パターンとボンディ
ングさせて電気的に接続し、封止枠6内に封止樹脂を充
填させて封止することにより半導体パッケージを製造す
る。 第3図及び第4図は本発明の他の実施例を示しており、
まず上記実施例と同様に封止枠用材1の片面に所定ピッ
チで接着剤を枠状に塗布する(第3図(a))。 この封止枠用材1の他面には接着シート7を貼着した
後、封止枠用材1を枠状の接着剤層2の内周と外周に沿
って切断して接着シート7上に所定の枠形状の複数の封
止枠6を形成する(第3図(b)(c))。 次に、複数の封止枠6を接着剤層2にて接着シート7を
介して一体的にプリント配線板4が所定のピッチで配列
形成された基板5に各封止枠6と各プリント配線板4と
を対応させて接合し、次いで、接着シート7を剥がす
(第3図(c))。 次に、基板5を各プリント配線板4毎に切断する(第4
図)。
The first means in the method for mounting the sealing frame of the semiconductor package of the present invention is to apply an adhesive agent in a frame shape on one surface of the sealing frame material 1 at a predetermined pitch to form a frame-shaped adhesive agent for the sealing frame material 1. The inner side of the layer 2 is hollowed out, and the groove 3 is provided on the outer periphery of the adhesive layer 2, and the sealing frame material 1 is formed on the substrate 5 on which the printed wiring boards 4 are arrayed at a predetermined pitch. The printed wiring boards 4 are joined to each other in a corresponding manner, and then the sealing frame material 1 is cut in the concave grooves 3 to form the sealing frame 6, whereby the printed wiring boards 4 of the substrate 5 are sealed with the sealing frame. 6 is mounted, and then the substrate 1 is cut into each printed wiring board 4, and the second means is that one side of the sealing frame material 1 is framed with an adhesive at a predetermined pitch. Along with the application, the adhesive sheet 7 is attached to the other surface, and the sealing frame material 1 is cut along the inner circumference and the outer circumference of the frame-shaped adhesive layer 2. And a plurality of sealing frame 6 having a predetermined frame shape on the adhesive sheet 7 is formed by, after this, a plurality of sealing frame 6
Each sealing frame 6 and each printed wiring board 4 are bonded to the substrate 5 on which the printed wiring boards 4 are integrally formed with the adhesive layer 2 via the adhesive sheet 7 in an array at a predetermined pitch. ,
Next, the adhesive sheet 7 is peeled off and the substrate 5 is cut into individual printed wiring boards 4.
The above problem is solved by this configuration. [Operation] In the first means of the present invention, the frame material 1 and the printed wiring board 4 are formed on the substrate on which the printed wiring boards 4 are arranged with the sealing frame material 1 arranged at a predetermined pitch. Corresponding to each other, and thereafter, the sealing frame material 1 is cut in the concave groove 3 to form the sealing frame 6
By forming the sealing frame 6 on each printed wiring board 4 of the substrate 1 and then cutting the substrate 1 into each printed wiring board 4, the adhesive sheet is used in the second means. A plurality of sealing frames 6 having a predetermined frame shape are formed on the printed wiring board 7. Then, the plurality of sealing frames 6 are integrated with the adhesive layer 2 via the adhesive sheet 7 so that the printed wiring board 4 has a predetermined shape. Since each sealing frame 6 and each printed wiring board 4 are bonded to the board 5 arranged in a pitch in a corresponding manner, and then the adhesive sheet 7 is peeled off and the board 5 is cut for each printed wiring board 4, The plurality of sealing frames 6 can be mounted at the same time, and moreover, variations in mounting positions are reduced. Hereinafter, the present invention will be described with reference to the accompanying drawings. FIGS. 1 and 2 show an embodiment of the present invention. First, an adhesive is applied in a frame shape on one surface of the sealing frame material 1 at a predetermined pitch (FIG. 1 (a)). Next, the inside of the frame-shaped adhesive layer 2 of the sealing frame material 1 is hollowed out, and the concave groove 3 is provided so as not to penetrate the outer periphery of the adhesive layer 2 (FIGS. 1 (b) and (c)). Thereafter, the sealing frame material 1 is bonded to the substrate 5 on which the printed wiring boards 4 are arrayed at a predetermined pitch so that the frame-shaped adhesive layer 2 and each printed wiring board 4 correspond to each other (see FIG. 1 ( d)). Next, the cutter 9 cuts the sealing frame material 1 along the concave groove 3 to form the sealing frame 6, so that the sealing frame 6 is attached to each printed wiring board 4 of the substrate 1 (see FIG. )). Next, the board 5 is cut into each printed wiring board 4 (FIG. 2). A semiconductor is mounted in the semiconductor mounting recess 8 of the printed wiring board 4 and is electrically connected by bonding with each conductor pattern of the printed wiring board 4, and the sealing frame 6 is filled with a sealing resin and sealed. The semiconductor package is manufactured by stopping. 3 and 4 show another embodiment of the present invention,
First, in the same manner as in the above embodiment, an adhesive is applied in a frame shape on one surface of the sealing frame material 1 at a predetermined pitch (Fig. 3 (a)). After the adhesive sheet 7 is attached to the other surface of the sealing frame material 1, the sealing frame material 1 is cut along the inner and outer peripheries of the frame-shaped adhesive layer 2 to give a predetermined amount on the adhesive sheet 7. A plurality of sealing frames 6 having the frame shape are formed (Figs. 3 (b) and (c)). Next, the plurality of sealing frames 6 are integrated with the adhesive layer 2 via the adhesive sheet 7 on the substrate 5 on which the printed wiring boards 4 are arrayed at a predetermined pitch. The plate 4 and the plate 4 are joined together and then the adhesive sheet 7 is peeled off (FIG. 3 (c)). Next, the board 5 is cut into each printed wiring board 4 (fourth
Figure).

【発明の効果】【The invention's effect】

本発明の第1の手段にあっては、封止枠用材をプリント
配線板が所定のピッチで配列形成された基板に枠状の接
着剤層と各プリント配線板とを対応させて接合し、この
後、凹溝にて封止枠用材を切断し封止枠を形成すること
により基板の各プリント配線板に封止枠を装着し、次い
で基板を各プリント配線板毎に切断するので、又、第2
の手段にあっては、接着シート上に所定の枠形状の複数
の封止枠を形成し、この後、複数の封止枠を接着剤層に
て接着シートを介して一体的にプリント配線板が所定の
ピッチで配列形成された基板に各封止枠と各プリント配
線板とを対応させて接合し、次いで、接着シートを剥が
すと共に基板を各プリント配線板毎に切断するので、複
数の封止枠の装着が一度にでき、しかも、装着位置のば
らつきも少なくなるものである。
In the first means of the present invention, a sealing frame material is bonded to a substrate on which printed wiring boards are arranged at a predetermined pitch so that the frame-shaped adhesive layer and each printed wiring board are associated with each other. After that, the sealing frame material is cut in the groove to form the sealing frame, thereby mounting the sealing frame on each printed wiring board of the substrate, and then cutting the substrate for each printed wiring board. , Second
In this method, a plurality of sealing frames each having a predetermined frame shape are formed on the adhesive sheet, and then the plurality of sealing frames are integrally bonded to the printed wiring board by the adhesive layer with the adhesive sheet. Since each sealing frame and each printed wiring board are bonded to the substrate formed by arranging them at a predetermined pitch in a corresponding manner, and then the adhesive sheet is peeled off and the substrate is cut into each printed wiring board, a plurality of seals are formed. The stop frame can be mounted at once, and the variation in mounting position is reduced.

【図面の簡単な説明】 第1図は本発明の一実施例の各工程を示す説明図、第2
図は同上により封止枠が装着されたプリント配線板を示
す平面図、第3図は本発明の他の実施例の各工程を示す
説明図、第4図は同上により封止枠が装着されたプリン
ト配線板を示す平面図、第5図は従来例の各工程を示す
説明図であって、1は封止枠用材、2は接着剤層、3は
凹溝、4はプリント配線板、5は基板、6は封止枠、7
は接着シートである。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an explanatory view showing each step of one embodiment of the present invention, and FIG.
FIG. 3 is a plan view showing a printed wiring board with a sealing frame attached according to the above, FIG. 3 is an explanatory view showing each step of another embodiment of the present invention, and FIG. 5 is a plan view showing the printed wiring board, FIG. 5 is an explanatory view showing each step of the conventional example, 1 is a sealing frame material, 2 is an adhesive layer, 3 is a groove, 4 is a printed wiring board, 5 is a substrate, 6 is a sealing frame, and 7
Is an adhesive sheet.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】封止枠用材の片面に所定ピッチで接着剤を
枠状に塗布し、封止枠用材の枠状の接着剤層の内側をく
り抜くと共に接着剤層の外周に凹溝を設け、封止枠用材
をプリント配線板が所定のピッチで配列形成された基板
に枠状の接着剤層と各プリント配線板とを対応させて接
合し、この後、凹溝にて封止枠用材を切断し封止枠を形
成することにより基板の各プリント配線板に封止枠を装
着し、次いで基板を各プリント配線板毎に切断すること
を特徴とする半導体パッケージの封止枠の装着方法。
1. An adhesive agent is applied in a frame shape on one surface of a sealing frame material at a predetermined pitch, the inside of the frame-shaped adhesive layer of the sealing frame material is hollowed out, and a groove is provided on the outer periphery of the adhesive layer. The sealing frame material is bonded to the substrate on which the printed wiring boards are arranged at a predetermined pitch so that the frame-shaped adhesive layer and the respective printed wiring boards are associated with each other, and then the sealing frame material is formed in the groove. A method of mounting a sealing frame of a semiconductor package, which comprises mounting the sealing frame on each printed wiring board of a substrate by cutting the substrate to form a sealing frame, and then cutting the substrate for each printed wiring board. .
【請求項2】封止枠用材の片面に所定ピッチで接着剤を
枠状に塗布すると共に他面に接着シートを貼着し、封止
枠用材を枠状の接着剤層の内周と外周に沿って切断して
接着シート上に所定の枠形状の複数の封止枠を形成し、
この後、複数の封止枠を接着剤層にて接着シートを介し
て一体的にプリント配線板が所定のピッチで配列形成さ
れた基板に各封止枠と各プリント配線板とを対応させて
接合し、次いで、接着シートを剥がすと共に基板を各プ
リント配線板毎に切断することを特徴とする半導体パッ
ケージの封止枠の装着方法。
2. A sealing frame material is applied to one surface of the sealing frame material at a predetermined pitch in a frame shape, and an adhesive sheet is attached to the other surface, and the sealing frame material is applied to the inner and outer circumferences of the frame-shaped adhesive layer. Form a plurality of sealing frames of a predetermined frame shape on the adhesive sheet by cutting along
After that, each sealing frame and each printed wiring board are made to correspond to a substrate in which a plurality of sealing frames are integrally formed with an adhesive layer through an adhesive sheet and printed wiring boards are arranged in an array at a predetermined pitch. A method for mounting a sealing frame of a semiconductor package, which comprises bonding, then peeling off the adhesive sheet, and cutting the substrate for each printed wiring board.
JP63230610A 1988-09-14 1988-09-14 Mounting method of sealing frame of semiconductor package Expired - Lifetime JPH0793391B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63230610A JPH0793391B2 (en) 1988-09-14 1988-09-14 Mounting method of sealing frame of semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63230610A JPH0793391B2 (en) 1988-09-14 1988-09-14 Mounting method of sealing frame of semiconductor package

Publications (2)

Publication Number Publication Date
JPH0278250A JPH0278250A (en) 1990-03-19
JPH0793391B2 true JPH0793391B2 (en) 1995-10-09

Family

ID=16910458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63230610A Expired - Lifetime JPH0793391B2 (en) 1988-09-14 1988-09-14 Mounting method of sealing frame of semiconductor package

Country Status (1)

Country Link
JP (1) JPH0793391B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE59001120D1 (en) * 1989-11-09 1993-05-06 Contraves Ag METHOD FOR PRODUCING HYBRID CIRCUITS WITH AN ARRAY OF SAME ELECTRONIC ELEMENTS.

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57138149A (en) * 1981-02-20 1982-08-26 Shindo Denshi Kogyo Kk Mounting method for chip

Also Published As

Publication number Publication date
JPH0278250A (en) 1990-03-19

Similar Documents

Publication Publication Date Title
JPH1174295A (en) Method for packaging electronic circuit
JPH0883866A (en) Production of single side resin sealed semiconductor device and carrier frame therefor
JP2948412B2 (en) Method for manufacturing side-emitting semiconductor light emitting device
JPH02301155A (en) Method of fixing ic module
JP2002170998A (en) Semiconductor light emitting device and its manufacturing method
JP3129660B2 (en) Resin sealing method and resin sealing device for SON package
US6326232B1 (en) Method of fabricating semiconductor device
JPH0793391B2 (en) Mounting method of sealing frame of semiconductor package
JP4246803B2 (en) Method of forming spacer for semiconductor device, method of forming device including semiconductor device, and method of forming surface mount photocoupler
JP3418106B2 (en) Semiconductor device and manufacturing method thereof
JP2788011B2 (en) Semiconductor integrated circuit device
JPH04305962A (en) Electronic component mount board and manufacture thereof
JP4033969B2 (en) Semiconductor package, manufacturing method thereof and wafer carrier
JPH0685111A (en) Tape carrier type semiconductor device and its assembly method
JP2000200927A (en) Manufacture of electronic component
JPH11204680A (en) Carrier for semiconductor device
JP3165341B2 (en) Resin molding method
JPS6239033A (en) Manufacture of semiconductor chip carrier
JP2707673B2 (en) IC module and manufacturing method thereof
JPS63248155A (en) Semiconductor device
JP2001085564A (en) Semiconductor device
JP2001230222A (en) Method of manufacturing semiconductor chip
JP2003282806A (en) Lead frame, its manufacturing method, and method of manufacturing semiconductor device using the same
JPH0543294B2 (en)
JPH04116961A (en) Semiconductor diode element and manufacture thereof