JPH0775336B2 - Optical receiver circuit - Google Patents
Optical receiver circuitInfo
- Publication number
- JPH0775336B2 JPH0775336B2 JP2322041A JP32204190A JPH0775336B2 JP H0775336 B2 JPH0775336 B2 JP H0775336B2 JP 2322041 A JP2322041 A JP 2322041A JP 32204190 A JP32204190 A JP 32204190A JP H0775336 B2 JPH0775336 B2 JP H0775336B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- amplifier
- voltage
- reference voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Optical Communication System (AREA)
- Manipulation Of Pulses (AREA)
Description
【発明の詳細な説明】 ［発明の目的］ （産業上の利用分野） この発明は、光パルス信号を受信して電圧パルス信号に
変換する光受信回路に関する。Description: [Object of the Invention] (Industrial field of application) The present invention relates to an optical receiving circuit for receiving an optical pulse signal and converting it into a voltage pulse signal.
（従来の技術） 一般に、ディジタル光伝送系の光受信装置内の光受信回
路においては、素子バラツキの抑制と高い耐ノイズ性が
要求されている。(Prior Art) Generally, in an optical receiving circuit in an optical receiving apparatus of a digital optical transmission system, suppression of element variation and high noise resistance are required.
前者の目的のために、従来、第３図に示すような光受信
回路が提案されており、第４図（ａ）〜（ｃ）はその各
部波形を示したものである。For the former purpose, conventionally, an optical receiving circuit as shown in FIG. 3 has been proposed, and FIGS. 4 (a) to 4 (c) show waveforms at respective parts.
即ち、動作時には入力された光パルス14をカソードが端
子Ａに接続された受光素子１にて受光し、その出力を増
幅器２に入力し、接続点９では光パルス14に対応する電
圧パルス15を出力する。そして、基準電圧発生回路４と
接続点９との間に同抵抗値の２つの抵抗７、８を直列に
接続し、その接続点10に現れる分圧波形16のグランドに
対する尖頭値を一定時間保持するピークホールド回路20
の出力21と増幅器２の出力15とをコンパレータ３にて比
較し、出力端子Ｃに電圧パルス22を出力している。That is, during operation, the input light pulse 14 is received by the light receiving element 1 whose cathode is connected to the terminal A, and its output is input to the amplifier 2. At the connection point 9, a voltage pulse 15 corresponding to the light pulse 14 is received. Output. Then, two resistors 7 and 8 having the same resistance value are connected in series between the reference voltage generating circuit 4 and the connection point 9, and the peak value of the divided voltage waveform 16 appearing at the connection point 10 with respect to the ground is maintained for a predetermined time. Hold peak hold circuit 20
2 is compared with the output 15 of the amplifier 2 by the comparator 3, and the voltage pulse 22 is output to the output terminal C.
ところが、上記のような従来の光受信回路においては、
ピークホールド回路20内の電圧ホールドコンデンサ５の
低電位端子がグランドレベルなので、第４図に示すよう
に増幅器２の出力15と基準電圧発生回路４の出力17にコ
モンモ−ドノイズが重畳した場合、ピークホールド回路
20はノイズ成分を加味した分圧信号のピーク値をホール
ドしてしまい、ホールド信号21と増幅器２の出力信号15
を比較するコンパレータ３は光パルス幅と異なるパルス
幅の電圧パルス22を出力するという欠点がある。However, in the conventional optical receiving circuit as described above,
When the common mode noise is superimposed on the output 15 of the amplifier 2 and the output 17 of the reference voltage generation circuit 4 as shown in FIG. 4, the low potential terminal of the voltage hold capacitor 5 in the peak hold circuit 20 is at the ground level. Hold circuit
20 holds the peak value of the divided signal in which the noise component is added, and the hold signal 21 and the output signal 15 of the amplifier 2 are held.
The comparator 3 for comparing the two has the drawback of outputting the voltage pulse 22 having a pulse width different from the optical pulse width.
（発明が解決しようとする課題） この発明は、上記事情に鑑みなされたもので、電源電圧
ノイズ・静電ノイズ環境下でも、光パルス幅と同一のパ
ルス幅の電圧パルスを出力することが出来、耐ノイズ性
が著しく向上した光受信回路を提供することを目的とす
る。(Problems to be Solved by the Invention) The present invention has been made in view of the above circumstances, and it is possible to output a voltage pulse having the same pulse width as an optical pulse width even in a power supply voltage noise / electrostatic noise environment. It is an object of the present invention to provide an optical receiver circuit having significantly improved noise resistance.
［発明の構成］ （課題を解決するための手段） この発明は、光信号を受光し電流信号に変換する受光素
子と、この受光素子の出力電流を増幅する増幅器と、こ
の増幅器と回路構成が等しくこの増幅器の無信号入力時
の出力電圧とほぼ等しい出力電圧を発生する基準電圧発
生回路と、この基準電圧発生回路と上記増幅器の出力間
に直列に接続された同抵抗値の第１の抵抗及び第２の抵
抗と、この第１の抵抗と第２の抵抗との接続点を入力と
するピークホールド回路と、このピークホールド回路と
上記増幅器の各出力を入力とするコンパレータとからな
る光受信回路において、上記ピークホールド回路内の電
圧ホールドコンデンサの固定電位端子が上記基準電圧発
生回路の出力端子に接続され、上記増幅器と上記基準電
圧発生回路に重畳するコモンモードノイズを抑制する光
受信回路である。[Structure of the Invention] (Means for Solving the Problem) The present invention has a light receiving element for receiving an optical signal and converting it into a current signal, an amplifier for amplifying an output current of the light receiving element, and a circuit configuration of the amplifier. A reference voltage generating circuit that generates an output voltage that is substantially equal to the output voltage of this amplifier when there is no signal input, and a first resistor of the same resistance value connected in series between the reference voltage generating circuit and the output of the amplifier. And a second resistor, a peak hold circuit having a connection point between the first resistor and the second resistor as an input, and an optical receiver comprising the peak hold circuit and a comparator having each output of the amplifier as an input In the circuit, the fixed potential terminal of the voltage hold capacitor in the peak hold circuit is connected to the output terminal of the reference voltage generation circuit, and is connected to the amplifier and the reference voltage generation circuit. A suppressing light receiving circuit down mode noise.
（作 用） すなわち、本願発明において、基準電圧発生回路は増幅
器と構成が等しく、この増幅器の無信号入力時の出力電
圧とほぼ等しい出力電圧を発生する。このため、電源電
圧ノイズや静電ノイズによって増幅器の出力電圧が変動
した場合、基準電圧発生回路の出力電圧も同様に変動す
る。しかも、この基準電圧発生回路の出力をピークホー
ルド回路に内蔵された電圧ホールドコンデンサの固定電
位端子に接続しているため、この端子の電圧は基準電圧
発生回路の出力電圧に応じて変動する。したがって、電
圧ホールドコンデンサはノイズ成分を除く増幅器と基準
電圧発生回路の出力を分圧した電圧をホールドするた
め、コモンモードノイズの影響を除去して、光パルスと
同じ幅を有する電圧パルスを発生することができる。(Operation) That is, in the present invention, the reference voltage generating circuit has the same structure as the amplifier, and generates an output voltage substantially equal to the output voltage of the amplifier when there is no signal input. Therefore, when the output voltage of the amplifier changes due to power supply voltage noise or electrostatic noise, the output voltage of the reference voltage generating circuit also changes. Moreover, since the output of the reference voltage generating circuit is connected to the fixed potential terminal of the voltage holding capacitor built in the peak holding circuit, the voltage of this terminal fluctuates according to the output voltage of the reference voltage generating circuit. Therefore, since the voltage hold capacitor holds the voltage obtained by dividing the output of the amplifier and the reference voltage generation circuit excluding the noise component, the influence of common mode noise is removed and a voltage pulse having the same width as the optical pulse is generated. be able to.
（実施例） 以下、図面を参照して、この発明の一実施例を詳細に説
明する。Embodiment An embodiment of the present invention will be described in detail below with reference to the drawings.
この発明による光受信回路は第１図に示すように構成さ
れ、その各部波形は第２図（ａ）〜（ｃ）に示す。The optical receiving circuit according to the present invention is constructed as shown in FIG. 1, and the waveforms at each part are shown in FIGS. 2 (a) to (c).
即ち、従来例（第３図）と同一箇所は同一符号を付すこ
とにすると、入力端子Ａは受光素子１を介して増幅器２
に接続され、この増幅器２の出力側はコンパレータ３の
＋端子に接続され、このコンパレータ３の出力側は出力
端子Ｃに接続されている。That is, if the same parts as those in the conventional example (FIG. 3) are designated by the same reference numerals, the input terminal A is connected to the amplifier 2 via the light receiving element 1.
The output side of the amplifier 2 is connected to the + terminal of the comparator 3, and the output side of the comparator 3 is connected to the output terminal C.
一方、入力端子Ｂは基準電圧発生回路４に接続され、こ
の基準電圧発生回路４の出力側は電圧ホールドコンデン
サ５を介してコンパレータ３の−端子に接続される。そ
して、基準電圧発生回路４と電圧ホールドコンデンサ５
との接続点６は、抵抗７、８を直列に介して増幅器２と
コンパレータ３との接続点９に接続されている。抵抗７
と抵抗８との接続点10はコンパレータ11の＋端子に接続
され、このコンパレータ11の出力側はダイオード12を介
してコンパレータ３の−端子に接続されている。更に、
コンパレータ11の−端子はコンパレータ３の−端子に接
続されている。On the other hand, the input terminal B is connected to the reference voltage generating circuit 4, and the output side of the reference voltage generating circuit 4 is connected to the-terminal of the comparator 3 via the voltage holding capacitor 5. Then, the reference voltage generation circuit 4 and the voltage hold capacitor 5
The connection point 6 of the and is connected to the connection point 9 of the amplifier 2 and the comparator 3 through the resistors 7 and 8 in series. Resistance 7
A connection point 10 between the resistor 8 and the resistor 8 is connected to the positive terminal of the comparator 11, and the output side of the comparator 11 is connected to the negative terminal of the comparator 3 via the diode 12. Furthermore,
The-terminal of the comparator 11 is connected to the-terminal of the comparator 3.
尚、電圧ホールドコンデンサ５、コンパレータ11、及び
ダイオード12によりピークホールド回路13が構成されて
いる。The voltage hold capacitor 5, the comparator 11, and the diode 12 constitute a peak hold circuit 13.
上記の場合、受光素子１は光信号を受光し電流信号に変
換するものであり、増幅器２はこの受光素子１の出力電
流を増幅する。基準電圧発生回路４は増幅器２と回路構
成が等しく、この増幅器２の無信号入力時の出力電圧と
ほぼ等しい出力電圧を発生する。抵抗７、８は同抵抗値
に構成されている。In the above case, the light receiving element 1 receives an optical signal and converts it into a current signal, and the amplifier 2 amplifies the output current of the light receiving element 1. The reference voltage generation circuit 4 has the same circuit configuration as the amplifier 2 and generates an output voltage substantially equal to the output voltage of the amplifier 2 when no signal is input. The resistors 7 and 8 are configured to have the same resistance value.
従来例では、電圧ホールドコンデンサ５が接地されてい
たが、図から明らかなように、この発明では電圧ホール
ドコンデンサ５が接地されないで、基準電圧発生回路４
に接続されている。In the conventional example, the voltage hold capacitor 5 is grounded, but as is clear from the figure, in the present invention, the voltage hold capacitor 5 is not grounded and the reference voltage generation circuit 4 is
It is connected to the.
このような光受信回路の動作時における各部の信号波形
は、第２図（ａ）〜（ｃ）に示すようになり、14は入力
端子Ａに入力される光パルス波形、15は接続点９に現れ
る増幅器２の出力電圧波形、16は接続点10に現れる分圧
波形、17は接続点６に現れる基準電圧発生回路４の出力
電圧波形、18はピークホールド回路13の出力電圧波形で
コンパレータ３の−端子に入力される。又、19は出力端
子Ｃに現れるコンパレータ３の出力電圧波形である。The signal waveforms of the respective parts during the operation of such an optical receiving circuit are as shown in FIGS. 2 (a) to (c), 14 is the optical pulse waveform input to the input terminal A, and 15 is the connection point 9 The output voltage waveform of the amplifier 2 appearing in FIG. 1, 16 is the voltage division waveform appearing at the connection point 10, 17 is the output voltage waveform of the reference voltage generating circuit 4 appearing at the connection point 6, 18 is the output voltage waveform of the peak hold circuit 13, and the comparator 3 Is input to the-terminal. Reference numeral 19 is an output voltage waveform of the comparator 3 which appears at the output terminal C.
さて、この発明の光受信回路が電源電圧ノイズ・静電ノ
イズ環境下に置かれ、増幅器２と基準電圧発生回路４に
同等の高電位方向パルスが重畳している場合について考
えてみる。この場合、ピークホールド回路13の電圧ホー
ルドコンデンサ５の低電位側は基準電圧発生回路４に接
続されているため、コモンモードノイズを除去した増幅
器２の出力電圧波形15と基準電圧発生回路４の出力電圧
波形17の分圧波形に対してのみピークホールドを行な
い、ノイズ波形のピークをホールドすることはない。Now, let us consider a case where the optical receiving circuit of the present invention is placed in a power supply voltage noise / electrostatic noise environment, and equivalent high-potential direction pulses are superimposed on the amplifier 2 and the reference voltage generating circuit 4. In this case, since the low potential side of the voltage hold capacitor 5 of the peak hold circuit 13 is connected to the reference voltage generation circuit 4, the output voltage waveform 15 of the amplifier 2 and the output of the reference voltage generation circuit 4 from which common mode noise is removed. The peak hold is performed only on the divided voltage waveform of the voltage waveform 17, and the peak of the noise waveform is not held.
これにより、ピークホールド回路13はコモンモードノイ
ズ環境下でも、増幅器２の出力電圧波形15の半値幅を検
知以来、コンパレータ出力には光パルス幅と同じパルス
幅の電圧パルス19が出力される。As a result, even in the common mode noise environment, the peak hold circuit 13 outputs the voltage pulse 19 having the same pulse width as the optical pulse width to the comparator output after detecting the half width of the output voltage waveform 15 of the amplifier 2.
［発明の効果］ 以上詳述したようにこの発明によれば、コモンモードノ
イズの影響が抑制され、耐ノイズ性が著しく向上する。[Advantages of the Invention] As described in detail above, according to the present invention, the influence of common mode noise is suppressed, and the noise resistance is significantly improved.
第１図はこの発明の一実施例に係る光受信回路を示す回
路構成図、第２図（ａ）〜（ｃ）は第１図の光受信回路
における各部の信号波形図、第３図は従来の光受信回路
を示す回路構成図、第４図（ａ）〜（ｃ）は第３図の光
受信回路における各部の信号波形図である。 １……受光素子、２……増幅器、３……コンパレータ、
４……基準電圧発生回路、５……電圧ホールドコンデン
サ、７、８……抵抗、13……ピークホールド回路。1 is a circuit configuration diagram showing an optical receiving circuit according to an embodiment of the present invention, FIGS. 2 (a) to 2 (c) are signal waveform diagrams of respective portions in the optical receiving circuit of FIG. 1, and FIG. FIG. 4A to FIG. 4C are circuit configuration diagrams showing a conventional optical receiving circuit, and are signal waveform diagrams of respective parts in the optical receiving circuit of FIG. 1 ... Light receiving element, 2 ... Amplifier, 3 ... Comparator,
4 ... Reference voltage generation circuit, 5 ... Voltage hold capacitor, 7, 8 ... Resistor, 13 ... Peak hold circuit.
Claims (2)
子と、この受光素子の出力電流を増幅する増幅器と、こ
の増幅器と回路構成が等しくこの増幅器の無信号入力時
の出力電圧とほぼ等しい出力電圧を発生する基準電圧発
生回路と、この基準電圧発生回路の出力と前記増幅器の
出力との間に直列に接続された同抵抗値の第１の抵抗及
び第２の抵抗と、この第１の抵抗と第２の抵抗との接続
点を入力とし内蔵の電圧ホールドコンデンサの固定電位
端子が前記基準電圧発生回路の出力に接続されたピーク
ホールド回路と、このピークホールド回路と前記増幅器
との各出力を入力とするコンパレータとを具備すること
を特徴とする光受信回路。1. A light-receiving element for receiving an optical signal and converting it into a current signal, an amplifier for amplifying an output current of the light-receiving element, and a circuit configuration equal to that of the amplifier. A reference voltage generating circuit for generating equal output voltages, a first resistor and a second resistor having the same resistance value connected in series between the output of the reference voltage generating circuit and the output of the amplifier, and A peak hold circuit in which a fixed potential terminal of a built-in voltage hold capacitor is connected to an output of the reference voltage generation circuit with a connection point between the first resistance and the second resistance as an input, and the peak hold circuit and the amplifier. An optical receiving circuit comprising: a comparator having each output as an input.
コンデンサと、コンパレータと、ダイオードとを具備す
ることを特徴とする請求項第１項記載の光受信回路。2. The optical receiving circuit according to claim 1, wherein the peak hold circuit includes a voltage hold capacitor, a comparator, and a diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2322041A JPH0775336B2 (en) | 1990-11-26 | 1990-11-26 | Optical receiver circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2322041A JPH0775336B2 (en) | 1990-11-26 | 1990-11-26 | Optical receiver circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04196632A JPH04196632A (en) | 1992-07-16 |
| JPH0775336B2 true JPH0775336B2 (en) | 1995-08-09 |
Family
ID=18139261
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2322041A Expired - Fee Related JPH0775336B2 (en) | 1990-11-26 | 1990-11-26 | Optical receiver circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0775336B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2910526B2 (en) * | 1993-09-30 | 1999-06-23 | 住友電気工業株式会社 | Optical signal detection circuit |
| JP5115472B2 (en) * | 2008-12-26 | 2013-01-09 | 富士通セミコンダクター株式会社 | ASK demodulation circuit |
| US10039526B2 (en) * | 2015-09-17 | 2018-08-07 | Qualcomm Incorporated | Pixel receiver with low frequency noise reduction for ultrasonic imaging apparatus |
| CN110086434A (en) * | 2019-02-28 | 2019-08-02 | 厦门优迅高速芯片有限公司 | A kind of circuit promoted across RSSI foot anti-noise ability in resistance amplifying circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59187249U (en) * | 1983-05-27 | 1984-12-12 | 矢崎総業株式会社 | optical digital signal receiver |
-
1990
- 1990-11-26 JP JP2322041A patent/JPH0775336B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04196632A (en) | 1992-07-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |