JPH076708Y2 - Triac phase controller - Google Patents
Triac phase controllerInfo
- Publication number
- JPH076708Y2 JPH076708Y2 JP6754487U JP6754487U JPH076708Y2 JP H076708 Y2 JPH076708 Y2 JP H076708Y2 JP 6754487 U JP6754487 U JP 6754487U JP 6754487 U JP6754487 U JP 6754487U JP H076708 Y2 JPH076708 Y2 JP H076708Y2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- diode
- triac
- waveform
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- Power Conversion In General (AREA)
Description
【考案の詳細な説明】 （産業上の利用分野） 本考案は、過電圧を防止できるトライアックによる電源
交流電圧の位相制御装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a phase control device for a power supply AC voltage by a triac capable of preventing overvoltage.
（従来の技術） トライアックを利用して電源交流電圧を位相制御して所
要実効値の交流電圧を得ることは、既に公知である。(Prior Art) It is already known to use a triac to phase-control an AC voltage of a power supply to obtain an AC voltage of a required effective value.
（考案が解決しようとする問題点） しかしながら、従来の一般的なトライアック位相制御装
置では、電源電圧が上昇した場合、出力側の低圧が電源
電圧に比例して上昇するか、もしくは電源電圧の上昇に
よりトライアックの点弧角が増加するため、電源電圧の
上昇比率よりも出力側の低圧の上昇比率が大きくなるこ
とが多い。(Problems to be solved by the invention) However, in the conventional general triac phase control device, when the power supply voltage rises, the low voltage on the output side rises in proportion to the power supply voltage or the power supply voltage rises. As a result, the firing angle of the triac increases, so that the increase rate of the low voltage on the output side is often larger than the increase rate of the power supply voltage.
従って本考案の目的は、トライアックの点弧時期を電源
交流電圧の波高値の特定点より開始することによって、
低い実効値の交流電圧を得る場合においても過電圧を的
確に防止できる位相制御装置を提供することである。Therefore, an object of the present invention is to start the ignition timing of the triac from a specific point of the peak value of the power supply AC voltage,
An object of the present invention is to provide a phase control device capable of accurately preventing an overvoltage even when an AC voltage having a low effective value is obtained.
（問題点を解決するための手段） 以下、添付図面中の参照符号を用いて説明すると本考案
のトライアック位相制御装置は、互いに逆方向に直列接
続された一対の第一のツェナーダイオード1a,1bと第一
の抵抗器２より成る整流回路を交流電源14に接続し、互
いに逆方向に直列接続された一対の第二のツェナーダイ
オード4a,4bと第二の抵抗器３より成る平滑回路を第一
の抵抗器２の両端に接続し、第一のダイオード５と第三
の抵抗器６より成る第一の片波整流回路を第二のツェナ
ーダイオード4a,4bの両端に接続し、第一のダイオード
５とは逆方向の第二のダイオード５′と第四の抵抗器
６′より成る第二の片波整流回路を第二のツェナーダイ
オード4a,4bの両端に接続し、第一のコンデンサー７と
第五の抵抗器８より成る第一の微分回路を第三の抵抗器
６の両端に接続し、第二のコンデンサー７′と第六の抵
抗器８′より成る第二の微分回路を第四の抵抗器６′の
両端に接続し、第三のダイオード９と第七の抵抗器10よ
り成る第三の片波整流回路を第五の抵抗器８の両端に接
続し、第三のダイオード９とは逆方向の第四のダイオー
ド９′と第八の抵抗器10′より成る第四の片波整流回路
を第六の抵抗器８′の両端に接続し、第七の抵抗器10と
第八の抵抗器10′の両端の正負のパルス出力をトライア
ック12のゲートに印加するものである。(Means for Solving the Problems) Hereinafter, a description will be given using the reference symbols in the accompanying drawings. The triac phase control device of the present invention comprises a pair of first Zener diodes 1a and 1b connected in series in opposite directions. A rectifying circuit composed of the first resistor 2 and the first resistor 2 is connected to the AC power supply 14, and a smoothing circuit composed of a pair of second Zener diodes 4a and 4b and a second resistor 3 connected in series in opposite directions to each other. The first half-wave rectifier circuit composed of the first diode 5 and the third resistor 6 is connected to both ends of the first resistor 2, and is connected to both ends of the second Zener diodes 4a and 4b. A second half-wave rectifier circuit composed of a second diode 5'and a fourth resistor 6'in the direction opposite to the diode 5 is connected to both ends of the second Zener diodes 4a and 4b, and the first capacitor 7 And the fifth resistor 8 and the first differentiating circuit to the third resistor 6 is connected to both ends of the fourth resistor 6'and a second differentiating circuit consisting of a second capacitor 7'and a sixth resistor 8'is connected to both ends of the fourth resistor 6 '. A third one-sided rectifying circuit composed of the resistor 10 is connected to both ends of the fifth resistor 8, and the fourth diode 9'and the eighth resistor 10 'in the opposite direction to the third diode 9 are connected. The fourth single-wave rectifier circuit consisting of is connected to both ends of the sixth resistor 8 ', and the positive and negative pulse outputs from both ends of the seventh resistor 10 and the eighth resistor 10' are connected to the gate of the triac 12. It is applied.
（作用） このトライアック利用の位相制御装置では、第２図の
（ａ）に示す交流電源14の正弦波波形は、第一のツェナ
ーダイオード1a,1bのツェナー電圧点で正負の波頭部分
が切取られ、抵抗器２の両端に第２図の（ｂ）の波形が
得られる。この（ｂ）の波形は、第二の抵抗器３と第二
のツェナーダイオード4a,4bにより平坦化され、第二の
ツェナーダイオード4a,4bの両端に第２図の（ｃ）の波
形が得られる。(Operation) In this phase control device using the triac, the sine wave waveform of the AC power supply 14 shown in (a) of FIG. 2 is cut off at the positive and negative wave front portions at the Zener voltage points of the first Zener diodes 1a and 1b. , The waveform of (b) of FIG. 2 is obtained at both ends of the resistor 2. The waveform of (b) is flattened by the second resistor 3 and the second Zener diodes 4a and 4b, and the waveform of (c) of FIG. 2 is obtained at both ends of the second Zener diodes 4a and 4b. To be
この（ｃ）の波形は、正側のみが残るように第一のダイ
オード５と第三の抵抗器６で片波整流され、第三の抵抗
器６の両端に第２図の（ｄ）の波形が得られる。この
（ｄ）の波形は、第一のコンデンサー７と第五の抵抗器
８で微分され、正負２つのパルスより成る第２図の
（ｆ）の波形が第五の抵抗器８の両端に得られる。This waveform of (c) is single-wave rectified by the first diode 5 and the third resistor 6 so that only the positive side remains, and the waveform of (d) of FIG. The waveform is obtained. This waveform (d) is differentiated by the first capacitor 7 and the fifth resistor 8, and the waveform (f) in FIG. 2 consisting of two positive and negative pulses is obtained at both ends of the fifth resistor 8. To be
この（ｆ）の波形は、第三のダイオード９と第七の抵抗
器10で負側のパルスのみが残るように片波整流され、第
２図の（ｈ）の波形が第七の抵抗器10の両端に得られ
る。このパルスの位相は（ｂ）の波形の正の半波の下降
ゼロクロス点と一致する。This waveform (f) is single-wave rectified so that only the negative pulse remains in the third diode 9 and the seventh resistor 10, and the waveform (h) in FIG. 2 is the seventh resistor. Obtained at both ends of 10. The phase of this pulse coincides with the falling zero-cross point of the positive half-wave of the waveform in (b).
他方、第２図の（ｃ）の波形は、負側のみが残るように
第二のダイオード５′と第四の抵抗器６′で片波整流さ
れ、第四の抵抗器６′の両端に第２図の（ｅ）の波形が
得られる。この（ｅ）の波形は、第二のコンデンサー
７′と第六の抵抗器８′で微分され、正負２つのパルス
より成る第２図の（ｇ）の波形が第六の抵抗器８′の両
端に得られる。On the other hand, the waveform of (c) of FIG. 2 is one-sided rectified by the second diode 5'and the fourth resistor 6'so that only the negative side remains, and is applied to both ends of the fourth resistor 6 '. The waveform of (e) in FIG. 2 is obtained. The waveform of (e) is differentiated by the second capacitor 7'and the sixth resistor 8 ', and the waveform of (g) of FIG. 2 consisting of two positive and negative pulses of the sixth resistor 8'. Obtained at both ends.
この（ｇ）の波形は、第四のダイオード９′と第八の抵
抗器10′で正側のパルスのみが残るように片波整流さ
れ、第２図の（ｉ）の波形が第八の抵抗器10′の両端に
得られる。このパルスの位相は（ｂ）の波形の負の半波
の上昇ゼロクロス点と一致する。This waveform (g) is one-sided rectified by the fourth diode 9'and the eighth resistor 10 'so that only the positive pulse remains, and the waveform (i) in FIG. Available at both ends of resistor 10 '. The phase of this pulse coincides with the rising zero-cross point of the negative half-wave of the waveform in (b).
これらの正負のパルスは、第一の増幅器11と第二の増幅
器11′を経てトライアック12のゲートを制御し、かくし
てトライアック12と交流電源14間に挿入された負荷13に
は、第２図の（ｊ）の電圧波形が与えられる。These positive and negative pulses control the gate of the triac 12 via the first amplifier 11 and the second amplifier 11 ', and thus the load 13 inserted between the triac 12 and the AC power supply 14 is connected to the load 13 shown in FIG. The voltage waveform of (j) is given.
負荷13の（ｊ）波形の波高値は、第一のツェナーダイオ
ード1a,1bと第一の抵抗器２で得た（ｂ）波形の各ゼロ
クロス点に対応する（ａ）波形の波高値と同一であり、
また、この波高値は第一のツェナーダイオード1a,1bの
各ツェナー電圧と一致する。The peak value of the (j) waveform of the load 13 is the same as the peak value of the (a) waveform corresponding to each zero-cross point of the (b) waveform obtained by the first Zener diodes 1a and 1b and the first resistor 2. And
Further, this peak value matches the Zener voltages of the first Zener diodes 1a and 1b.
（考案の効果） 以上のように構成された本考案のトライアック位相制御
装置においては、トライアック12の点弧は第一のツェナ
ーダイオード1a,1bのツェナー電圧で定まる電源交流電
圧の波高値の特定点より開始され、このツェナー電圧は
一定であるため、交流電源14の電圧が変動しても負荷13
に与えられる電圧波高値も一定となり、低圧出力側の過
電圧が防止される。(Effect of the device) In the triac phase control device of the present invention configured as described above, the ignition of the triac 12 is determined by the zener voltage of the first zener diodes 1a and 1b. Since the Zener voltage is constant after the start of the load, even if the voltage of the AC power supply 14 fluctuates, the load 13
The peak value of the voltage applied to is also constant and overvoltage on the low voltage output side is prevented.
電源電圧が変動することにより前記（ｂ）波形の幅が時
間方向に変化する結果、点弧角が変化し、電源電圧が上
昇した場合は、負荷に与えられる電圧の波高値は一定で
も実効値が低下し、また、電源電圧が低下した場合は、
実効値が上昇する傾向を示すけれども、本考案によれ
ば、従来の位相制御回路に比べて電源電圧の変動に対し
出力側の電圧変動が少ない安定した位相制御装置を提供
できるのである。When the power supply voltage fluctuates, the width of the waveform (b) changes in the time direction. As a result, when the firing angle changes and the power supply voltage rises, the peak value of the voltage applied to the load is constant but the effective value. , And if the power supply voltage drops,
Although the effective value tends to increase, the present invention can provide a stable phase control device in which the voltage fluctuation on the output side is less than the fluctuation of the power supply voltage as compared with the conventional phase control circuit.
第一図は本考案の一実施例に係るトライアック位相制御
装置の電気回路図である。第２図の（ａ）から（ｊ）は
第１図の電気回路の各点における波形図である。 1a,1b……第一のツェナーダイオード、２……第一の抵
抗器、３……第二の抵抗器、4a,4b……第二のツェナー
ダイオード、５……第一のダイオード、５′……第二の
ダイオード、６……第三の抵抗器、６′……第四の抵抗
器、７……第一のコンデンサー、７′……第二のコンデ
ンサー、８……第五の抵抗器、８′……第六の抵抗器、
９……第三のダイオード、９′……第四のダイオード、
10……第七の抵抗器、10′……第八の抵抗器、11……第
一の増幅器、11′……第二の増幅器、12……トライアッ
ク、13……負荷、14……交流電源FIG. 1 is an electric circuit diagram of a triac phase controller according to an embodiment of the present invention. (A) to (j) of FIG. 2 are waveform diagrams at respective points of the electric circuit of FIG. 1a, 1b ...... first Zener diode, 2 ... first resistor, 3 ... second resistor, 4a, 4b ... second Zener diode, 5 ... first diode, 5 ' ...... Second diode, 6 ... Third resistor, 6 '... Fourth resistor, 7 ... First capacitor, 7' ... Second capacitor, 8 ... Fifth resistor Container, 8 '... sixth resistor,
9 ... third diode, 9 '... fourth diode,
10 …… Seventh resistor, 10 ′ …… Eighth resistor, 11 …… First amplifier, 11 ′ …… Second amplifier, 12 …… Triac, 13 …… Load, 14 …… AC Power supply
Claims (1)
のツェナーダイオード1a,1bと第一の抵抗器２より成る
整流回路を交流電源14に接続し、互いに逆方向に直列接
続された一対の第二のツェナーダイオード4a,4bと第二
の抵抗器３より成る平滑回路を第一の抵抗器２の両端に
接続し、第一のダイオード５と第三の抵抗器６より成る
第一の片波整流回路を第二のツェナーダイオード4a,4b
の両端に接続し、第一のダイオード５とは逆方向の第二
のダイオード５′と第四の抵抗器６′より成る第二の片
波整流回路を第二のツェナーダイオード4a,4bの両端に
接続し、第一のコンデンサー７と第五の抵抗器８より成
る第一の微分回路を第三の抵抗器６の両端に接続し、第
二のコンデンサー７′と第六の抵抗器８′より成る第二
の微分回路を第四の抵抗器６′の両端に接続し、第三の
ダイオード９と第七の抵抗器10より成る第三の片波整流
回路を第五の抵抗器８の両端に接続し、第三のダイオー
ド９とは逆方向の第四のダイオード９′と、第八の抵抗
器10′より成る第四の片波整流回路を第六の抵抗器８′
の両端に接続し、第七の抵抗器10と第八の抵抗器10′の
両端の正負のパルス出力をトライアック12のゲートに印
加するトライアック位相制御装置。1. A rectifier circuit comprising a pair of first Zener diodes 1a, 1b and a first resistor 2 connected in series in opposite directions to each other is connected to an AC power source 14 and connected in series in opposite directions. A smoothing circuit composed of a pair of second Zener diodes 4a, 4b and a second resistor 3 is connected to both ends of the first resistor 2, and a first diode 5 and a third resistor 6 are connected. The single-wave rectifier circuit of the second Zener diode 4a, 4b
A second half-wave rectifying circuit connected to both ends of the second Zener diode 4a, 4b, which is composed of a second diode 5'in the opposite direction to the first diode 5 and a fourth resistor 6 '. Connected to both ends of the third resistor 6 by connecting the first differentiating circuit consisting of the first capacitor 7 and the fifth resistor 8 to the second capacitor 7'and the sixth resistor 8 '. A second differentiating circuit consisting of the third resistor 9'is connected to both ends of the fourth resistor 6'and a third single-wave rectifying circuit consisting of a third diode 9 and a seventh resistor 10 is connected to the fifth resistor 8 '. A fourth half-wave rectifier circuit, which is connected to both ends and includes a fourth diode 9'in the opposite direction to the third diode 9 and an eighth resistor 10 ', is provided with a sixth resistor 8'.
A triac phase control device which is connected to both ends of the triac 12 and applies positive and negative pulse outputs from both ends of the seventh resistor 10 and the eighth resistor 10 'to the gate of the triac 12.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6754487U JPH076708Y2 (en) | 1987-05-06 | 1987-05-06 | Triac phase controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6754487U JPH076708Y2 (en) | 1987-05-06 | 1987-05-06 | Triac phase controller |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63176375U JPS63176375U (en) | 1988-11-15 |
| JPH076708Y2 true JPH076708Y2 (en) | 1995-02-15 |
Family
ID=30906550
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6754487U Expired - Lifetime JPH076708Y2 (en) | 1987-05-06 | 1987-05-06 | Triac phase controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH076708Y2 (en) |
-
1987
- 1987-05-06 JP JP6754487U patent/JPH076708Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63176375U (en) | 1988-11-15 |
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