JPH07336560A - Noise elimination circuit for contour emphasis circuit - Google Patents

Noise elimination circuit for contour emphasis circuit

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Publication number
JPH07336560A
JPH07336560A JP6145541A JP14554194A JPH07336560A JP H07336560 A JPH07336560 A JP H07336560A JP 6145541 A JP6145541 A JP 6145541A JP 14554194 A JP14554194 A JP 14554194A JP H07336560 A JPH07336560 A JP H07336560A
Authority
JP
Japan
Prior art keywords
edge component
unit
circuit
contour
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6145541A
Other languages
Japanese (ja)
Inventor
Hitoshi Ohori
仁志 大堀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Original Assignee
Fujitsu General Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd filed Critical Fujitsu General Ltd
Priority to JP6145541A priority Critical patent/JPH07336560A/en
Publication of JPH07336560A publication Critical patent/JPH07336560A/en
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)

Abstract

PURPOSE:To obtain a circuit that detects a noise component, eliminates noise and amplifies the contour without arithmetic operation such as addition/ subtraction in a contour amplifier circuit. CONSTITUTION:In-the circuit extracting an edge component from a digital image signal and adding the component to an original image signal, a contour component extract section 18 is inserted between an edge component detection section 11 and an adder circuit section 13. The contour component extract section 18 is made up of an output control section 20 controlling whether or not an edge component output is fed to an adder circuit section 13 and a noise level detection section 19 applying switching control to the gate of the output control section 20. Thus, when the edge component is a prescribed value or below or over, the edge component output is fed to the adder circuit section 13 without any processing. When the edge component is within a prescribed value, the edge component output is not fed to the adder circuit section 13 and its output is zero. Thus, a contour component is not attenuated in the contour component extract section 18.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ディジタルTV、ディ
ジタルVCRなどのディジタル画像処理回路における輪
郭強調回路の雑音除去回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a noise eliminating circuit for a contour emphasizing circuit in a digital image processing circuit such as a digital TV or a digital VCR.

【0002】[0002]

【従来の技術】従来のディジタル画像処理回路における
輪郭強調回路は、図3に示すように構成されており、画
像の輪郭を強調するには、映像信号入力端子10に入力
したディジタル画像からエッジ成分検出部11を通して
エッジ成分を抽出し、このエッジ成分の中から雑音成分
を取り除いた輪郭成分を輪郭成分抽出回路12で抽出
し、加算回路部13で元の画像に付加して、出力端子1
4から出力するようになっていた。
2. Description of the Related Art A contour enhancement circuit in a conventional digital image processing circuit is constructed as shown in FIG. 3, and in order to enhance the contour of an image, an edge component from a digital image input to a video signal input terminal 10 is used. An edge component is extracted through the detection unit 11, a noise component is removed from the edge component, a contour component extraction circuit 12 extracts the contour component, and an addition circuit unit 13 adds the contour component to the original image.
It was supposed to output from 4.

【0003】図3に示す従来回路による輪郭成分抽出特
性が図4に示される。このような特性を得るための前記
輪郭成分抽出部12は、図3の鎖線内に示される演算回
路が用いられる。この輪郭成分抽出部12内の雑音レベ
ル検出部15にて、雑音成分である±δのレベルを検出
する。「エッジ成分<−δ」のときは、鎖線で示したも
とのエッジ成分に+δを加算して実線の特性を得、また
「+δ<エッジ成分」のときは、鎖線で示したもとのエ
ッジ成分に−δを加算して実線の特性を得、さらに「−
δ≦エッジ成分≦+δ」のときは、出力制御部17で点
線の特性出力を0にして雑音を除去し、図4に実線で示
す特性を実現している。
FIG. 4 shows the contour component extraction characteristic of the conventional circuit shown in FIG. As the contour component extraction unit 12 for obtaining such characteristics, the arithmetic circuit shown in the chain line in FIG. 3 is used. The noise level detection unit 15 in the contour component extraction unit 12 detects the level of ± δ that is a noise component. When "edge component <-δ", + δ is added to the original edge component shown by the chain line to obtain the characteristic of the solid line, and when "+ δ <edge component", the original edge component shown by the chain line is- δ is added to obtain the solid line characteristic, and
When δ ≦ edge component ≦ + δ ”, the output controller 17 sets the characteristic output of the dotted line to 0 to remove noise, and realizes the characteristic shown by the solid line in FIG.

【0003】[0003]

【発明が解決しようとする課題】しかるに、前記従来の
輪郭増幅回路12には、演算回路部16が必要であり、
また、この演算回路部16には、加算の場合と減算の場
合との符号合わせのための複雑な回路を必要とする。さ
らに、雑音成分である±δのレベルを加減算するため、
δ分だけ輪郭成分が減衰してしまうなどの問題があっ
た。
However, the conventional contour amplifying circuit 12 requires the arithmetic circuit section 16,
Further, the arithmetic circuit section 16 requires a complicated circuit for sign matching in the case of addition and the case of subtraction. Furthermore, in order to add and subtract the level of ± δ which is a noise component,
There is a problem that the contour component is attenuated by δ.

【0004】本発明は、輪郭増幅回路による加減算など
の演算を行なうことなく、雑音成分を検出して雑音を除
去し、輪郭を増幅する回路を得ることを目的とするもの
である。
An object of the present invention is to obtain a circuit which detects a noise component, removes noise, and amplifies a contour without performing addition and subtraction operations by the contour amplification circuit.

【0005】[0005]

【課題を解決するための手段】本発明は、映像信号入力
端子10に入力したディジタル画像信号からエッジ成分
検出部11でエッジ成分を抽出し、加算回路部13で元
の画像信号に付加するようにした回路において、前記エ
ッジ成分検出部11と加算回路部13との間に、雑音レ
ベルが一定範囲内のときに前記エッジ成分検出部11の
出力を禁止する輪郭成分抽出部18を挿入してなり、こ
の輪郭成分抽出部18は、エッジ成分検出部11の出力
を加算回路部13に送るかどうかを制御する出力制御部
20と、この出力制御部20のゲートを開閉制御する雑
音レベル検出部19とからなることを特徴とする輪郭増
強回路の雑音除去回路である。
According to the present invention, an edge component detection unit 11 extracts an edge component from a digital image signal input to a video signal input terminal 10 and an addition circuit unit 13 adds it to the original image signal. In the above circuit, a contour component extraction unit 18 that prohibits the output of the edge component detection unit 11 when the noise level is within a certain range is inserted between the edge component detection unit 11 and the addition circuit unit 13. The contour component extraction unit 18 controls the output of the edge component detection unit 11 to the addition circuit unit 13 and the noise level detection unit that controls the opening and closing of the gate of the output control unit 20. 19 is a noise removal circuit of the contour enhancement circuit.

【0006】[0006]

【作用】映像信号入力端子10に入力したディジタル画
像からエッジ成分検出部11でエッジ成分を抽出し、こ
のエッジ成分を輪郭成分抽出部18の雑音レベル検出部
19に入力する。エッジ成分が一定値以下のときは、エ
ッジ成分検出部11からの出力がそのまま加算回路部1
3送られる。エッジ成分が一定値以上のときも、エッジ
成分検出部11からの出力がそのまま加算回路部13送
られる。エッジ成分が一定値の範囲内のときは、エッジ
成分検出部11からの出力が加算回路部13へ送られ
ず、加算回路部13の出力が0となる。このようにして
輪郭成分抽出部18での輪郭成分が減衰してしまうこと
なく出力する。
The edge component detecting unit 11 extracts an edge component from the digital image input to the video signal input terminal 10, and the edge component is input to the noise level detecting unit 19 of the contour component extracting unit 18. When the edge component is less than or equal to a certain value, the output from the edge component detection unit 11 is directly added to the addition circuit unit
3 will be sent. Even when the edge component is a certain value or more, the output from the edge component detection unit 11 is sent to the addition circuit unit 13 as it is. When the edge component is within the range of the constant value, the output from the edge component detection unit 11 is not sent to the addition circuit unit 13, and the output of the addition circuit unit 13 becomes 0. In this way, the contour component in the contour component extraction unit 18 is output without being attenuated.

【0007】[0007]

【実施例】以下、本発明の実施例を図1に基づき説明す
る。映像信号入力端子10に入力したディジタル画像信
号からエッジ成分検出部11でエッジ成分を抽出し、加
算回路部13で元の画像信号に付加するようにした回路
において、エッジ成分検出部11と加算回路部13との
間に本発明による輪郭成分抽出部18が挿入される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. In the circuit in which the edge component detection unit 11 extracts the edge component from the digital image signal input to the video signal input terminal 10 and the addition circuit unit 13 adds it to the original image signal, the edge component detection unit 11 and the addition circuit A contour component extraction unit 18 according to the present invention is inserted between the unit 13 and the unit 13.

【0008】この輪郭成分抽出部18は、エッジ成分検
出部11の出力を加算回路部13に送るかどうかを制御
する出力制御部20と、この出力制御部20のゲートを
開閉制御する雑音レベル検出部19とからなる。この雑
音レベル検出部19は、エッジ成分検出部11からの輪
郭成分中の雑音レベルδ(例としてδ=±2hの場合)
を検出し、この雑音レベルδが−2h〜+2hのとき、
これを反転してLを出力するものであり、また、前記出
力制御部20はアンドゲートからなるものである。
The contour component extraction unit 18 controls the output of the edge component detection unit 11 to the addition circuit unit 13 and the noise level detection of the gate of the output control unit 20. And part 19. The noise level detector 19 detects the noise level δ in the contour component from the edge component detector 11 (for example, when δ = ± 2h).
Is detected, and when the noise level δ is −2h to + 2h,
This is inverted to output L, and the output control section 20 is composed of an AND gate.

【0009】以上のような構成における作用を説明す
る。映像信号入力端子10に入力した例えば8ビットの
ディジタル画像からエッジ成分検出部11を通してエッ
ジ成分を抽出し、このエッジ成分を輪郭成分抽出部18
の雑音レベル検出部19に入力する。
The operation of the above configuration will be described. An edge component detecting unit 11 extracts an edge component from an 8-bit digital image input to the video signal input terminal 10, and the edge component is extracted as a contour component extracting unit 18
Input to the noise level detector 19 of.

【0010】「エッジ成分<−2h」のときは、雑音レ
ベル検出部19の出力がHであるから、エッジ成分検出
部11からの出力がそのまま加算回路部13送られる。
「+2h<エッジ成分」のときも、雑音レベル検出部1
9の出力がHであるから、エッジ成分検出部11からの
出力がそのまま加算回路部13送られる。「−2h≦エ
ッジ成分≦+2h」のときは、雑音レベル検出部19の
出力がLであるから、エッジ成分検出部11からの出力
が加算回路部13へ送られず、加算回路部13の出力が
0となる。このようにして、加算回路部13には、図2
の実線で示す特性が得られる。
When "edge component <-2h", the output of the noise level detecting unit 19 is H, and therefore the output from the edge component detecting unit 11 is sent as it is to the adding circuit unit 13.
Even when “+ 2h <edge component”, the noise level detection unit 1
Since the output of 9 is H, the output from the edge component detection unit 11 is sent as it is to the addition circuit unit 13. When “−2h ≦ edge component ≦ + 2h”, the output of the noise level detection unit 19 is L, so the output from the edge component detection unit 11 is not sent to the addition circuit unit 13 and the output of the addition circuit unit 13 is output. Becomes 0. In this way, the adder circuit unit 13 is configured as shown in FIG.
The characteristic indicated by the solid line is obtained.

【0011】なお、この場合、図2中の±δは、±2h
であり、|δ|=1/64(4/2の8乗)である。
In this case, ± δ in FIG. 2 is ± 2h
And | δ | = 1/64 (4/2 to the 8th power).

【0012】[0012]

【発明の効果】【The invention's effect】

(1)従来は、輪郭成分抽出部12には、演算回路部1
6が必要であり、またこの演算回路部16には、加算の
場合と減算の場合との符号合わせのための複雑な回路を
必要としていたが、本発明では加減算のための演算回路
が不要になり、回路規模が小さく、コストも低く、さら
に装置を小型化できる。
(1) Conventionally, the arithmetic circuit unit 1 is provided in the contour component extraction unit 12.
6 is required, and the arithmetic circuit unit 16 needs a complicated circuit for sign matching in the case of addition and the case of subtraction. However, the present invention does not require an arithmetic circuit for addition and subtraction. Therefore, the circuit scale is small, the cost is low, and the device can be downsized.

【0013】(2)本発明は、雑音成分である±δのレ
ベルを加減算しないので、輪郭成分抽出部18での輪郭
成分が減衰してしまうようなことがない。
(2) Since the present invention does not add or subtract the level of ± δ which is a noise component, the contour component in the contour component extraction unit 18 will not be attenuated.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による輪郭増強回路の雑音除去回路の第
1実施例を示すブロック図である。
FIG. 1 is a block diagram showing a first embodiment of a noise elimination circuit of a contour enhancement circuit according to the present invention.

【図2】図1の本発明回路による特性図である。FIG. 2 is a characteristic diagram of the circuit of the present invention shown in FIG.

【図3】従来の輪郭増強回路の雑音除去回路のブロック
図である。
FIG. 3 is a block diagram of a noise removal circuit of a conventional contour enhancement circuit.

【図4】図3の従来回路による特性図である。FIG. 4 is a characteristic diagram of the conventional circuit of FIG.

【符号の説明】[Explanation of symbols]

10…映像信号入力端子、11…エッジ成分検出部、1
2…輪郭成分抽出部、13…加算回路部、14…出力端
子、15…雑音レベル検出部、16…演算回路部、17
…出力制御部、18…輪郭成分抽出部、19…雑音レベ
ル検出部、20…出力制御部。
10 ... Video signal input terminal, 11 ... Edge component detector, 1
2 ... Contour component extraction unit, 13 ... Addition circuit unit, 14 ... Output terminal, 15 ... Noise level detection unit, 16 ... Arithmetic circuit unit, 17
Output control unit, 18 contour component extraction unit, 19 noise level detection unit, 20 output control unit.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 映像信号入力端子10に入力したディジ
タル画像信号からエッジ成分検出部11でエッジ成分を
抽出し、加算回路部13で元の画像信号に付加するよう
にした回路において、前記エッジ成分検出部11と加算
回路部13との間に、雑音レベルが一定範囲内のときに
前記エッジ成分検出部11の出力を禁止する輪郭成分抽
出部18を挿入してなることを特徴とする輪郭増強回路
の雑音除去回路。
1. A circuit in which an edge component detection unit 11 extracts an edge component from a digital image signal input to a video signal input terminal 10 and the addition circuit unit 13 adds the extracted edge component to the original image signal. A contour component extraction section 18 for prohibiting the output of the edge component detection section 11 when the noise level is within a certain range is inserted between the detection section 11 and the addition circuit section 13 to enhance the contour. Circuit noise elimination circuit.
【請求項2】 映像信号入力端子10に入力したディジ
タル画像信号からエッジ成分検出部11でエッジ成分を
抽出し、加算回路部13で元の画像信号に付加するよう
にした回路において、前記エッジ成分検出部11と加算
回路部13との間に、雑音レベルが一定範囲内のときに
前記エッジ成分検出部11の出力を禁止する輪郭成分抽
出部18を挿入してなり、この輪郭成分抽出部18は、
エッジ成分検出部11の出力を加算回路部13に送るか
どうかを制御する出力制御部20と、この出力制御部2
0のゲートを開閉制御する雑音レベル検出部19とから
なることを特徴とする輪郭増強回路の雑音除去回路。
2. A circuit in which an edge component detection unit 11 extracts an edge component from a digital image signal input to a video signal input terminal 10 and the addition circuit unit 13 adds the extracted edge component to the original image signal. A contour component extraction unit 18 that prohibits the output of the edge component detection unit 11 when the noise level is within a certain range is inserted between the detection unit 11 and the addition circuit unit 13. This contour component extraction unit 18 Is
An output control unit 20 that controls whether or not the output of the edge component detection unit 11 is sent to the addition circuit unit 13, and this output control unit 2
A noise removal circuit of a contour enhancement circuit, comprising: a noise level detection section 19 for controlling the opening and closing of the 0 gate.
【請求項3】 映像信号入力端子10に入力したディジ
タル画像信号からエッジ成分検出部11でエッジ成分を
抽出し、加算回路部13で元の画像信号に付加するよう
にした回路において、前記エッジ成分検出部11と加算
回路部13との間に、雑音レベルが一定範囲内のときに
前記エッジ成分検出部11の出力を禁止する輪郭成分抽
出部18を挿入してなり、この輪郭成分抽出部18は、
エッジ成分検出部11の出力を加算回路部13に送るか
どうかを制御する出力制御部20と、前記エッジ成分検
出部11からの輪郭成分中の雑音レベルδを検出し、こ
の雑音レベルδが−δ〜+δのとき、これを反転してL
を出力し、前記出力制御部20のゲートを開閉制御する
雑音レベル検出部19とからなることを特徴とする輪郭
増強回路の雑音除去回路。
3. A circuit in which an edge component detection unit 11 extracts an edge component from a digital image signal input to a video signal input terminal 10 and an addition circuit unit 13 adds the extracted edge component to the original image signal. A contour component extraction unit 18 that prohibits the output of the edge component detection unit 11 when the noise level is within a certain range is inserted between the detection unit 11 and the addition circuit unit 13. This contour component extraction unit 18 Is
An output control unit 20 that controls whether or not the output of the edge component detection unit 11 is sent to the addition circuit unit 13 and a noise level δ in the contour component from the edge component detection unit 11 are detected, and this noise level δ is − When δ to + δ, invert this to L
And a noise level detection unit 19 for controlling the opening and closing of the gate of the output control unit 20.
【請求項4】 映像信号入力端子10に入力したディジ
タル画像信号からエッジ成分検出部11でエッジ成分を
抽出し、加算回路部13で元の画像信号に付加するよう
にした回路において、前記エッジ成分検出部11と加算
回路部13との間に、雑音レベルが一定範囲内のときに
前記エッジ成分検出部11の出力を禁止する輪郭成分抽
出部18を挿入してなり、この輪郭成分抽出部18は、
アンドゲートからなり、前記エッジ成分検出部11の出
力を加算回路部13に送るかどうかを制御する出力制御
部20と、前記エッジ成分検出部11からの輪郭成分中
の雑音レベルδを検出し、この雑音レベルδが−δ〜+
δのとき、これを反転してLを出力し、前記出力制御部
20のゲートを開閉制御する雑音レベル検出部19とか
らなることを特徴とする輪郭増強回路の雑音除去回路。
4. A circuit in which an edge component detector 11 extracts an edge component from a digital image signal input to a video signal input terminal 10 and an addition circuit 13 adds the extracted edge component to the original image signal. A contour component extraction unit 18 that prohibits the output of the edge component detection unit 11 when the noise level is within a certain range is inserted between the detection unit 11 and the addition circuit unit 13. This contour component extraction unit 18 Is
An AND gate, which controls whether or not the output of the edge component detection unit 11 is sent to the addition circuit unit 13, and a noise level δ in the contour component from the edge component detection unit 11 are detected, This noise level δ is −δ to +
A noise removing circuit for a contour enhancing circuit, comprising: a noise level detecting section 19 which inverts this when δ to output L and controls the opening and closing of the gate of the output control section 20.
JP6145541A 1994-06-03 1994-06-03 Noise elimination circuit for contour emphasis circuit Pending JPH07336560A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6145541A JPH07336560A (en) 1994-06-03 1994-06-03 Noise elimination circuit for contour emphasis circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6145541A JPH07336560A (en) 1994-06-03 1994-06-03 Noise elimination circuit for contour emphasis circuit

Publications (1)

Publication Number Publication Date
JPH07336560A true JPH07336560A (en) 1995-12-22

Family

ID=15387576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6145541A Pending JPH07336560A (en) 1994-06-03 1994-06-03 Noise elimination circuit for contour emphasis circuit

Country Status (1)

Country Link
JP (1) JPH07336560A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100420269C (en) * 2005-12-09 2008-09-17 逐点半导体(上海)有限公司 Picture reinforcing treatment system and treatment method
CN106600550A (en) * 2016-11-29 2017-04-26 深圳开立生物医疗科技股份有限公司 Ultrasonic image processing method and system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100420269C (en) * 2005-12-09 2008-09-17 逐点半导体(上海)有限公司 Picture reinforcing treatment system and treatment method
CN106600550A (en) * 2016-11-29 2017-04-26 深圳开立生物医疗科技股份有限公司 Ultrasonic image processing method and system
CN106600550B (en) * 2016-11-29 2020-08-11 深圳开立生物医疗科技股份有限公司 Ultrasonic image processing method and system

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