JPH07307328A - Pattern forming method - Google Patents
Pattern forming methodInfo
- Publication number
- JPH07307328A JPH07307328A JP9836794A JP9836794A JPH07307328A JP H07307328 A JPH07307328 A JP H07307328A JP 9836794 A JP9836794 A JP 9836794A JP 9836794 A JP9836794 A JP 9836794A JP H07307328 A JPH07307328 A JP H07307328A
- Authority
- JP
- Japan
- Prior art keywords
- film
- etching
- resist film
- resist
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Drying Of Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体製造工程にあっ
て、炭素、或いは炭化水素を主成分とする反射防止膜上
にレジストパターニングならびにエッチングする際に、
パターンの最適寸法を得るためのエッチング方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing process for resist patterning and etching on an antireflection film containing carbon or hydrocarbon as a main component.
The present invention relates to an etching method for obtaining an optimum pattern size.
【0002】近年のデバイスの微細化は著しく、半導体
基板上に微細なレジストパターンを形成する際、レジス
ト膜の下地に反射防止膜を用いることが必須となってき
ている。In recent years, the miniaturization of devices has been remarkable, and when forming a fine resist pattern on a semiconductor substrate, it has become essential to use an antireflection film as a base of the resist film.
【0003】[0003]
【従来の技術】従来、基板の高反射膜上でのレジスト膜
のパターニングでは、ハレーションの影響を受けて、レ
ジスト膜パターンの線巾がぎざついたり、段差上でくび
れたり、線巾がばらついたりしたために、レジスト膜下
層の反射防止膜としてカーボン質の物質を用いていた。2. Description of the Related Art Conventionally, in patterning a resist film on a highly reflective film of a substrate, the line width of the resist film pattern is jagged, narrowed on a step, or varied in line width under the influence of halation. For this reason, a carbonaceous substance is used as the antireflection film under the resist film.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、反射防
止膜を用いた場合、レジスト膜のピボタルシフト(ピボ
タル露光量とは、デフォーカス(焦点ずれ)してもレジ
スト膜パターンの線巾が最も変動しにくい露光量を指
し、その時のマスクパターンの線巾からのレジスト膜パ
ターンの寸法ずれをピボタルシフトと言う。)、或いは
エッチング後のピボタルシフトが±0.1μm程度と大
きくなる場合があり、マスクパターンの寸法から掛け離
れてしまうという問題が生ずる。However, when the antireflection film is used, the resist film pattern line width varies the most even if the resist film is subjected to a pivotal shift (pivotal exposure dose is defocused). This refers to a difficult exposure amount, and the dimension shift of the resist film pattern from the line width of the mask pattern at that time is called a pivotal shift.) Or, the pivotal shift after etching may be as large as about ± 0.1 μm. There is a problem that it is far from the size of.
【0005】そのため、エッチング後のデバイスパター
ンの出来上り寸法を調整する必要がある。実際に半導体
素子の微細化が進み、サブミクロンサイズのパターニン
グが主流となった現在、0.35μmのパターン巾のマ
スクで0.35μm巾のレジスト膜パターンを得たいと
ころが、ピボタルシフトが0.1μmとなると影響は大
きく、0.35μm巾のパターンを得るためには、ピボ
タルからずれた露光量で露光せざるを得ず、フォーカス
マージンを損ねていた。Therefore, it is necessary to adjust the finished dimension of the device pattern after etching. Actually, as the miniaturization of semiconductor devices progresses and sub-micron size patterning becomes mainstream, the point where the resist film pattern of 0.35 μm width is desired to be obtained with a mask of 0.35 μm pattern width, the pivotal shift is 0.1 μm. In that case, the influence is large, and in order to obtain a pattern with a width of 0.35 μm, it is necessary to perform exposure with an exposure amount deviated from the pivotal, which impairs the focus margin.
【0006】本発明は以上の点を鑑み、反射防止膜を含
む下地エッチングにおいて、レジストパターンでのピボ
タルシフトを打ち消し合う方向にエッチングシフト量を
コントロールして、エッチング後の出来上がりをマスク
寸法通りにするものである。In view of the above points, the present invention controls the etching shift amount in the direction in which the pivotal shifts in the resist pattern are canceled in the base etching including the antireflection film, and makes the finished product after etching the mask size. It is a thing.
【0007】[0007]
【課題を解決するための手段】図1は本発明の原理説明
図である。図において、1は基板、2は被エッチング
膜、3は反射防止膜、4はレジスト膜、5はエッチング
ガスである。FIG. 1 is a diagram for explaining the principle of the present invention. In the figure, 1 is a substrate, 2 is a film to be etched, 3 is an antireflection film, 4 is a resist film, and 5 is an etching gas.
【0008】本発明では上記問題点を解決するために、
レジスト膜下の反射防止膜をエッチングする際に、フレ
オンを代表とする弗素を含むハロゲン炭化水素ガスとO
2 の混合ガスを用いると良い。これは、レジスト膜のピ
ボタルシフト分をO2 ガスの効果によってアッシングし
つつ、反射防止膜、或いは反射防止膜を含む下地をエッ
チングすることで、マスク寸法からそれたピボタルシフ
トを打ち消し合うように調整するものである。According to the present invention, in order to solve the above problems,
When etching the antireflection film under the resist film, a halogen-containing hydrocarbon gas containing fluorine represented by Freon and O
It is better to use a mixed gas of 2 . This is done by etching the antireflection film or the underlayer including the antireflection film while ashing the pivotal shift of the resist film by the effect of O 2 gas to adjust the pivotal shifts deviating from the mask size. To do.
【0009】すなわち、図1(a)に示すように基板1
上の被エッチング膜2をレジスト膜4をマスクとしてエ
ッチングする場合、反射防止膜3があっても、レジスト
膜4の露光時に前述のピボタルシフトにより基板の反り
等による焦点ずれを包含するためにピボタルシフトを
0.1μm程度必要とすると、本来必要なレジスト膜の
マスクパターンの線巾aが太って露光され、現像後のレ
ジスト膜4の線巾が2bのピボタルシフト分だけ太くな
り、cの線巾になってしまう。That is, as shown in FIG. 1A, the substrate 1
When the upper etching target film 2 is etched by using the resist film 4 as a mask, even if the antireflection film 3 is provided, the pivotal shift is included in the resist film 4 when the resist film 4 is exposed, because the focal shift due to the warp of the substrate is included. When the shift is required to be about 0.1 μm, the line width a of the mask pattern of the resist film which is originally necessary is thickly exposed, and the line width of the resist film 4 after development becomes thicker by the pivotal shift of 2b, and the line of c. It becomes a width.
【0010】そのため、反射防止膜3、或いは更に被エ
ッチング膜2を異方性ドライエッチングする際にはレジ
スト膜4の必要マスクパターン線巾をaにするために、
従来の弗素を含むハロゲン炭化水素の反射防止膜3用の
エッチングガスに加えて、レジスト膜4の線巾が目減り
するようなレジストアッシングガスとしてO2 ガスを添
加する。これにより、レジスト巾は図1(b)に示すよ
うに本来のレジスト膜4のマスクパターン巾aにするこ
とができ、異方性ドライエッチングにより下層の反射防
止膜3、更には基板1上の被エッチング膜2が所望のパ
ターン巾aにエッチングすることができる。Therefore, when the antireflection film 3 or the film to be etched 2 is anisotropically dry-etched, the required mask pattern line width of the resist film 4 is set to a.
In addition to the conventional etching gas for the antireflection film 3 of halogen hydrocarbon containing fluorine, O 2 gas is added as a resist ashing gas that reduces the line width of the resist film 4. As a result, the resist width can be set to the original mask pattern width a of the resist film 4 as shown in FIG. 1B, and the anisotropic dry etching is applied to the lower antireflection film 3 and further on the substrate 1. The etching target film 2 can be etched to a desired pattern width a.
【0011】尚、弗素を含むハロゲン炭化水素ガスとし
ては、CF4 が一般的に良く用いられるが、塩素(C
l)や水素(H)を含むガスでも勿論良い。即ち、本発
明の目的は、図1に示すように、炭素或いは炭化水素を
主体とする反射防止膜3を下層に有するレジスト膜4を
マスクとして、基板1上の被エッチング膜2をエッチン
グする工程において、露光現像されたレジスト膜4並び
に反射防止膜3を弗素を含むハロゲン炭化水素と酸素を
混合したエッチングガス5でエッチングすることによ
り、また、エッチングガス5としてCF4 とO2 を用い
ることにより達成される。As the halogen-containing hydrocarbon gas containing fluorine, CF 4 is generally often used, but chlorine (C
Of course, a gas containing l) or hydrogen (H) may be used. That is, as shown in FIG. 1, the object of the present invention is to etch the etching target film 2 on the substrate 1 by using the resist film 4 having the antireflection film 3 mainly composed of carbon or hydrocarbon as an underlying layer as a mask. By etching the exposed and developed resist film 4 and antireflection film 3 with an etching gas 5 which is a mixture of fluorine-containing halogenated hydrocarbon and oxygen, and by using CF 4 and O 2 as the etching gas 5. To be achieved.
【0012】[0012]
【作用】上記のように、本発明では露光現像でパターン
の線巾がフォーカスマージンにより太って形成された分
を、反射防止膜のエッチングの際にCF4 系エッチング
ガスにレジスト膜のアッシング用にO2 を混合して、太
った線巾を目減りさせて本来設計したマスクパターン巾
になるようにレジスト膜パターンの線巾を調整する。そ
れにより、異方性エッチング等によってSiO2膜や電極用
導電膜が設計値通りの線巾にエッチングすることが可能
となる。As described above, in the present invention, the portion of the line width of the pattern formed by exposure and development thickened by the focus margin is used as a CF 4 etching gas for etching the resist film during etching of the antireflection film. The line width of the resist film pattern is adjusted by mixing O 2 to reduce the thick line width and achieve the originally designed mask pattern width. As a result, it becomes possible to etch the SiO 2 film and the conductive film for electrodes to a line width as designed by anisotropic etching or the like.
【0013】また、基本的には、エッチングガスは弗素
を含むハロゲン炭化水素ガスと、酸素の混合ガス、或い
は、この両者を少なくとも含む複数の混合ガスであって
も良い。Basically, the etching gas may be a mixed gas of a halogen-containing hydrocarbon gas containing fluorine and oxygen, or a plurality of mixed gases containing at least both of them.
【0014】[0014]
【実施例】図2〜5は本発明の一実施例の説明図であ
る。図において、11はSi基板、12はフィールドSiO2膜、
13はゲートSiO2膜、14はポリSi膜、15はWSi膜、16はSi
O2膜、17はアモルファスカーボン膜、18はレジスト膜、
19はエッチングガス(CF4 +O2 )、20はエッチング
ガス(Cl2 +O2)、21はアッシングガス(O2 )で
ある。2 to 5 are explanatory views of an embodiment of the present invention. In the figure, 11 is a Si substrate, 12 is a field SiO 2 film,
13 is a gate SiO 2 film, 14 is a poly-Si film, 15 is a WSi film, 16 is Si
O 2 film, 17 is an amorphous carbon film, 18 is a resist film,
19 is an etching gas (CF 4 + O 2 ), 20 is an etching gas (Cl 2 + O 2 ), and 21 is an ashing gas (O 2 ).
【0015】図2は、前述の図1に示す下地構造上での
レジスト膜パターンの線巾の露光時のデフォーカス(焦
点ずれ)に対する変化を、露光量をパラメータとして示
したものである。FIG. 2 shows changes in the line width of the resist film pattern on the underlying structure shown in FIG. 1 with respect to defocus (defocus) at the time of exposure, with the exposure amount as a parameter.
【0016】この図2より、この系におけるフォーカス
マージンが最もとれる条件は、マスク寸法となるレジス
トパターンの線巾の寸法が、0.42μmであることが
わかる。From FIG. 2, it is understood that the condition for obtaining the maximum focus margin in this system is that the line width dimension of the resist pattern, which is the mask dimension, is 0.42 μm.
【0017】次に、図3に示すような従来のCF4 のみ
のエッチングガスを用いた結果はレジストパターンの線
巾が0.4μmになるのにに比べて、本発明のCF4 に
O2を混合した系では、図4に示すように反射防止膜の
エッチングに際して、レジスト膜の線巾が0.35μm
近傍にフォーカスマージンが最もとれる状態が得られる
ことがわかり、設計された狙い通りの寸法となり、最も
精度良く設計寸法を再現できることがわかる。Next, as compared with in the line width results resist pattern using the conventional CF 4 only etching gas as shown in FIG. 3 is 0.4 .mu.m, the CF 4 of the present invention O 2 In the case of the mixed system, the line width of the resist film is 0.35 μm when the antireflection film is etched as shown in FIG.
It can be seen that the state where the focus margin is maximized can be obtained in the vicinity, and the dimensions are designed as intended, and the design dimensions can be reproduced most accurately.
【0018】上記結果を用いて、被エッチング膜(例え
ばSiO2膜や、Wシリサイド膜)や反射防止膜のエッチン
グを行った一実施例について、図5により説明する。図
5(a)に示すように、Si基板11上に形成されたゲート
SiO2膜12にポリSi膜14、WSi膜15、SiO2膜16等の被エッ
チング膜を積層し、更に反射防止膜としてアモルファス
・カーボン膜17を被覆した後、レジスト膜18を塗布し、
フォーカスマージンが最もとれる条件で露光・現像を行
うと0.42μmの線巾のゲート電極形成用のレジスト
膜18のパターンが形成される。An example in which the film to be etched (eg, SiO 2 film or W silicide film) and the antireflection film are etched using the above results will be described with reference to FIG. A gate formed on the Si substrate 11 as shown in FIG.
A film to be etched such as a poly-Si film 14, a WSi film 15 and a SiO 2 film 16 is laminated on the SiO 2 film 12, an amorphous carbon film 17 is further coated as an antireflection film, and then a resist film 18 is applied,
When exposure and development are performed under the condition that the focus margin is maximized, a pattern of the resist film 18 for forming a gate electrode having a line width of 0.42 μm is formed.
【0019】次に、図5(b)に示すように、Si基板11
をカソードカップリング式のRIE装置にセットし、装
置のチャンバ内の真空度0.3Torr 、出力500W、
周波数13.56MHz、エッチングガス19としてCF
4 90sccm、O2 10sccmのエッチング条件で、レジス
ト膜18をマスクとして、アモルファスカーボン膜17とSi
O2膜16を連続してドライエッチングする。この時、0.
42μm巾のレジスト膜18も表面がエッチング及びアッ
シングされて、0.35μm巾と設計値通りとなる。Next, as shown in FIG. 5B, the Si substrate 11
Is set in a cathode coupling type RIE device, the degree of vacuum in the chamber of the device is 0.3 Torr, the output is 500 W,
Frequency 13.56MHz, CF as etching gas 19
4 90 sccm, O 2 at 10sccm etching conditions, the resist film 18 as a mask, the amorphous carbon film 17 and the Si
The O 2 film 16 is continuously dry-etched. At this time, 0.
The surface of the resist film 18 having a width of 42 μm is also etched and ashed to have a width of 0.35 μm as designed.
【0020】続いて、Si基板11をRIE装置にセット
し、装置のチャンバ内の真空度0.1Torr 、出力20
0W、周波数13.56MHz、エッチングガス20とし
て、Cl2 90sccm、O2 10sccmのエッチング条件
で、SiO2膜16等をマスクとしてWSi膜15とポリSi膜14を
連続して異方性ドライエッチングする。Subsequently, the Si substrate 11 is set in the RIE apparatus, the vacuum degree in the chamber of the apparatus is 0.1 Torr, and the output is 20.
Anisotropic dry etching of the WSi film 15 and the poly-Si film 14 is continuously performed under the etching conditions of 0 W, a frequency of 13.56 MHz, and an etching gas of Cl 2 90 sccm and O 2 10 sccm, using the SiO 2 film 16 as a mask. .
【0021】その後、アッシング装置にて、レジスト膜
及びアモルファスカーボン膜17とレジスト膜18とをプラ
ズマ剥離により除去して、WSiゲート電極のMOS素子
を得る。After that, the resist film and the amorphous carbon film 17 and the resist film 18 are removed by plasma stripping with an ashing apparatus to obtain a MOS element having a WSi gate electrode.
【0022】本発明の一実施例ではCF4 とO2 を混合
したエッチングガスを用いたが、基本的には、反射防止
膜をエッチングする弗素を含むハロゲン炭化水素ガス、
例えばCHF3 やCClF3 等のガスと、レジスト膜表
面をアッシングするO2 の混合ガス、或いは、この両者
を少なくとも含む複数の混合ガスであっても良い。In one embodiment of the present invention, an etching gas in which CF 4 and O 2 are mixed is used, but basically, a halogen-containing hydrocarbon gas containing fluorine for etching the antireflection film,
For example a CHF 3 or CClF 3 gas such as a mixed gas of O 2 ashing of the resist film surface, or may be a plurality of mixed gas containing at least the two.
【0023】[0023]
【発明の効果】以上説明したように、本発明によれば、
フレオン系ガスと、レジスト膜表面をアッシングする酸
素の混合ガスを用いて、フォーカスマージンにより本来
のマスク用レジスト膜パターンからの寸法ずれを、フレ
オン系ガスと、レジスト膜表面をアッシングする酸素の
混合ガスを用いて、マスクパターンとしての寸法に一致
させることで、微細素子パターンのパターニング精度を
著しく改善することに大きく寄与する。As described above, according to the present invention,
Using a mixed gas of Freon-based gas and oxygen for ashing the resist film surface, the dimension deviation from the original mask resist film pattern due to the focus margin is used, and the mixed gas of Freon-based gas and oxygen for ashing the resist film surface By matching the dimension as a mask pattern by using, it greatly contributes to significantly improve the patterning accuracy of the fine element pattern.
【図1】 本発明の原理説明図FIG. 1 is an explanatory view of the principle of the present invention.
【図2】 本発明の一実施例の説明図(その1)FIG. 2 is an explanatory diagram of an embodiment of the present invention (No. 1)
【図3】 本発明の一実施例の説明図(その2)FIG. 3 is an explanatory diagram of an embodiment of the present invention (No. 2)
【図4】 本発明の一実施例の説明図(その3)FIG. 4 is an explanatory diagram of an embodiment of the present invention (No. 3)
【図5】 本発明の一実施例の説明図(その4)FIG. 5 is an explanatory diagram of an embodiment of the present invention (Part 4).
図において 1 基板 2 被エッチング膜 3 反射防止膜 4 レジスト膜 5 エッチングガス 11 Si基板 12 フィールドSiO2膜 13 ゲートSiO2膜 14 ポリSi膜 15 WSi膜 16 SiO2膜 17 アモルファスカーボン膜 18 レジスト膜 19 エッチングガス(CF4 +O2 ) 20 エッチングガス(Cl2 +O2 ) 21 アッシングガス(O2 )In the figure, 1 substrate 2 film to be etched 3 antireflection film 4 resist film 5 etching gas 11 Si substrate 12 field SiO 2 film 13 gate SiO 2 film 14 poly Si film 15 WSi film 16 SiO 2 film 17 amorphous carbon film 18 resist film 19 Etching gas (CF 4 + O 2 ) 20 Etching gas (Cl 2 + O 2 ) 21 Ashing gas (O 2 )
Claims (2)
止膜(3) を下層に有するレジスト膜(4) をマスクとし
て、基板(1) 上の被エッチング膜(2) をエッチングする
工程において、 露光現像された該レジスト膜(4) 並びに該反射防止膜
(3) を弗素を含むハロゲン系炭化水素と酸素を混合した
エッチングガス(5) でエッチングすることを特徴とする
パターン形成方法。1. A process of etching a film (2) to be etched on a substrate (1) using a resist film (4) having an antireflection film (3) mainly composed of carbon or hydrocarbon as an underlying layer as a mask, The resist film (4) exposed and developed and the antireflection film
A method for forming a pattern, characterized in that (3) is etched with an etching gas (5) in which a halogen-containing hydrocarbon containing fluorine and oxygen are mixed.
素(CF4 )と酸素(O2 )を用いることを特徴とする
請求項1記載のパターン形成方法。2. The pattern forming method according to claim 1, wherein carbon tetrafluoride (CF 4 ) and oxygen (O 2 ) are used as the etching gas (5).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP09836794A JP3438313B2 (en) | 1994-05-12 | 1994-05-12 | Pattern formation method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP09836794A JP3438313B2 (en) | 1994-05-12 | 1994-05-12 | Pattern formation method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07307328A true JPH07307328A (en) | 1995-11-21 |
JP3438313B2 JP3438313B2 (en) | 2003-08-18 |
Family
ID=14217916
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP09836794A Expired - Lifetime JP3438313B2 (en) | 1994-05-12 | 1994-05-12 | Pattern formation method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3438313B2 (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990019538A (en) * | 1997-08-29 | 1999-03-15 | 윤종용 | Anti-reflective film formation method using hydrocarbon gas |
US6046114A (en) * | 1997-02-26 | 2000-04-04 | Sharp Kabushiki Kaisha | Method for producing a semiconductor device |
US6346183B1 (en) | 2000-08-03 | 2002-02-12 | International Business Machines Corporation | Use of thin carbon films as a bottom anti-reflective coating in manufacturing magnetic heads |
KR100557980B1 (en) * | 1999-10-20 | 2006-03-07 | 주식회사 하이닉스반도체 | Photoresist lessen method |
JP2007234870A (en) * | 2006-03-01 | 2007-09-13 | Hitachi High-Technologies Corp | Dry etching method |
KR20110027597A (en) | 2009-09-08 | 2011-03-16 | 도쿄엘렉트론가부시키가이샤 | Method for processing a target object and computer readable storage medium |
JP2018160689A (en) * | 2016-03-28 | 2018-10-11 | 株式会社日立ハイテクノロジーズ | Plasma processing method |
-
1994
- 1994-05-12 JP JP09836794A patent/JP3438313B2/en not_active Expired - Lifetime
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6046114A (en) * | 1997-02-26 | 2000-04-04 | Sharp Kabushiki Kaisha | Method for producing a semiconductor device |
KR19990019538A (en) * | 1997-08-29 | 1999-03-15 | 윤종용 | Anti-reflective film formation method using hydrocarbon gas |
KR100557980B1 (en) * | 1999-10-20 | 2006-03-07 | 주식회사 하이닉스반도체 | Photoresist lessen method |
US6346183B1 (en) | 2000-08-03 | 2002-02-12 | International Business Machines Corporation | Use of thin carbon films as a bottom anti-reflective coating in manufacturing magnetic heads |
JP2007234870A (en) * | 2006-03-01 | 2007-09-13 | Hitachi High-Technologies Corp | Dry etching method |
US8143175B2 (en) | 2006-03-01 | 2012-03-27 | Hitachi High-Technologies Corporation | Dry etching method |
KR20110027597A (en) | 2009-09-08 | 2011-03-16 | 도쿄엘렉트론가부시키가이샤 | Method for processing a target object and computer readable storage medium |
CN102013397A (en) * | 2009-09-08 | 2011-04-13 | 东京毅力科创株式会社 | Method for processing a target object |
US8759227B2 (en) | 2009-09-08 | 2014-06-24 | Tokyo Electron Limited | Method for processing a target object |
JP2018160689A (en) * | 2016-03-28 | 2018-10-11 | 株式会社日立ハイテクノロジーズ | Plasma processing method |
Also Published As
Publication number | Publication date |
---|---|
JP3438313B2 (en) | 2003-08-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6514672B2 (en) | Dry development process for a bi-layer resist system | |
JP3406302B2 (en) | Method of forming fine pattern, method of manufacturing semiconductor device, and semiconductor device | |
US6630410B2 (en) | Self-aligned PECVD etch mask | |
JPS63104338A (en) | Method of forming aperture with inclination in composite insulating layer | |
JPS6252455B2 (en) | ||
TW200405417A (en) | Method for fabricating semiconductor device | |
JPH11204504A (en) | Method for etching silicon layer | |
US6953746B2 (en) | Method of manufacturing a semiconductor apparatus with a tapered aperture pattern to form a predetermined line width | |
JP3248072B2 (en) | Oxide film etching method | |
JP3361918B2 (en) | Method for forming fine holes in semiconductor integrated circuit device | |
US5342481A (en) | Dry etching method | |
JP3438313B2 (en) | Pattern formation method | |
US5968711A (en) | Method of dry etching A1Cu using SiN hard mask | |
US6900139B1 (en) | Method for photoresist trim endpoint detection | |
JP2004505464A (en) | Method for removing organic residues from semiconductor structures | |
JP3063710B2 (en) | Method for manufacturing semiconductor device | |
JPH0343777B2 (en) | ||
JPH0621020A (en) | Manufacture of semiconductor device | |
KR0139072B1 (en) | Method of fabricating semiconductor device having step of forming play in contact hole | |
JP2000077386A (en) | Pattern formation method | |
TW502335B (en) | Method for controlling the line width of polysilicon gate by an etching process of a hard mask layer | |
JPH03108330A (en) | Manufacture of semiconductor | |
JPH07135198A (en) | Etching | |
JPH06120174A (en) | Manufacture of semiconductor device | |
JPH10214773A (en) | Fabrication of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20030513 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090613 Year of fee payment: 6 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090613 Year of fee payment: 6 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100613 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110613 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110613 Year of fee payment: 8 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110613 Year of fee payment: 8 |
|
R371 | Transfer withdrawn |
Free format text: JAPANESE INTERMEDIATE CODE: R371 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110613 Year of fee payment: 8 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110613 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120613 Year of fee payment: 9 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120613 Year of fee payment: 9 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130613 Year of fee payment: 10 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140613 Year of fee payment: 11 |
|
EXPY | Cancellation because of completion of term |