JPH0727998B2 - Semiconductor device cooling method - Google Patents

Semiconductor device cooling method

Info

Publication number
JPH0727998B2
JPH0727998B2 JP61248839A JP24883986A JPH0727998B2 JP H0727998 B2 JPH0727998 B2 JP H0727998B2 JP 61248839 A JP61248839 A JP 61248839A JP 24883986 A JP24883986 A JP 24883986A JP H0727998 B2 JPH0727998 B2 JP H0727998B2
Authority
JP
Japan
Prior art keywords
semiconductor device
inert liquid
chip
cooling
liquid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61248839A
Other languages
Japanese (ja)
Other versions
JPS63102343A (en
Inventor
正孝 二階堂
浩 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61248839A priority Critical patent/JPH0727998B2/en
Publication of JPS63102343A publication Critical patent/JPS63102343A/en
Publication of JPH0727998B2 publication Critical patent/JPH0727998B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 〔概要〕 本発明は半導体装置の冷却方法において、チップを不活
性液により直接液冷するようにしたものである。
DETAILED DESCRIPTION [Outline] The present invention is a method for cooling a semiconductor device, in which a chip is directly liquid-cooled with an inert liquid.

〔産業上の利用分野〕 本発明は半導体装置の冷却方法に係り、特に不活性液を
利用した冷却方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device cooling method, and more particularly to a cooling method using an inert liquid.

〔従来の技術〕[Conventional technology]

プリント基板に実装された半導体装置は、計算機等の電
子機器に組み込まれた状態で、空冷又は液冷される。液
冷には間接冷却方式及び直接冷却方式がある。直接冷却
方式は、キャビティが封止された半導体装置を不活性液
に浸漬する方式であり、冷却効果は従来の方式のうちで
は最もよい。
The semiconductor device mounted on the printed circuit board is air-cooled or liquid-cooled in a state of being incorporated in an electronic device such as a computer. Liquid cooling includes an indirect cooling method and a direct cooling method. The direct cooling method is a method of immersing the semiconductor device in which the cavity is sealed in an inert liquid, and has the best cooling effect among the conventional methods.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

特に大型の電子計算機等においては、多くの半導体装置
が高密度に実装されており発熱量が大であるため、直接
冷却方式よりも更に冷却効果の高い冷却方式の実現が望
まれていた。
In particular, in a large-scale electronic computer or the like, many semiconductor devices are mounted at high density and generate a large amount of heat, so that it has been desired to realize a cooling system having a higher cooling effect than the direct cooling system.

〔問題点を解決するための手段〕 本発明の半導体装置の冷却方法は、パッケージ内のチッ
プに気密タンク内で循環する不活性液を直接触れさせ
て、該チップを液冷してなる。
[Means for Solving the Problems] In the method for cooling a semiconductor device of the present invention, a chip in a package is directly contacted with an inert liquid circulating in an airtight tank to cool the chip.

〔作用〕[Action]

不活性液がチップに直接触れてチップを液冷すること
は、チップの冷却効果を高める。不活性液が循環してい
ることは冷却効果を更に高める。気密タンクは不活性液
が外部から汚染されることを防止し、不活性液が汚染さ
れてチップに悪影響が及ぶことを防止する。
Liquid cooling the chip by directly touching the chip with the inert liquid enhances the cooling effect of the chip. The circulation of the inert liquid further enhances the cooling effect. The airtight tank prevents the inert liquid from being contaminated from the outside, and prevents the inert liquid from being contaminated and adversely affecting the chip.

〔実施例〕〔Example〕

第1図は本発明の半導体装置の冷却方法の一実施例を示
す。図中、1は気密封止されたタンクであり、不活性液
2で満されている。不活性液2は、ポンプ3により矢印
4で示すようにタンク1内を循環する。不活性液2の熱
は熱交換器5を通して外部へ放熱される。
FIG. 1 shows an embodiment of a method for cooling a semiconductor device according to the present invention. In the figure, reference numeral 1 denotes a hermetically sealed tank, which is filled with an inert liquid 2. The inert liquid 2 is circulated in the tank 1 by the pump 3 as shown by an arrow 4. The heat of the inert liquid 2 is radiated to the outside through the heat exchanger 5.

タンク1内には、第2図に示す構造の半導体装置6がプ
リント基板7上に実装されて組み込まれている。
In the tank 1, a semiconductor device 6 having the structure shown in FIG. 2 is mounted and incorporated on a printed circuit board 7.

第2図に示すように、半導体チップ8は、パッケージ9
のキャビティ10内に実装されている。11はチップ8とパ
ッケージ9との間を接続するワイヤ、12はキャビティ10
を覆う蓋である。
As shown in FIG. 2, the semiconductor chip 8 has a package 9
Mounted in the cavity 10. 11 is a wire for connecting the chip 8 and the package 9, 12 is a cavity 10
Is a lid that covers.

パッケージ9には、一対の孔13,14が形成してあり、キ
ャビティ10が孔13,14を通してパッケージ9の下面と連
通している。
The package 9 is formed with a pair of holes 13 and 14, and the cavity 10 communicates with the lower surface of the package 9 through the holes 13 and 14.

プリント基板7には、半導体装置の取付個所に開口窓15
が形成してある。
The printed circuit board 7 has an opening window 15 at the mounting position of the semiconductor device.
Is formed.

半導体装置6は、第2図に示すように、孔13,14を開口
窓15に対向させてプリント基板7に実装してある。即
ち、半導体装置6は、キャビティ10が外部と連通した状
態でプリント基板7に実装してある。
As shown in FIG. 2, the semiconductor device 6 is mounted on the printed circuit board 7 with the holes 13 and 14 facing the opening window 15. That is, the semiconductor device 6 is mounted on the printed circuit board 7 with the cavity 10 communicating with the outside.

上記の半導体装置6は循環する不活性液2内に浸漬され
る。不活性液2は孔13,14を通してキャビティ10内に進
入し、キャビティ10内は不活性液2で満たされ、半導体
チップ8は不活性液2により直接液冷され、効果的に冷
却される。不活性液2は循環しているため、矢印16,17
で示すように孔13,14を通してキャビティ10に出入り
し、半導体チップ8は更に効果的に冷却される。
The semiconductor device 6 is immersed in the circulating inert liquid 2. The inert liquid 2 enters the cavity 10 through the holes 13 and 14, the cavity 10 is filled with the inert liquid 2, and the semiconductor chip 8 is directly liquid-cooled by the inert liquid 2 and effectively cooled. Since the inert liquid 2 circulates, arrows 16 and 17
The semiconductor chip 8 is further effectively cooled by entering and leaving the cavity 10 through the holes 13 and 14 as shown in FIG.

第3図乃至第5図は夫々第1図の半導体装置の変形例を
示す。各図中、第2図に示す構成部分と同一部分には同
一符号を付す。
3 to 5 show modifications of the semiconductor device shown in FIG. 1, respectively. In each figure, the same parts as those shown in FIG. 2 are designated by the same reference numerals.

第3図の半導体装置20のパッケージ21にはパッケージ21
の側面に開口する孔22,23が形成してあり、キャビティ1
0は孔22,23を通して外部と連通している。半導体装置20
はプリント基板24上に実装してある。
The package 21 of the semiconductor device 20 of FIG.
The holes 22 and 23 that open to the side of the
0 communicates with the outside through holes 22 and 23. Semiconductor device 20
Are mounted on the printed circuit board 24.

第4図の半導体装置30は、パッケージ31には孔をあけず
に、蓋32に孔33,34をあけた構造である。キャビティ10
は孔33,34を通して外部と連通している。半導体装置30
はプリント基板35上に実装してある。
The semiconductor device 30 of FIG. 4 has a structure in which holes are not formed in the package 31 and holes 33 and 34 are formed in the lid 32. Cavity 10
Communicates with the outside through holes 33 and 34. Semiconductor device 30
Are mounted on the printed circuit board 35.

第5図の半導体装置40は、プリント基板を上記の孔あき
の蓋代わりに用いた構造である。プリント基板41には一
対の孔42,43が形成してある。パッケージ44は、上記の
構成とは上下逆向きで、プリント基板41上に実装してあ
り、キャビティ10は孔42,43を通して外部と連通してい
る。
A semiconductor device 40 of FIG. 5 has a structure in which a printed circuit board is used instead of the above-mentioned perforated lid. The printed board 41 has a pair of holes 42 and 43 formed therein. The package 44 is mounted on the printed circuit board 41 in an upside down orientation with respect to the above configuration, and the cavity 10 communicates with the outside through the holes 42 and 43.

第3図乃至第5図の半導体装置20,30,40は、第1図に示
すように循環する不活性液2に浸漬される。これによ
り、半導体チップ8は前記の場合と同様に、不活性液2
により直接液冷されて、効果的に冷却される。
The semiconductor devices 20, 30, 40 shown in FIGS. 3 to 5 are immersed in the circulating inert liquid 2 as shown in FIG. As a result, the semiconductor chip 8 is inactivated by the inert liquid 2 as in the case described above.
The liquid is directly liquid-cooled by and is effectively cooled.

第6図は本発明の半導体装置の冷却方法の別の実施例を
示す。同図中、第1図に示す構成部分と対応する部分に
は同一符号を付し、その説明は省略する。
FIG. 6 shows another embodiment of the method for cooling a semiconductor device according to the present invention. In the figure, those parts corresponding to the parts shown in FIG. 1 are designated by the same reference numerals, and a description thereof will be omitted.

気密タンク1内の循環する不活性液2内には、第7図に
拡大して示すプリント基板50が浸漬されている。プリン
ト基板50は、この表面の凹部51内に半導体チップ8が実
装された構造である。
A printed circuit board 50 shown in an enlarged scale in FIG. 7 is immersed in the circulating inert liquid 2 in the airtight tank 1. The printed circuit board 50 has a structure in which the semiconductor chip 8 is mounted in the recess 51 on the surface.

半導体チップ8は、循環する不活性液2により直接液冷
されて、効果的に冷却される。
The semiconductor chip 8 is directly liquid-cooled by the circulating inert liquid 2 and effectively cooled.

気密タンク1は不活性液2が外部から汚染されることを
防止する。
The airtight tank 1 prevents the inert liquid 2 from being contaminated from the outside.

上記の冷却方法によれば、不活性液2が半導体チップ8,
ワイヤ11及びワイヤボンディング部に直接接触すること
になるが、不活性液2は汚染を確実に防止されているた
め、半導体チップ8,ワイヤ,及びワイヤボンディング部
が酸化されることは無く、支障は起こらない。
According to the above-described cooling method, the inert liquid 2 is used as the semiconductor chip 8,
Although it comes into direct contact with the wire 11 and the wire bonding portion, since the inert liquid 2 is reliably prevented from being contaminated, the semiconductor chip 8, the wire, and the wire bonding portion are not oxidized, and there is no problem. It won't happen.

本発明は、上記のリードレスタイプの半導体装置に限ら
ず、DIP型,PGA型の半導体装置、更にはジェセフソン素
子及びHEMT素子の冷却にも適用できる。
The present invention is not limited to the leadless type semiconductor device described above, but can be applied to the cooling of DIP type and PGA type semiconductor devices, as well as Josephson elements and HEMT elements.

〔効果〕〔effect〕

本発明によれば、不活性液がパッケージのキャビティ内
に出入りして、チップ自体を直接液冷する方法であるた
め、従来の冷却方法に比べて、チップを効果的に冷却す
ることが出来、しかも、不活性液は汚染されずに当初の
液質を維持するため、チップの特性等が不活性液により
悪影響を受ける危険もなく、問題無く実施出来る。
According to the present invention, since the inert liquid enters and leaves the cavity of the package and the chip itself is directly liquid-cooled, the chip can be cooled more effectively than the conventional cooling method. Moreover, since the inert liquid is not contaminated and the initial liquid quality is maintained, there is no risk that the characteristics of the chip are adversely affected by the inert liquid, and the operation can be performed without any problem.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の半導体装置の冷却方法の一実施例を示
す図、 第2図は第1図中の半導体装置の拡大断面図、 第3図乃至第5図は夫々第1図の冷却方法に適用しうる
半導体装置の各変形例を示す図、 第6図は本発明の半導体装置の冷却方法の別の実施例を
示す図、 第7図は第6図中の半導体チップの部分を拡大して示す
図である。 図において、 1は気密タンク、2は不活性液、3はポンプ、5は熱交
換器、6,20,30,40は半導体装置、7,24,41,50はプリント
基板、8は半導体チップ、9,21,31,44はパッケージ、10
はキャビティ、12,32は蓋、13,14,22,23,33,34,42,43は
孔、15は開口窓である。
FIG. 1 is a diagram showing an embodiment of a method for cooling a semiconductor device according to the present invention, FIG. 2 is an enlarged sectional view of the semiconductor device in FIG. 1, and FIGS. 3 to 5 are cooling diagrams of FIG. 1, respectively. The figure which shows each modification of the semiconductor device which can be applied to the method, FIG. 6 is a figure which shows another Example of the cooling method of the semiconductor device of this invention, FIG. 7 shows the semiconductor chip part in FIG. It is a figure which expands and shows. In the figure, 1 is an airtight tank, 2 is an inert liquid, 3 is a pump, 5 is a heat exchanger, 6,20,30,40 are semiconductor devices, 7,24,41,50 are printed circuit boards, and 8 is a semiconductor chip. , 9,21,31,44 are packages, 10
Is a cavity, 12,32 is a lid, 13,14,22,23,33,34,42,43 are holes, and 15 is an opening window.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半導体装置を、パッケージと、該パッケー
ジのキャビティ内に実装してあるチップとを有し、上記
キャビティが外部と連通した構成とすると共に、 上記半導体装置が実装されたプリント基板を、不活性液
が循環しているタンク内の該不活性液に浸漬してなり、 上記キャビティ内に出入りする上記不活性液が上記チッ
プに直接触れて、該チップを液冷する構成としたことを
特徴とする 半導体装置の冷却方法。
1. A semiconductor device having a package and a chip mounted in a cavity of the package, the cavity communicating with the outside, and a printed circuit board having the semiconductor device mounted thereon. A configuration in which the chip is liquid-cooled by being immersed in the inert liquid in a tank in which the inert liquid is circulated, and the inert liquid flowing in and out of the cavity directly touches the chip. A method for cooling a semiconductor device, comprising:
JP61248839A 1986-10-20 1986-10-20 Semiconductor device cooling method Expired - Lifetime JPH0727998B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61248839A JPH0727998B2 (en) 1986-10-20 1986-10-20 Semiconductor device cooling method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61248839A JPH0727998B2 (en) 1986-10-20 1986-10-20 Semiconductor device cooling method

Publications (2)

Publication Number Publication Date
JPS63102343A JPS63102343A (en) 1988-05-07
JPH0727998B2 true JPH0727998B2 (en) 1995-03-29

Family

ID=17184182

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61248839A Expired - Lifetime JPH0727998B2 (en) 1986-10-20 1986-10-20 Semiconductor device cooling method

Country Status (1)

Country Link
JP (1) JPH0727998B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2698777C1 (en) 2015-12-02 2019-08-29 Даунандер Геосолюшенз Птй Лтд System and method for cooling fluid medium for electronic equipment

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5358661A (en) * 1976-11-08 1978-05-26 Tokyo Shibaura Electric Co Device for cooling electronic parts
JPH0650797B2 (en) * 1985-03-29 1994-06-29 工業技術院長 Method for removing heat from electric equipment by liquid using electric field

Also Published As

Publication number Publication date
JPS63102343A (en) 1988-05-07

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