JPH07273750A - Interface circuit for code conversion - Google Patents
Interface circuit for code conversionInfo
- Publication number
- JPH07273750A JPH07273750A JP5952094A JP5952094A JPH07273750A JP H07273750 A JPH07273750 A JP H07273750A JP 5952094 A JP5952094 A JP 5952094A JP 5952094 A JP5952094 A JP 5952094A JP H07273750 A JPH07273750 A JP H07273750A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- signal
- code
- circuit
- transmission line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Dc Digital Transmission (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は符号変換用インタフェ−
ス回路に関し、特にディジタル多重端局装置の伝送路側
インタフェ−スにおいて、装置側のディジタル信号の符
号を伝送路側符号に変換、あるいは復号するするための
インタフェ−ス回路に関する。BACKGROUND OF THE INVENTION The present invention relates to a code conversion interface.
More particularly, the present invention relates to an interface circuit for converting a code of a digital signal on the device side into a code on the transmission line side or for decoding in a transmission line side interface of a digital multiplex terminal device.
【0002】[0002]
【従来の技術】従来、この種の符号変換用インタフェ−
ス回路は、送信部と受信部とに別れ、送信部は送信装置
側に設けられて送信ディジタル信号を指定された伝送路
符号に変換する。一方、受信部は受信装置側に設けられ
て伝送路からの受信ディジタル信号を装置内符号に復号
する。通常、装置内符号はユニポ−ラ、伝送路符号は直
流成分の除去のため、あるいはタイミングパルス再生の
ためにバイポーラあるいはCMI(Coded mar
k inversion)などの符号が用いられる。2. Description of the Related Art Conventionally, this kind of code conversion interface has been used.
The transmission circuit is divided into a transmission unit and a reception unit. The transmission unit is provided on the transmission device side and converts a transmission digital signal into a designated transmission path code. On the other hand, the receiving unit is provided on the receiving device side and decodes the received digital signal from the transmission line into an in-device code. Normally, the intra-device code is a unipolar, and the transmission line code is a bipolar or CMI (coded mar) for removing a DC component or for reproducing a timing pulse.
k inversion) or the like is used.
【0003】また、送信部と受信部の実装構造は、それ
ぞれ小型基板に総ての構成部品を搭載した小型モジュー
ル構造となっている。これを一つの単位部品として扱
い、装置側の所定パッケージに実装して使用する。Further, the mounting structure of the transmitting unit and the receiving unit is a small module structure in which all the components are mounted on a small board. This is treated as one unit component and mounted in a predetermined package on the device side for use.
【0004】図2に一例としてPCM端局装置に使用さ
れるこの種インタフェ−ス回路のブロック図を示す。FIG. 2 shows a block diagram of an interface circuit of this type used in a PCM terminal device as an example.
【0005】送信部4おいて、PCM端局多重部からの
ディジタル信号(一次群信号)は、先ずユニポーラ/C
MI変換器41で装置側のNRZ(Non retur
nto zoro)ユニポーラ符号から伝送路側のCM
I符号に変換され、次にドライバー回路42でパワーア
ップされ、中継トランス43で回路的に絶縁されて伝送
路6へ送出される。In the transmitter 4, the digital signal (primary group signal) from the PCM terminal station multiplexer is first unipolar / C.
With the MI converter 41, NRZ (Non return) on the device side
from the unipolar code to the CM on the transmission line side
The signal is converted into the I code, then powered up by the driver circuit 42, circuitally insulated by the relay transformer 43, and sent to the transmission line 6.
【0006】受信部5において、伝送路6からのディジ
タル信号(一次群信号)は、先ず中継トランス51を通
り、イコライザ回路52に入力されて波形整形される。
次に増幅器53で増幅されから、CMI/ユニポーラ変
換器54で伝送路側のCMI符号から装置側のNRZの
ユニポーラ符号に復号され、PCM端局分離部へ送出さ
れる。CMI/ユニポーラ変換器54で受信ディジタル
信号を復号する際に必要となるタイミング信号はPLL
回路55から供給される。PLL回路55は受信ディジ
タル信号を同期信号としたVCOにより前記タイミング
信号を生成して出力してする。In the receiving section 5, the digital signal (primary group signal) from the transmission line 6 first passes through the relay transformer 51 and is input to the equalizer circuit 52 to be waveform-shaped.
Next, after being amplified by the amplifier 53, the CMI / unipolar converter 54 decodes the CMI code on the transmission path side into the NRZ unipolar code on the device side, and sends it to the PCM terminal station separating section. The timing signal required when the received digital signal is decoded by the CMI / unipolar converter 54 is the PLL.
It is supplied from the circuit 55. The PLL circuit 55 generates and outputs the timing signal by the VCO using the received digital signal as a synchronizing signal.
【0007】尚、送信部4においてはディジタル信号の
周波数による種別はないが、受信部5においてはディジ
タル信号の周波数が異なると、これに対応してPLL回
路55のVCOの固有発振周波数が異なるので、この周
波数による切替が必要となる。PCM端局装置の一次群
の場合では、このディジタル信号の周波数は1.5MH
z帯と2.0MHz帯との2種類があるので、受信部5
も2種類となり何れか必要な方を選択して使用すること
になる。Although there is no classification according to the frequency of the digital signal in the transmitter 4, if the frequency of the digital signal in the receiver 5 is different, the natural oscillation frequency of the VCO of the PLL circuit 55 is correspondingly different. , Switching by this frequency is required. In the case of the primary group of PCM terminal equipment, the frequency of this digital signal is 1.5 MHz.
Since there are two types, z band and 2.0 MHz band, the receiving unit 5
There are also two types, and either one is selected and used.
【0008】[0008]
【発明が解決しようとする課題】このように従来の符号
変換用インタフェ−ス回路は、伝送路ディジタル信号の
周波数毎に複数の受信部を用意する必要があり、例えば
PCM一次群の場合では、伝送路の周波数が1.5MH
z帯用のものと2.0MHz帯用のものとの2種類が必
要である。この何れを使用するかは装置の設置時などに
決める場合が多く、通常は設置工事手順の関係から、そ
の時点で送信側から受信側に対し何れを使用するかを人
が指示する。受信側はこの指示により対応する受信部を
選び対応している。As described above, in the conventional code conversion interface circuit, it is necessary to prepare a plurality of receiving units for each frequency of the transmission path digital signal. For example, in the case of the PCM primary group, Transmission line frequency is 1.5 MH
Two types are required, one for the z band and one for the 2.0 MHz band. In many cases, which of these is to be used is decided at the time of installation of the device, etc. Normally, due to the installation work procedure, a person instructs the receiving side from the transmitting side at that time. The receiving side selects and responds to the corresponding receiving unit according to this instruction.
【0009】このように複数種類の受信部を用意するこ
とは、その製造段階での製造コストおよび管理工数など
を増加させ、また設置時などにおいて送信側から人によ
る指示のために誤作業が発生しやすいという問題があ
る。Providing a plurality of types of receivers in this way increases the manufacturing cost and management man-hours at the manufacturing stage, and also causes erroneous work due to human instructions from the transmitter during installation. There is a problem that it is easy to do.
【0010】[0010]
【課題を解決するための手段】本発明の符号変換用イン
タフェ−ス回路は、装置側からのディジタル信号を伝送
路側の符号に変換し伝送路へ送出する送信部と前記伝送
路からのディジタル信号を装置側の符号に復号し装置側
に送出する受信部とからなる符号変換用インタフェ−ス
回路において、前記送信部と前記受信部のそれぞれの前
記伝送路側に中性点タップ付の中継線輪を設け前記伝送
路にアースリターンの重信回線を構成する手段と、前記
送信部に前記ディジタル信号の周波数を表わす周波数信
号を生成し前記重信回線に送出する手段と、前記受信部
に前記周波数信号を受信しこれにより内部の動作周波数
を切替える手段とを備えている。A code conversion interface circuit according to the present invention comprises a transmitter for converting a digital signal from the device side into a code on the transmission line side and sending the code to the transmission line, and a digital signal from the transmission line. In a code conversion interface circuit consisting of a receiving section for decoding to the apparatus side and sending it to the apparatus side, a relay line with a neutral point tap on the transmission path side of each of the transmitting section and the receiving section. Means for forming an earth return phantom line in the transmission line, means for generating a frequency signal representing the frequency of the digital signal in the transmitting section and transmitting the frequency signal to the phantom line, and the frequency signal for the receiving section. And means for switching the internal operating frequency according to the reception.
【0011】尚、前記周波数信号は前記デジィタル信号
の周波数を識別しこの識別結果から自動的に生成するよ
うにしても良い。The frequency signal may be generated by identifying the frequency of the digital signal and automatically generating from the identification result.
【0012】[0012]
【実施例】次に本発明の一実施例について図面を参照し
て説明する。図1は本実施例のブロック図である。An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of this embodiment.
【0013】送信部1おいて、PCM端局多重部からの
ディジタル信号(一次群信号)は、先ずユニポーラ/C
MI変換器11で装置側のNRZユニポーラ符号から伝
送路側のCMI符号に変換され、次にドライバー回路1
2でパワーアップされ、中継トランス13で回路的に絶
縁されて伝送路3へ送出される。In the transmitter 1, the digital signal (primary group signal) from the PCM terminal station multiplexer is first of all unipolar / C.
The MI converter 11 converts the NRZ unipolar code on the device side into the CMI code on the transmission path side, and then the driver circuit 1
It is powered up by 2, is insulated in the circuit by the relay transformer 13, and is sent to the transmission line 3.
【0014】受信部2において、伝送路3からのディジ
タル信号(一次群信号)は、先ず中継トランス21を通
り、イコライザ回路22に入力されて波形整形される。
次に増幅器53で増幅してから次のCMI/ユニポーラ
変換器24でCMI符号から装置側のNRZユニポーラ
符号に復号され、PCM端局分離部へ送出される。CM
I/ユニポーラ変換器24で受信ディジタル信号を復号
する際に必要となるタイミング信号はPLL回路25か
ら供給される。PLL回路25は受信ディジタル信号を
同期信号とするVCOにより前記タイミング信号を生成
して出力する。In the receiving section 2, the digital signal (primary group signal) from the transmission line 3 first passes through the relay transformer 21 and is input to the equalizer circuit 22 to be waveform-shaped.
Then, after being amplified by the amplifier 53, the CMI code is decoded by the next CMI / unipolar converter 24 into the NRZ unipolar code on the device side, and is sent to the PCM terminal station separating unit. CM
A timing signal required for decoding the received digital signal by the I / unipolar converter 24 is supplied from the PLL circuit 25. The PLL circuit 25 generates and outputs the timing signal by the VCO using the received digital signal as a synchronizing signal.
【0015】送信部1の中継トランス13と受信部2の
中継トランス21は、伝送路側の巻線の中央にそれぞれ
中性点タップが付いている。この中性点タップを使用し
て伝送路3にアースリターン形の重信回線を重畳してい
る。The relay transformer 13 of the transmitter 1 and the relay transformer 21 of the receiver 2 each have a neutral point tap at the center of the winding on the transmission line side. By using this neutral point tap, the earth return type telecommunications line is superimposed on the transmission line 3.
【0016】送信部1の周波数識別回路14は、装置側
のクロック信号を入力し、内部のタイマとカウンタとに
よりこの周波数を計測し、送信信号の周波数が1.5M
帯か2.0M帯かを識別する。この識別結果は周波数信
号として周波数信号重畳回路15に入力され、周波数が
1.5M帯は論理レベル1,2.0M帯は論理レベル0
の直流信号として中継トランス13の重信回線に送出さ
れる。The frequency discriminating circuit 14 of the transmitting section 1 inputs the clock signal of the device side, measures this frequency by an internal timer and counter, and the frequency of the transmitting signal is 1.5M.
Identify the band or 2.0M band. The identification result is input to the frequency signal superimposing circuit 15 as a frequency signal, and the logical level is 1 in the frequency band of 1.5 M and the logical level 0 in the frequency band of 2.0 M.
Is sent to the duplex line of the relay transformer 13.
【0017】受信部2の周波数信号受信回路25は、重
信回線のからの周波数信号を受信してPLL回路26に
入力する。PLL回路26はこれによりVCOの固有発
振周波数を対応する周波数に切替えている。The frequency signal receiving circuit 25 of the receiving section 2 receives the frequency signal from the duplex line and inputs it to the PLL circuit 26. This causes the PLL circuit 26 to switch the natural oscillation frequency of the VCO to the corresponding frequency.
【0018】送信部1において、周波数識別回路14が
クロック信号から周波数を識別し自動的に周波数信号を
生成しているが、あらかじめ周波数がわかっていれば、
人手によるスイッチ操作などで直接周波数信号を周波数
信号重畳回路15へ入力して、周波数識別回路14を省
く方法でも良い。In the transmitter 1, the frequency identification circuit 14 identifies the frequency from the clock signal and automatically generates the frequency signal. If the frequency is known in advance,
Alternatively, the frequency identification circuit 14 may be omitted by directly inputting the frequency signal to the frequency signal superimposing circuit 15 by manually operating the switch.
【0019】尚、伝送路側の信号符号は、CMIとした
がバイポーラあるいはその他の符号でも適用することが
できる。The signal code on the transmission path side is CMI, but bipolar or other codes can also be applied.
【0020】[0020]
【発明の効果】以上説明したように本発明の符号変換用
インタフェ−ス回路は、受信部において、送信部から重
信回線を利用して伝送されてくる周波数信号により受信
周波数を自動的に切替えているので、受信部は受信周波
数別に複数用意する必要がなく一種類ですむことにな
る。As described above, in the code conversion interface circuit of the present invention, in the receiving section, the receiving frequency is automatically switched by the frequency signal transmitted from the transmitting section using the duplex line. Therefore, there is no need to prepare multiple reception units for each reception frequency, and only one type is required.
【0021】従って、標準化効果によって、受信部の製
造コストおよび管理工数などを減少させると共に、設置
時などにおいて、送信側から受信側へ人が受信部の周波
数を指示する必要もないので誤作業も発生しないという
効果がある。Therefore, due to the standardization effect, the manufacturing cost and management man-hours of the receiving unit are reduced, and at the time of installation, it is not necessary for the transmitting side to the receiving side to instruct the receiving side from the receiving side by the person, so that erroneous work can be performed. It has the effect of not occurring.
【図1】本実施例のブロック図である。FIG. 1 is a block diagram of this embodiment.
【図2】従来例のブロック図である。FIG. 2 is a block diagram of a conventional example.
1 送信部 11 ユニポーラ/CMI変換回路 12 ドライバー回路 13 中継トランス 14 周波数識別回路 15 周波数信号重畳回路 2 受信部 21 中継トランス 22 イコライザ回路 23 増幅器 24 CMI/ユニポーラ変換回路 25 周波数信号受信回路 26 PLL回路 3 伝送路 1 Transmitter 11 Unipolar / CMI Converter 12 Driver Circuit 13 Relay Transformer 14 Frequency Identification Circuit 15 Frequency Signal Superimposing Circuit 2 Receiver 21 Relay Transformer 22 Equalizer Circuit 23 Amplifier 24 CMI / Unipolar Converter 25 Frequency Signal Receiver Circuit 26 PLL Circuit 3 Transmission line
Claims (2)
の符号に変換し伝送路へ送出する送信部と前記伝送路か
らのディジタル信号を装置側の符号に復号し装置側に送
出する受信部とからなる符号変換用インタフェ−ス回路
において、前記送信部と前記受信部のそれぞれの前記伝
送路側に中性点タップ付の中継線輪を設け前記伝送路に
アースリターンの重信回線を構成する手段と、前記送信
部に前記ディジタル信号の周波数を表わす周波数信号を
生成し前記重信回線に送出する手段と、前記受信部に前
記周波数信号を受信しこれにより内部の動作周波数を切
替える手段とを備えることを特徴とする符号変換用イン
タフェ−ス回路。1. A transmission unit for converting a digital signal from the device side into a code on the transmission line side and sending out to the transmission line, and a receiving unit for decoding the digital signal from the transmission line into a code on the device side and sending out to the device side. In the interface circuit for code conversion consisting of, means for forming a relay line with a neutral point tap on the transmission line side of each of the transmission unit and the reception unit to configure a ground return duplex line on the transmission line. , A means for generating a frequency signal representing the frequency of the digital signal in the transmitting section and transmitting the frequency signal to the duplex line, and a means for receiving the frequency signal in the receiving section and switching the internal operating frequency thereby. Characterizing interface circuit for code conversion.
周波数を識別しこの識別結果から自動的に生成すること
を特徴とする請求項1記載の符号変換用インタフェ−ス
回路。2. The code conversion interface circuit according to claim 1, wherein the frequency signal identifies the frequency of the digital signal and is automatically generated from the identification result.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5952094A JPH07273750A (en) | 1994-03-29 | 1994-03-29 | Interface circuit for code conversion |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5952094A JPH07273750A (en) | 1994-03-29 | 1994-03-29 | Interface circuit for code conversion |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07273750A true JPH07273750A (en) | 1995-10-20 |
Family
ID=13115630
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5952094A Pending JPH07273750A (en) | 1994-03-29 | 1994-03-29 | Interface circuit for code conversion |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07273750A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10234720A1 (en) * | 2002-07-30 | 2004-02-12 | Infineon Technologies Ag | Interface connection method for transmitting/receiving data links to two lines in a pair of lines regarded as a single line in order to transmit data by means of differential signals |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5660136A (en) * | 1979-10-22 | 1981-05-23 | Nec Corp | Signal transmission system |
JPS56137740A (en) * | 1980-03-28 | 1981-10-27 | Tech Res & Dev Inst Of Japan Def Agency | Wire carrier frequency communication device |
JPH01279657A (en) * | 1988-05-06 | 1989-11-09 | Oki Electric Ind Co Ltd | Communication terminal equipment |
-
1994
- 1994-03-29 JP JP5952094A patent/JPH07273750A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5660136A (en) * | 1979-10-22 | 1981-05-23 | Nec Corp | Signal transmission system |
JPS56137740A (en) * | 1980-03-28 | 1981-10-27 | Tech Res & Dev Inst Of Japan Def Agency | Wire carrier frequency communication device |
JPH01279657A (en) * | 1988-05-06 | 1989-11-09 | Oki Electric Ind Co Ltd | Communication terminal equipment |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10234720A1 (en) * | 2002-07-30 | 2004-02-12 | Infineon Technologies Ag | Interface connection method for transmitting/receiving data links to two lines in a pair of lines regarded as a single line in order to transmit data by means of differential signals |
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Legal Events
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A02 | Decision of refusal |
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