JPH07273693A - Arrangement of disturbance noise reduction circuit and device provided with the arrangement - Google Patents
Arrangement of disturbance noise reduction circuit and device provided with the arrangementInfo
- Publication number
- JPH07273693A JPH07273693A JP5694494A JP5694494A JPH07273693A JP H07273693 A JPH07273693 A JP H07273693A JP 5694494 A JP5694494 A JP 5694494A JP 5694494 A JP5694494 A JP 5694494A JP H07273693 A JPH07273693 A JP H07273693A
- Authority
- JP
- Japan
- Prior art keywords
- line
- disturbance noise
- transmission line
- signal
- receiving end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Dc Digital Transmission (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、伝送線路に誘起される
外乱妨害成分を低減することのできる回路及びそれを備
えた装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit capable of reducing a disturbance disturbing component induced in a transmission line and a device equipped with the circuit.
【０００２】[0002]
【従来の技術】一般に互いに遠方に配置された電子回路
逹または電子機器達を電子的に接続するために伝送線路
が使用される。伝送線路を経由する信号の電力を増加す
ると損失電力が増加するため経済性が損われる。また、
高周波信号の場合には、伝送線路から信号電力の一部が
空中へ電波の形で輻射され、これが他の回路、機器また
は通信系に妨害を与える。他方、伝送線路経由の信号電
力を小さくすると、別の回路、機器または通信系が発生
する電磁界が伝送線路に誘起され、外乱ノイズとなる、
即ち、Ｓ／Ｎ比が劣化する。2. Description of the Related Art Transmission lines are generally used to electrically connect electronic circuits or electronic devices that are located far from each other. If the power of the signal passing through the transmission line is increased, the power loss is increased and the economical efficiency is impaired. Also,
In the case of a high frequency signal, a part of the signal power is radiated into the air in the form of a radio wave from the transmission line, which interferes with other circuits, devices or communication systems. On the other hand, if the signal power via the transmission line is reduced, an electromagnetic field generated by another circuit, device or communication system is induced in the transmission line, resulting in disturbance noise.
That is, the S / N ratio deteriorates.
【０００３】従って伝送線路に誘起される外乱ノイズを
低減することが望まれていた。Therefore, it has been desired to reduce the disturbance noise induced in the transmission line.
【０００４】従来この種の外乱ノイズを低減する手段と
して、伝送線路送受端に差動増幅器を用いることが行わ
れていた。しかしその場合、伝送線路として高価な２芯
式シールドケーブルを用いる必要があった。または通常
の１芯式シールドケーブルを２本用いる必要があった。Conventionally, as a means for reducing this type of disturbance noise, a differential amplifier has been used at the transmission and reception ends of the transmission line. However, in that case, it was necessary to use an expensive two-core shielded cable as the transmission line. Alternatively, it was necessary to use two ordinary single-core shielded cables.
【０００５】[0005]
【発明が解決しようとする課題】本発明の目的は、廉価
な１芯式シールドケーブル１本または裸２線平行伝送線
路を用いて、かつ、外乱ノイズを低減できる回路配置を
提供するにある。SUMMARY OF THE INVENTION It is an object of the present invention to provide a circuit arrangement using one inexpensive one-core shielded cable or bare two-wire parallel transmission line and capable of reducing disturbance noise.
【０００６】[0006]
【課題を解決するための手段】上記目的を達成するため
に、伝送線路の受端側に同相ノイズ消去手段を備える。
該消去手段は信号帰路用線路を恰かももうひとつの信号
伝送路であるかのように扱う。In order to achieve the above object, common-mode noise canceling means is provided on the receiving end side of a transmission line.
The erasing means treats the signal return line as if it were another signal transmission line.
【０００７】[0007]
【作用】該同相ノイズ消去手段は、ＧＮＤ線側に誘起さ
れる外乱ノイズ成分を、信号線側の信号成分と信号線側
の外乱ノイズ成分との和から引き算するように作用す
る。従って、残りは純粋な信号成分となる。従って外乱
ノイズが低減され、Ｓ／Ｎ比が向上される。The in-phase noise canceling means acts so as to subtract the disturbance noise component induced on the GND line side from the sum of the signal component on the signal line side and the disturbance noise component on the signal line side. Therefore, the rest are pure signal components. Therefore, disturbance noise is reduced and the S / N ratio is improved.
【０００８】[0008]
【実施例】図１に本発明の第１の実施例を示す。同図は
ふたつの回路基板の間を接続する伝送線路の場合を示
す。FIG. 1 shows the first embodiment of the present invention. The figure shows the case of a transmission line connecting between two circuit boards.
【０００９】同図において、１は送端側回路基板、２は
受端側回路基板、３は基板（１），（２）間の電源供給
電流の帰路を示すＧＮＤ線、４は送端側増幅器で１５，
１６は各々そのＧＮＤ端子及び出力端子である。５，６
は伝送線路で５は信号伝送用線路、６は信号帰路用線路
である。点線７は本発明の外乱ノイズ低減回路、８は演
算増幅器、９はその出力端子、１０はそのＧＮＤ端子、
１１，１２，１３，１４は各々抵抗器でその値はＲ１，
Ｒ２，Ｒ３，Ｒ４である。１３，１４は演算増幅の反転
入力端子に接続され、１１，１２は非反転入力端子に接
続される。以上で構成の説明を終り次にその動作を説明
する。In the figure, 1 is a circuit board on the sending end side, 2 is a circuit board on the receiving end side, 3 is a GND line indicating a return path of a power supply current between the boards (1) and (2), and 4 is a sending end side. With an amplifier 15,
16 are the GND terminal and the output terminal, respectively. 5,6
Is a transmission line, 5 is a signal transmission line, and 6 is a signal return line. The dotted line 7 is the disturbance noise reduction circuit of the present invention, 8 is an operational amplifier, 9 is its output terminal, 10 is its GND terminal,
Reference numerals 11, 12, 13, and 14 are resistors, and their values are R1,
R2, R3 and R4. Reference numerals 13 and 14 are connected to inverting input terminals for operational amplification, and reference numerals 11 and 12 are connected to non-inverting input terminals. With the above description of the configuration, the operation will be described.
【００１０】各部の電圧を受端側演算増幅器（８）のＧ
ＮＤ端子（１０）を基準として測ることと定義する。送
端側増幅器（４）のＧＮＤ端子（１５）の電圧をＮ１と
する。その信号出力端子（１６）の電圧を（Ｓ１＋Ｎ
１）とする。ここにＳ１は純粋信号成分であり、Ｎ１は
欄外ノイズ成分である。受端側外乱ノイズ低減回路の出
力端子（９）の電圧をＳ２とする。Ｓ２をＳ１，Ｎ１の
関数として求めると、重畳の理に基づき次式の解を得
る。The voltage of each part is supplied to G of the operational amplifier (8) on the receiving end side.
It is defined to be measured with the ND terminal (10) as a reference. The voltage of the GND terminal (15) of the sending end side amplifier (4) is N1. The voltage of the signal output terminal (16) is changed to (S1 + N
1). Here, S1 is a pure signal component, and N1 is a marginal noise component. The voltage of the output terminal (9) of the receiving side disturbance noise reduction circuit is S2. If S2 is obtained as a function of S1 and N1, the solution of the following equation is obtained based on the theory of superposition.
【００１１】[0011]
【数１】 [Equation 1]
【００１２】本発明においてはＲ２／Ｒ１の比をＲ４／
Ｒ３の比にほゞ等しく設定する。上式から判るようにそ
うすることによってＳ２の中の外乱ノイズ比例成分が消
去され、純粋信号成分（Ｓ１）に比例する成分のみが抽
出される。In the present invention, the ratio of R2 / R1 is R4 /
Set almost equal to the ratio of R3. As can be seen from the above equation, by doing so, the disturbance noise proportional component in S2 is eliminated and only the component proportional to the pure signal component (S1) is extracted.
【００１３】即ち、本実施例においては、信号帰路用線
路を恰かももうひとつの信号伝送路であるかの如くに扱
うことによって外乱ノイズを低減する。上記構成におい
て演算増幅８の反転入力端子と非反転入力端子を交換し
ても良い。その場合出力信号Ｓ２の極性は負極性とな
る。That is, in the present embodiment, the disturbance noise is reduced by treating the signal return line as if it were another signal transmission line. In the above configuration, the inverting input terminal and the non-inverting input terminal of the operational amplifier 8 may be exchanged. In that case, the polarity of the output signal S2 is negative.
【００１４】第２実施例を図２に示す。同図はふたつの
機器の間を接続する伝送線路の場合を示す。同図におい
て２１，２１′は送端側機器のフレームＧＮＤ，２２，
２２′は受端側機器のフレームＧＮＤ，２，７，８，
９，１０，１１，１２，１３，１４，１５，１６は図１
と同一である。２３はフレームＧＮＤ同志を結ぶ線路で
ある。２４，２５は同軸ケーブル、２６，２７は高周波
バイパス用キャパシタ、２８は同軸ケーブル２６，２７
の終端用抵抗である。例えばテレビジョン等の画像信号
伝送用に用いる場合には、キャパシタ２６，２７の値は
合計約１００ｐＦ以上の値に選定する。そうすることに
よって接続用ケーブル（２４）のＧＮＤとフレームＧＮ
Ｄ（２２，２２′）との間の高周波電位差を低減でき、
従って空中へ放射される輻射電波の強さを低減できる。A second embodiment is shown in FIG. The figure shows the case of a transmission line connecting two devices. In the figure, reference numerals 21 and 21 'denote frames GND, 22,
22 'is the frame GND, 2, 7, 8, of the receiving side device
9, 10, 11, 12, 13, 14, 15, 16 are shown in FIG.
Is the same as Reference numeral 23 is a line connecting the frame GNDs. 24 and 25 are coaxial cables, 26 and 27 are high frequency bypass capacitors, and 28 is coaxial cables 26 and 27.
It is a terminating resistor. For example, when it is used for transmitting an image signal of a television or the like, the total value of the capacitors 26 and 27 is selected to be about 100 pF or more. By doing so, the GND of the connecting cable (24) and the frame GN
The high frequency potential difference between D (22,22 ') can be reduced,
Therefore, the strength of the radiated radio waves radiated into the air can be reduced.
【００１５】外乱ノイズ低減原理は、図１で既述の通り
である。The disturbance noise reduction principle is as described above with reference to FIG.
【００１６】図３に周知の演算増幅：８の具体構成例を
その周辺回路と共に示す。同図で、点線８の内側が画像
信号増幅器の具体構成例である。９，１０，１１，１
２，１３，１４，２８は図１と同一である。３０は、直
流分をデカップリングするための周知の画信号伝送用ハ
イパスフィルタである。FIG. 3 shows a concrete configuration example of the well-known operational amplifier: 8 together with its peripheral circuits. In the figure, the inside of the dotted line 8 is a specific configuration example of the image signal amplifier. 9, 10, 11, 1
2, 13, 14, and 28 are the same as those in FIG. Reference numeral 30 is a well-known high-pass filter for image signal transmission for decoupling DC components.
【００１７】図４に本発明の第３の実施例を示す。同図
で１，２，３，４，５，６，９，１０，１５，１６は図
１と同一である。点線７′は外乱ノイズ低減回路の要部
である。３１は電圧フォロアトランジスタ、３２はその
エミッタ抵抗、３３はコモンエミッタ増幅用トランジス
タ、３４はそのコレクタ抵抗、３５，３６はダイオード
でトランジスタ３１，３３の温度特性を補償するための
もの、３７はＰＮＰトランジスタ、３８／３９はそのエ
ミッタ／コレクタ抵抗、４０はトランジスタ３７の温度
特性を補償するためのものである。出力端子９には（Ｓ
1＋Ｎ1）−Ｎ1，即ち、純粋信号成分Ｓ1に比例した電圧
が発生する。FIG. 4 shows a third embodiment of the present invention. 1, 2, 3, 4, 5, 5, 6, 9, 10, 15, 16 are the same as in FIG. A dotted line 7'is a main part of the disturbance noise reduction circuit. 31 is a voltage follower transistor, 32 is its emitter resistance, 33 is a common emitter amplification transistor, 34 is its collector resistance, 35 and 36 are diodes for compensating the temperature characteristics of the transistors 31 and 33, and 37 is a PNP transistor. , 38/39 are the emitter / collector resistances thereof, and 40 is for compensating the temperature characteristics of the transistor 37. The output terminal 9 has (S
1 + N 1 ) -N 1 , that is, a voltage proportional to the pure signal component S 1 is generated.
【００１８】電圧フォロアトランジスタ３１は、そのベ
ース電圧がコレクタ電位（ＧＮＤ１０）に対して−０．
６Ｖ（いわゆる障壁電圧）より高ければ、エミッタフォ
ロアとして動作する。従って本実施例は外乱ノイズの振
幅が±０．６Ｖ以内の場合に適用できる。上記説明は入
力信号が正電位である場合について記した。入力信号が
負電位である場合にはＰＮＰとＮＰＮとを交換すれば良
い。The voltage follower transistor 31 has a base voltage of −0.
If it is higher than 6 V (so-called barrier voltage), it operates as an emitter follower. Therefore, this embodiment can be applied when the amplitude of the disturbance noise is within ± 0.6V. The above description has described the case where the input signal is a positive potential. If the input signal has a negative potential, the PNP and NPN may be exchanged.
【００１９】[0019]
【発明の効果】本発明によれば、伝送線路のＧＮＤ端子
経由混入する外乱ノイズを受端側で低減することができ
る。従って、送端側の信号電力をより低減することがで
きる。従って省電力化に貢献でき、かつ、伝送線路から
空中への電波の輻射を防止できる。According to the present invention, it is possible to reduce disturbance noise mixed in via the GND terminal of the transmission line on the receiving end side. Therefore, the signal power on the sending end side can be further reduced. Therefore, it is possible to contribute to power saving and prevent the emission of radio waves from the transmission line to the air.
【００２０】従ってその工業上の価値が高い。Therefore, its industrial value is high.
【図１】本発明の第１実施例の回路配置である。FIG. 1 is a circuit layout of a first embodiment of the present invention.
【図２】本発明の第２実施例の回路配置である。FIG. 2 is a circuit arrangement according to a second embodiment of the present invention.
【図３】本発明の第３実施例の一部の詳細図である。FIG. 3 is a detailed view of a part of the third embodiment of the present invention.
【図４】本発明の第４実施例の回路配置である。FIG. 4 is a circuit arrangement according to a fourth embodiment of the present invention.
１…第１の回路基板、 ２…第２の回路基板、 ３…電源電流帰路用線路、 ５…信号伝送用線路、 ６…信号帰路用線路、 ７…外乱ノイズ低減回路、 ８…演算増幅器、 １０…基準電位。 DESCRIPTION OF SYMBOLS 1 ... 1st circuit board, 2 ... 2nd circuit board, 3 ... Power supply current return line, 5 ... Signal transmission line, 6 ... Signal return line, 7 ... Disturbance noise reduction circuit, 8 ... Operational amplifier, 10 ... Reference potential.
Claims (4)
するための少く共２本の線路を備え、該線路中の第１の
線路は送端の信号出力端子に接続され、第２の線路は送
端のＧＮＤ端子に接続され、該２本の線路と該受端の電
子回路との間に同相イイズ消去手段が配置され、該同相
ノイズ消去手段は、少く共ひとつの演算増幅器と４個の
抵抗器からなり、第１の抵抗器は該第１の線路と該演算
増幅器の非反転入力端子に接続され、第２の抵抗器は該
非反転入力端子と受端の電子回路のＧＮＤ端子との間に
接続され、第３の抵抗器は該第２の線路と該演算増幅器
の反転入力端子との間に接続され、第４の抵抗器は該反
転入力端子と該演算増幅器の出力端子との間に接続さ
れ、かつ、第１／第２の抵抗比を第３／第４の抵抗比に
ほゞ等しく選定してなる外乱ノイズ低減回路配置。1. At least two lines are provided for connecting an electronic circuit at a sending end and an electronic circuit at a receiving end, and a first line in the lines is connected to a signal output terminal at the sending end. The second line is connected to the GND terminal of the sending end, the in-phase noise canceling means is arranged between the two lines and the electronic circuit of the receiving end, and the in-phase noise canceling means performs at least one operation. An amplifier and four resistors, the first resistor is connected to the first line and the non-inverting input terminal of the operational amplifier, and the second resistor is an electronic circuit between the non-inverting input terminal and the receiving end. , The third resistor is connected between the second line and the inverting input terminal of the operational amplifier, and the fourth resistor is connected to the inverting input terminal and the operational amplifier. Is connected to the output terminal of and the first / second resistance ratio is selected to be approximately equal to the third / fourth resistance ratio. Disturbance noise reduction circuit arrangement that.
端子と非反転入力端子とを交換してなる外乱ノイズ低減
回路配置。2. The disturbance noise reduction circuit arrangement according to claim 1, wherein the inverting input terminal and the non-inverting input terminal of the operational amplifier are exchanged.
するための少く共２本の線路を備え、該線路中の第１の
線路は送端の信号出力端子に接続され、第２の線路は送
端のＧＮＤ端子に接続され、該２本の線路と該受端の電
子回路との間に同相ノイズ消去手段が配置され、該同相
ノイズ消去手段は、少く共電圧フォロアトランジスタ、
抵抗器、及びコモンエミッタ増幅用トランジスタからな
り、該第１の線路は該コモンエミッタ増幅用トランジス
タのベースに接続され、該第２の線路は該電圧フォロア
トランジスタに接続され、該抵抗器は両トランジスタの
各エミッタに接続され、該コモンエミッタ増幅用トラン
ジスタのコレクタ電流を経由して出力信号が導出されて
なる外乱ノイズ低減回路配置。3. A line having at least two lines for connecting an electronic circuit at a sending end and an electronic circuit at a receiving end, wherein a first line is connected to a signal output terminal at the sending end, The second line is connected to the GND terminal at the sending end, and the common-mode noise canceling means is arranged between the two lines and the electronic circuit at the receiving end, and the common-mode noise canceling means includes at least a co-voltage follower transistor. ,
A resistor and a common-emitter amplifying transistor, the first line being connected to the base of the common-emitter amplifying transistor, the second line being connected to the voltage follower transistor, and the resistor being both transistors. And a disturbance noise reduction circuit arrangement in which an output signal is derived via the collector current of the common-emitter amplifying transistor connected to each emitter.
備えてなる線路受端側装置。4. A line receiving end side device comprising the circuit arrangement according to claim 1, 2, or 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5694494A JPH07273693A (en) | 1994-03-28 | 1994-03-28 | Arrangement of disturbance noise reduction circuit and device provided with the arrangement |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5694494A JPH07273693A (en) | 1994-03-28 | 1994-03-28 | Arrangement of disturbance noise reduction circuit and device provided with the arrangement |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07273693A true JPH07273693A (en) | 1995-10-20 |
Family
ID=13041665
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5694494A Pending JPH07273693A (en) | 1994-03-28 | 1994-03-28 | Arrangement of disturbance noise reduction circuit and device provided with the arrangement |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07273693A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6525996B1 (en) | 1998-12-22 | 2003-02-25 | Seiko Epson Corporation | Power feeding apparatus, power receiving apparatus, power transfer system, power transfer method, portable apparatus, and timepiece |
-
1994
- 1994-03-28 JP JP5694494A patent/JPH07273693A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6525996B1 (en) | 1998-12-22 | 2003-02-25 | Seiko Epson Corporation | Power feeding apparatus, power receiving apparatus, power transfer system, power transfer method, portable apparatus, and timepiece |
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