JPH07192998A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH07192998A JPH07192998A JP5331626A JP33162693A JPH07192998A JP H07192998 A JPH07192998 A JP H07192998A JP 5331626 A JP5331626 A JP 5331626A JP 33162693 A JP33162693 A JP 33162693A JP H07192998 A JPH07192998 A JP H07192998A
- Authority
- JP
- Japan
- Prior art keywords
- silicon film
- crystalline silicon
- semiconductor device
- manufacturing
- oxidized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、結晶性シリコン膜を用
いた半導体装置の製造方法に係わり、特に、アクティブ
マトリクス型液晶表示装置等に用いられるガラス等の絶
縁基板上の薄膜トランジスタの製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device using a crystalline silicon film, and more particularly to a method of manufacturing a thin film transistor on an insulating substrate such as glass used in an active matrix type liquid crystal display device. .
【０００２】[0002]
【従来の技術】近年、大型あるいは高解像度のアクティ
ブマトリクス型液晶表示装置や高解像度のイメージセン
サー等に用いるため、ガラスや石英等の絶縁基板上に高
性能な半導体素子を形成する技術が求められている。2. Description of the Related Art In recent years, a technique for forming a high-performance semiconductor element on an insulating substrate such as glass or quartz is required for use in a large or high resolution active matrix type liquid crystal display device or a high resolution image sensor. ing.
【０００３】これらの半導体素子としては薄膜トランジ
スタが知られており、素子材には薄膜状のシリコン半導
体を用いるのが一般的である。薄膜状のシリコン半導体
としては、非晶質シリコン半導体からなるものと結晶性
を有するシリコン半導体からなるものに大別される。非
晶質シリコン半導体は作製温度が低く、気相法で比較的
容易に作製することが可能でり量産性に富むため、最も
一般的に用いられている。しかし導電性等の物性が結晶
性を有するシリコン半導体に比べて劣るため、半導体素
子の特性を更に向上するためには、結晶性を有するシリ
コン半導体を素子材とする半導体素子の作製方法を確立
する必要がある。尚、結晶性を有するシリコン半導体と
しては、多結晶シリコン、微結晶シリコン、結晶成分を
含む非晶質シリコン、結晶性と非晶質性の中間の状態を
有するセミアモルファスシリコン等が知られている。Thin film transistors are known as these semiconductor elements, and thin film silicon semiconductors are generally used as element materials. Thin film silicon semiconductors are roughly classified into those made of amorphous silicon semiconductors and those made of crystalline silicon semiconductors. Amorphous silicon semiconductors are most commonly used because they have a low production temperature, can be produced relatively easily by a vapor phase method, and have high mass productivity. However, since physical properties such as conductivity are inferior to those of a crystalline silicon semiconductor, in order to further improve the characteristics of the semiconductor element, a method for manufacturing a semiconductor element using a crystalline silicon semiconductor as an element material is established. There is a need. Note that as a crystalline silicon semiconductor, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known. .
【０００４】これら結晶性を有する薄膜状のシリコン半
導体を得る方法としては、成膜時に結晶性を有するシリ
コン膜を直接基板上に成膜する方法や、非晶質シリコン
膜を基板上に成膜し、レーザー光を照射してそのエネル
ギーにより結晶化する方法が知られてる。前者の方法で
は、成膜工程と同時に結晶化が進行するので、大粒径の
結晶性シリコン膜を得るためにはシリコン膜の厚膜化が
不可欠であり、良好な半導体物性を有する結晶性シリコ
ン膜を基板上に全面に渡って均一に成膜することが困難
であるばかりでなく、成膜温度が６００℃以上の高温と
なるため安価なガラス基板が使用できないという問題が
ある。後者の方法では、熔融固化過程の結晶化現象を利
用するため、小粒径ながら粒界が良好に処理され、高品
質な結晶性シリコン膜が得られるが、大面積基板の全面
に結晶性シリコン膜を均一に成膜するためにはレーザー
光の照射面積が小さいためスループットが低い、あるい
はレーザー光の安定性が充分でない等解決すべき課題が
多い。As a method for obtaining these thin film silicon semiconductors having crystallinity, a crystalline silicon film is directly formed on a substrate at the time of film formation, or an amorphous silicon film is formed on the substrate. However, there is known a method of irradiating a laser beam and crystallizing it by the energy. In the former method, crystallization progresses at the same time as the film formation step, so it is essential to increase the thickness of the silicon film in order to obtain a crystalline silicon film with a large grain size. Not only is it difficult to uniformly form a film on the entire surface of the substrate, but there is also a problem that an inexpensive glass substrate cannot be used because the film forming temperature is as high as 600 ° C. or higher. In the latter method, the crystallization phenomenon in the melting and solidification process is used, so that the grain boundaries are well processed with a small grain size and a high-quality crystalline silicon film is obtained. In order to form a uniform film, there are many problems to be solved, such as a low throughput due to a small irradiation area of laser light, or insufficient stability of laser light.
【０００５】そこで、現在最も実用的と考えられている
方法に非晶質シリコン膜に熱エネルギーを加え固相結晶
化させる方法がある。この方法は上述の方法と比較して
大面積基板上に均一に薄膜状の結晶性シリコン膜を作製
できる利点がある。Therefore, a method which is considered to be the most practical at present is a method in which thermal energy is applied to an amorphous silicon film to cause solid phase crystallization. This method has an advantage over the above method in that a thin crystalline silicon film can be uniformly formed on a large-area substrate.
【０００６】従来、この固相結晶化方法において特願平
５−２１８１５６号では、結晶成長の核としてニッケル
等の金属元素を非晶質シリコン膜に導入することによ
り、結晶化初期の核生成速度とその後の核成長速度を向
上し、５８０℃以下の温度で４時間程度の加熱処理で十
分な結晶性が得られることが開示されている。さらに、
その後加熱処理を継続させると、選択的に金属元素が導
入され結晶化している部分から、その周辺部の非晶質部
分へと横方向、即ち基板面に平行な方向に結晶成長部分
が延びる現象が起きる。この部分では基板と平行に針状
あるいは柱状の結晶が成長方向に沿って延びており、そ
の成長方向において結晶粒界が存在しない。このメカニ
ズムは現状では明らかではないが、不純物として非晶質
シリコン膜に導入した金属元素を核とした結晶核発生が
早期に起こり、その後その金属元素が触媒となって結晶
成長が急激に進行するものと推測されている。この結晶
成長部を利用して半導体素子のチャネル領域を形成する
ことにより、高性能な半導体素子が実現可能となる。ま
た、基板の一部に選択的に金属元素を導入することによ
り、レーザ光による結晶化のように同一基板内に選択的
に結晶性シリコン膜と非晶質シリコン膜とを形成するこ
とが可能となる。Conventionally, in this solid-phase crystallization method, in Japanese Patent Application No. 5-218156, by introducing a metal element such as nickel as a nucleus of crystal growth into an amorphous silicon film, the nucleation rate in the initial stage of crystallization is increased. And that the subsequent nucleus growth rate is improved and sufficient crystallinity can be obtained by heat treatment at a temperature of 580 ° C. or lower for about 4 hours. further,
If the heat treatment is continued after that, the crystal growth part extends laterally from the part where the metal element is selectively introduced and crystallized to the amorphous part in the peripheral part, that is, in the direction parallel to the substrate surface. Occurs. In this portion, needle-like or columnar crystals extend parallel to the substrate along the growth direction, and no crystal grain boundaries exist in the growth direction. This mechanism is not clear at present, but the generation of crystal nuclei with the metal element introduced as an impurity in the amorphous silicon film as a nucleus occurs at an early stage, and then the metal element serves as a catalyst for rapid crystal growth. It is supposed to be. By forming a channel region of a semiconductor device using this crystal growth portion, a high-performance semiconductor device can be realized. Further, by selectively introducing a metal element into a part of the substrate, a crystalline silicon film and an amorphous silicon film can be selectively formed in the same substrate like crystallization by laser light. Becomes
【０００７】図１５は上述の結晶成長部分を利用した薄
膜トランジスタを基板上面から見た場合の平面図であ
る。基板全面に形成された非晶質シリコン膜上に酸化シ
リコン膜等からなるマスク層を堆積し、そのマスク層に
金属元素添加用の窓２００を開け、金属元素を導入す
る。次に約５５０℃の温度で４時間程度の熱処理を行う
と、金属元素添加領域２０１が結晶化し、それ以外の部
分が非晶質シリコンのままで残る。さらに８時間程度熱
処理を継続すると、金属元素添加領域２０１を中心とし
て結晶成長方向２０２で横方向結晶成長が拡がり、結晶
成長部分２０３が形成される。その後、この結晶成長部
分２０３を利用して従来の方法に従い薄膜トランジスタ
を作製する。その際、結晶成長部分２０３に対しソース
領域２０４、チャネル領域２０５、ドレイン領域２０６
を図１５のような配置で設けることにより、キャリアが
移動する方向と結晶成長方向２０２が同一方向となり、
キャリアの移動方向に対して結晶粒界が存在しない半導
体素子が実現できる。また、図１６に示すように結晶成
長部分２０３に対しソース領域２０４、チャネル領域２
０５、ドレイン領域２０６を配置することにより、ドレ
イン端部の電界集中領域での粒界部分をなくし、半導体
素子動作時の特性劣化の原因となるドレイン端部での粒
界トラップ密度を低減することでオンオフ比の大きい半
導体素子が作製可能となる。FIG. 15 is a plan view of a thin film transistor using the above-mentioned crystal growth portion as viewed from the top surface of the substrate. A mask layer made of a silicon oxide film or the like is deposited on the amorphous silicon film formed over the entire surface of the substrate, a window 200 for adding a metal element is opened in the mask layer, and a metal element is introduced. Next, when heat treatment is performed at a temperature of about 550 ° C. for about 4 hours, the metal element-added region 201 is crystallized, and the other portions remain as amorphous silicon. When the heat treatment is further continued for about 8 hours, lateral crystal growth spreads in the crystal growth direction 202 centering on the metal element added region 201, and a crystal growth portion 203 is formed. After that, a thin film transistor is manufactured by utilizing this crystal growth portion 203 according to a conventional method. At that time, the source region 204, the channel region 205, and the drain region 206 with respect to the crystal growth portion 203.
By arranging with the arrangement shown in FIG. 15, the direction in which carriers move and the crystal growth direction 202 are the same direction
It is possible to realize a semiconductor device having no crystal grain boundaries in the carrier moving direction. In addition, as shown in FIG. 16, the source region 204 and the channel region 2 are added to the crystal growth portion 203.
05, by arranging the drain region 206, the grain boundary portion in the electric field concentrated region at the drain end is eliminated, and the grain boundary trap density at the drain end that causes characteristic deterioration during semiconductor device operation is reduced. Thus, a semiconductor element having a large on / off ratio can be manufactured.
【０００８】[0008]
【発明が解決しようとする課題】上述の従来例において
は、非晶質シリコン膜中に注入された金属元素が触媒的
な働きをして非晶質シリコン膜の結晶化を促進する役割
を果たす。しかしこの金属元素は同時に不純物として基
板と平行に成長した針状あるいは柱状の結晶粒界部分に
金属元素高濃度領域を形成する。従って従来例による結
晶性シリコン膜を用いて半導体素子を作製すると、金属
元素高濃度領域を介してソース・ドレイン間にリーク電
流が流れるため、図１５に示したような配置で結晶成長
部分２０３に対しソース領域２０４、チャネル領域２０
５、ドレイン領域２０６を設けた場合、半導体素子のオ
フ動作時のリーク電流増大の原因となり、結果としてオ
ンオフ比の小さい半導体素子しか得られない。In the above-mentioned conventional example, the metal element injected into the amorphous silicon film acts as a catalyst to promote the crystallization of the amorphous silicon film. . However, at the same time, this metal element forms a high-concentration metal element region as an impurity in a needle-shaped or columnar crystal grain boundary portion grown parallel to the substrate. Therefore, when a semiconductor element is manufactured using the crystalline silicon film according to the conventional example, a leak current flows between the source and the drain through the high-concentration metal element region, so that the crystal growth portion 203 has the arrangement as shown in FIG. On the other hand, the source region 204 and the channel region 20
5. When the drain region 206 is provided, it causes an increase in leak current during the off operation of the semiconductor element, and as a result, only a semiconductor element having a small on / off ratio can be obtained.
【０００９】また、結晶性シリコン膜を用いて半導体素
子を作製する際に、ドナーまたはアクセプタとなる不純
物イオンの注入後にエキシマレーザ等を用いて不純物イ
オンの活性化処理を行う場合、上述の結晶成長の成長端
や、結晶粒界部分に存在する金属元素高濃度領域はレー
ザの吸収係数が大きいため、この部分で結晶性シリコン
膜表面の表面荒れが発生しやすくなる。従って、照射す
るレーザのパワー密度の範囲が制限されることになり、
ドナー又はアクセプタ不純物イオンの活性化が十分に行
えなくなる。Further, when a semiconductor element is manufactured using a crystalline silicon film, when impurity ion activation processing is performed using an excimer laser or the like after implanting impurity ions serving as donors or acceptors, the above-described crystal growth is performed. Since the absorption coefficient of the laser is large in the growth edge of the metal element and in the high concentration region of the metal element existing in the crystal grain boundary portion, the surface of the crystalline silicon film is likely to be roughened in this portion. Therefore, the range of the power density of the laser to be irradiated is limited,
The donor or acceptor impurity ions cannot be sufficiently activated.
【００１０】さらに従来例では、結晶性シリコン膜中に
金属元素が混在しているために、コンタクトホールの開
口エッチング時に耐侵食性が悪く、エッチングダメージ
によるコンタクト不良の原因となる。Further, in the conventional example, since the metallic element is mixed in the crystalline silicon film, the erosion resistance is poor at the time of etching the opening of the contact hole, which causes a contact failure due to etching damage.
【００１１】[0011]
【課題を解決するための手段】本発明は、上述の問題を
解決する手段を提供するものである。より具体的には従
来例における結晶性シリコン膜中に存在する金属元素
を、結晶性シリコン膜の表面を強制的に酸化させること
によって酸化膜中に取り込み、その酸化膜をエッチング
して除去することによって金属元素を取り除き、結果と
して結晶性シリコン膜中の残留金属元素濃度の低減を行
い、上述の問題点を解決するものである。The present invention provides a means for solving the above problems. More specifically, the metal element present in the crystalline silicon film in the conventional example is taken into the oxide film by forcibly oxidizing the surface of the crystalline silicon film, and the oxide film is removed by etching. The metal element is removed by the method, and as a result, the concentration of the residual metal element in the crystalline silicon film is reduced to solve the above problems.
【００１２】即ち、絶縁性表面を有する基板上に実質的
な非晶質シリコン膜を形成する工程と、前記工程の前ま
たは後において、結晶化を助長する金属元素を前記非晶
質シリコン膜の一部に選択的に導入する工程と、加熱に
よって前記非晶質シリコン膜を前記金属元素が選択的に
導入された領域の周辺部において、基板表面に対し概略
平行な方向に結晶成長を行わせる工程と、前記工程にお
いて結晶化した結晶性シリコン膜の表面を強制的に酸化
させる工程と、前記結晶性シリコン膜表面の被酸化部分
をエッチングして除去する工程とを少なくとも有し、前
記工程における結晶性シリコン膜を素子形成領域とする
ことを特徴とする。That is, a step of forming a substantially amorphous silicon film on a substrate having an insulating surface, and before or after the step, a metal element that promotes crystallization is added to the amorphous silicon film. A step of selectively introducing into a part of the amorphous silicon film, and heating is performed to perform crystal growth in a direction substantially parallel to the substrate surface in the peripheral portion of the region into which the metal element is selectively introduced. At least a step, a step of forcibly oxidizing the surface of the crystalline silicon film crystallized in the step, and a step of etching and removing an oxidized portion of the crystalline silicon film surface, It is characterized in that a crystalline silicon film is used as an element formation region.
【００１３】また、本発明は結晶性シリコン膜表面の酸
化を塩化水素ガス雰囲気中での加熱により行うこと、結
晶性シリコン膜表面の酸化を水蒸気雰囲気中または水蒸
気を含む窒素雰囲気中での加熱により行うこと、結晶性
シリコン膜表面の酸化を硝酸、亜硝酸、過マンガン酸、
クロム酸、塩素酸、次亜塩素酸などのオキソ酸の内のい
ずれかを用いて行うこと、結晶性シリコン膜表面の酸化
を硝酸、亜硝酸、過マンガン酸、クロム酸、塩素酸、次
亜塩素酸などのオキソ酸の内のいずれかの塩の溶液を用
いて行うことを特徴とする。Further, according to the present invention, the surface of the crystalline silicon film is oxidized by heating in a hydrogen chloride gas atmosphere, and the surface of the crystalline silicon film is oxidized by heating in a steam atmosphere or a nitrogen atmosphere containing steam. What is done, the surface of the crystalline silicon film is oxidized by nitric acid, nitrous acid, permanganate,
Doing with any of oxo acids such as chromic acid, chloric acid, and hypochlorous acid, the surface of the crystalline silicon film is oxidized by nitric acid, nitrous acid, permanganic acid, chromic acid, chloric acid, hypochlorous acid It is characterized in that it is carried out using a solution of any salt of oxo acids such as chloric acid.
【００１４】さらに本発明は、結晶性シリコン膜表面の
酸化を熱濃硫酸を用いて行うこと、結晶性シリコン膜表
面の酸化を塩素、臭素などのハロゲンガス雰囲気中での
加熱により行うこと、結晶性シリコン膜表面の酸化を硝
酸ガス雰囲気中での６５０℃以下の温度による加熱によ
り行うこと、結晶性シリコン膜表面の酸化を酸素雰囲気
中または酸素混合雰囲気中での６５０℃以下の温度によ
る加熱により行うこと、結晶性シリコン膜表面の酸化を
ＲＦプラズマ、マイクロ波プラズマ、ＥＣＲプラズマな
どのプラズマ雰囲気中での加熱により行うこと、結晶性
シリコン膜表面の酸化を２５気圧程度の高圧のオキシダ
ント雰囲気中での加熱により行うこと、結晶性シリコン
膜表面の酸化を２５気圧程度の高圧の加熱水蒸気雰囲気
中での加熱により行うこと、結晶性シリコン膜表面の酸
化を紫外線照射下のＮ2０ガス雰囲気中での５００℃以
上の温度による加熱により行うこと、結晶性シリコン膜
中のキャリアの移動する方向と、結晶成長方向とが概略
平行となるように半導体素子を構成すること、結晶性シ
リコン膜中のキャリアの移動する方向と、結晶成長方向
とが概略垂直となるように半導体素子を構成すること、
金属元素としてＮｉ、Ｃｏ、Ｐｄ、Ｐｔの中から選ばれ
た少なくとも一つの材料を用いることを特徴とする。Further, in the present invention, the surface of the crystalline silicon film is oxidized by using hot concentrated sulfuric acid, the surface of the crystalline silicon film is oxidized by heating in a halogen gas atmosphere of chlorine, bromine, etc. The surface of the crystalline silicon film is oxidized by heating at a temperature of 650 ° C or lower in a nitric acid gas atmosphere, and the surface of the crystalline silicon film is heated by heating at a temperature of 650 ° C or lower in an oxygen atmosphere or an oxygen mixed atmosphere. The oxidation of the crystalline silicon film surface is performed by heating in a plasma atmosphere such as RF plasma, microwave plasma, ECR plasma, and the oxidation of the crystalline silicon film surface is performed in a high-pressure oxidant atmosphere of about 25 atm. The heating of the crystalline silicon film is performed by heating in a high temperature steam atmosphere of about 25 atm. Ukoto, be carried out by heating the oxidation of crystalline silicon film surface by 500 ° C. or more temperatures in the N 2 0 gas atmosphere under ultraviolet radiation, the direction of movement of the carrier of the crystalline silicon film, the crystal growth direction Configuring the semiconductor element such that and are substantially parallel, and configuring the semiconductor element such that the moving direction of carriers in the crystalline silicon film and the crystal growth direction are substantially perpendicular to each other,
It is characterized in that at least one material selected from Ni, Co, Pd, and Pt is used as the metal element.
【００１５】[0015]
【作用】以下に強制酸化による結晶性シリコン膜中の金
属元素濃度の低減機構について説明する。上述の従来例
における結晶性シリコン膜中での金属元素は、金属元素
が触媒的な働きをして非晶質シリコン膜の結晶化が進行
し、結晶性シリコン膜の結晶成長端部と、金属濃度の高
い部分が一致して移動して行くことからも明らかなよう
に、金属元素の被注入領域と、シリコン結晶の結晶成長
端付近の非晶質部分及び、各結晶間の結晶粒界付近に濃
度の高い領域が分布していることは明白である。The function of reducing the metal element concentration in the crystalline silicon film by forced oxidation will be described below. The metal element in the crystalline silicon film in the above-mentioned conventional example is a metal element that acts as a catalyst to promote crystallization of the amorphous silicon film, and the crystal growth end portion of the crystalline silicon film and the metal As is clear from the fact that the high-concentration portions move in unison, the implanted region of the metal element, the amorphous portion near the crystal growth edge of the silicon crystal, and the crystal grain boundaries between the crystals It is clear that the high concentration area is distributed in the area.
【００１６】ところで、非晶質シリコンと結晶性シリコ
ンが混在する多結晶シリコン膜において、結晶性シリコ
ンの結晶粒の大きさを電子顕微鏡等で観察する場合、二
クロム酸カリウムと硝酸とフッ酸の混合溶液を用いて処
理を行うと非晶質部分がエッチング除去されて結晶性シ
リコンの結晶粒が観測しやすくなる。混合溶液のうち二
クロム酸カリウムと硝酸は強力な酸化作用をもち、シリ
コン膜を酸化した後、フッ酸成分によってエッチング除
去するもので、非晶質部分と結晶質部分とを比較する
と、非晶質部分の方が酸化されやすいためエッチングレ
ートが速い。このように、非晶質シリコンと結晶性シリ
コンを比較した場合、非晶質シリコンの方が酸化されや
すいことが一般に知られている。By the way, in a polycrystalline silicon film in which amorphous silicon and crystalline silicon are mixed, when observing the crystal grain size of crystalline silicon by an electron microscope or the like, potassium dichromate, nitric acid, and hydrofluoric acid are used. When the treatment is performed using the mixed solution, the amorphous portion is removed by etching, and the crystal grains of crystalline silicon are easily observed. Of the mixed solution, potassium dichromate and nitric acid have a strong oxidizing action, and after oxidizing the silicon film, they are removed by etching with the hydrofluoric acid component. Since the quality part is more easily oxidized, the etching rate is faster. Thus, when comparing amorphous silicon and crystalline silicon, it is generally known that amorphous silicon is more likely to be oxidized.
【００１７】上述の二つの事実から従来例による結晶性
シリコン膜においては、その表面を強制的に酸化する工
程により、金属元素濃度の高い結晶成長端部分や結晶粒
界部分での酸化が、結晶質部分に比べて速く進行し、金
属元素を含む酸化膜が形成される。次いでその酸化膜の
エッチング除去を行う工程により、酸化膜が金属元素と
共に取り除かれるため、結果として結晶性シリコン膜中
の金属元素濃度を大幅に低減することがでる。本発明に
よる結晶性シリコン膜を用い、結晶の成長方向に沿って
ソース・ドレイン領域を形成することによって、キャリ
アの移動が粒界の影響を受けない高移動度を有する半導
体素子を得ることができ、結晶成長方向に垂直な方向に
ソース・ドレイン領域を形成することにより、ドレイン
端部での電界集中領域の粒界部分をなくすことでオフ電
流の小さい半導体素子を得ることができる。From the above two facts, in the crystalline silicon film according to the conventional example, due to the process of forcibly oxidizing the surface, the oxidation at the crystal growth edge portion and the crystal grain boundary portion where the metal element concentration is high is It progresses faster than the quality part, and an oxide film containing a metal element is formed. Then, the oxide film is removed together with the metal element in the step of removing the oxide film by etching, and as a result, the concentration of the metal element in the crystalline silicon film can be significantly reduced. By forming the source / drain regions along the crystal growth direction using the crystalline silicon film according to the present invention, it is possible to obtain a semiconductor device having high mobility in which carrier movement is not affected by grain boundaries. By forming the source / drain regions in the direction perpendicular to the crystal growth direction, the grain boundary portion of the electric field concentration region at the drain end is eliminated, so that a semiconductor element with a small off current can be obtained.
【００１８】さらに、本発明を結晶性シリコン基板に対
して適用することにより、結晶性シリコン膜表面に付着
している有機物等の半導体素子作製時に特性劣化の要因
となり得る表面汚染物質を同時に清浄化できることは言
うまでもない。Further, by applying the present invention to a crystalline silicon substrate, surface contaminants such as organic substances adhering to the surface of the crystalline silicon film, which may be a factor of characteristic deterioration at the time of manufacturing a semiconductor element, are simultaneously cleaned. It goes without saying that you can do it.
【００１９】[0019]
（実施例１）本発明の実施例を薄膜トランジスタの製造
方法を例に図を用いて説明する。図１〜図１４は薄膜ト
ランジスタの製造方法をプロセス順に示した断面図であ
る。(Embodiment 1) An embodiment of the present invention will be described with reference to the drawings by taking a method of manufacturing a thin film transistor as an example. 1 to 14 are cross-sectional views showing a method of manufacturing a thin film transistor in process order.
【００２０】図１に示すように、絶縁性表面を有する基
板、例えばガラス基板１０１の表面を洗浄後、ベースコ
ート膜１０２として二酸化シリコン膜をスパッタリング
装置を用いて厚さ２００ｎｍ程度堆積させる。このベー
スコート膜１０２の必要膜厚は基板の表面状態によって
異なり、十分に平坦で、且つナトリウムイオン等の半導
体特性に悪影響を与えるイオンの濃度が十分に低い基板
であれば、省略することも可能であり、逆に表面の状態
が傷や凹凸の激しいものであれば上述の膜厚よりも厚く
堆積させる必要がある。ベースコート膜上に化学的気相
成長法（ＣＶＤ法）やスパッタリング法をもちいて非晶
質状のシリコン膜１０３を１００ｎｍ程度の厚さに堆積
させる。次に図２に示すように、非晶質シリコン膜上に
スパッタリング装置等をもちいて二酸化ケイ素膜等によ
るマスク層１０４を１００ｎｍ以上の厚さに堆積させ、
パターニングにより金属元素添加用開口部１０５を設
け、開口部上方よりニッケル等の金属元素１０６を非晶
質シリコン膜中に導入する。次に図３〜図５に示すよう
に、金属元素１０６を導入後、非晶質シリコン膜上のマ
スク層１０４をエッチングにより取り除き、基板全体を
５５０℃の温度で加熱処理する。これにより、被金属元
素添加領域に形成された金属元素とシリコンによる合金
部分１０７より注入不純物元素が周辺の非晶質シリコン
膜に図３のように拡散し始め、この金属元素がある種の
触媒的な働きをするため、不純物金属元素濃度の高い部
分を先頭にして金属元素高濃度領域１１０から結晶成長
方向１０９へ非晶質シリコン膜の結晶化が基板表面に沿
って図４のように進行して行く。そして結晶性シリコン
領域１１１は図５のように広がり結晶成長端部の金属元
素高濃度領域１１２は図５のように結晶性シリコン領域
１１１の先端にある。As shown in FIG. 1, after cleaning the surface of a substrate having an insulating surface, such as a glass substrate 101, a silicon dioxide film as a base coat film 102 is deposited to a thickness of about 200 nm using a sputtering apparatus. The required film thickness of the base coat film 102 depends on the surface condition of the substrate, and can be omitted if the substrate is sufficiently flat and has a sufficiently low concentration of ions such as sodium ions that adversely affect semiconductor characteristics. On the contrary, if the surface condition is severely scratched or uneven, it is necessary to deposit the film thicker than the above-mentioned film thickness. An amorphous silicon film 103 is deposited on the base coat film to a thickness of about 100 nm by using a chemical vapor deposition method (CVD method) or a sputtering method. Next, as shown in FIG. 2, a mask layer 104 made of a silicon dioxide film or the like is deposited on the amorphous silicon film with a sputtering device or the like to a thickness of 100 nm or more,
An opening 105 for adding a metal element is provided by patterning, and a metal element 106 such as nickel is introduced into the amorphous silicon film from above the opening. Next, as shown in FIGS. 3 to 5, after introducing the metal element 106, the mask layer 104 on the amorphous silicon film is removed by etching, and the entire substrate is heat-treated at a temperature of 550 ° C. As a result, the injected impurity element begins to diffuse into the surrounding amorphous silicon film from the alloy portion 107 formed of the metal element and silicon formed in the metal element added region into the surrounding amorphous silicon film, as shown in FIG. Crystallization of the amorphous silicon film proceeds from the metal element high concentration region 110 in the crystal growth direction 109 along the substrate surface, as shown in FIG. To go. Then, the crystalline silicon region 111 spreads as shown in FIG. 5, and the metal element high concentration region 112 at the crystal growth end is at the tip of the crystalline silicon region 111 as shown in FIG.
【００２１】次に、非晶質シリコン膜の結晶領域１１１
が半導体素子を作製するのに十分な領域まで進行した
後、図６のようにこの結晶性シリコン膜を島状にパター
ニングする。この状態で図７のように結晶性シリコン膜
１１１の表面を酸化する。このときできた酸化膜１１４
の中に結晶性シリコン膜中に含まれる金属元素が取り込
まれ、金属元素注入領域１１６、結晶性シリコン領域１
１７、結晶成長端部１１８はそれぞれ低濃度化する（図
８）。この後、酸化膜１１４を取り込まれた金属元素ご
とエッチングにより図９のように完全に取り除くことに
より、結晶性シリコン膜中の不純物金属元素濃度が低下
する。Next, the crystalline region 111 of the amorphous silicon film.
After progressing to a region sufficient for manufacturing a semiconductor element, the crystalline silicon film is patterned into an island shape as shown in FIG. In this state, the surface of the crystalline silicon film 111 is oxidized as shown in FIG. Oxide film 114 formed at this time
The metal element contained in the crystalline silicon film is taken into the film, and the metal element injection region 116 and the crystalline silicon region 1
17 and the crystal growth end portion 118 are reduced in concentration (FIG. 8). Thereafter, the oxide film 114 is completely removed by etching together with the metal element taken in as shown in FIG. 9, whereby the concentration of the impurity metal element in the crystalline silicon film is lowered.
【００２２】その後、ゲート絶縁膜１１９、ゲート電極
１２０をこの順に形成して、ゲート電極１２０をマスク
として結晶性シリコン膜のソース・ドレイン領域１２２
・１２３にドナー又はアクセプタとなる不純物イオン１
２１を注入、活性化する（図１１）。さらにこの後図１
２のように層間絶縁膜１２４を堆積させて、図１３のよ
うにコンタクトホール１２５を開口した後、図１４のよ
うにソース・ドレイン電極１２６・１２７を形成して薄
膜トランジスタが完成する。After that, a gate insulating film 119 and a gate electrode 120 are formed in this order, and the source / drain regions 122 of the crystalline silicon film are formed using the gate electrode 120 as a mask.
・ Impurity ion 1 serving as a donor or acceptor at 123
21 is injected and activated (FIG. 11). Furthermore, after this
2, the interlayer insulating film 124 is deposited, the contact hole 125 is opened as shown in FIG. 13, and then the source / drain electrodes 126 and 127 are formed as shown in FIG. 14 to complete the thin film transistor.
【００２３】尚、本実施例では結晶成長方向と、薄膜ト
ランジスタのキャリアの移動方向とを一致させた場合に
ついて図示したが、結晶成長方向と、薄膜トランジスタ
のキャリアの移動方向とを直交させても、結晶性シリコ
ン膜表面の強制酸化及び、酸化膜のエッチング除去効果
に何ら影響を与えない。In the present embodiment, the crystal growth direction and the carrier movement direction of the thin film transistor are shown as coincident with each other. However, even if the crystal growth direction and the carrier movement direction of the thin film transistor are orthogonal to each other, the crystal It does not affect the forced oxidation of the surface of the conductive silicon film and the etching removal effect of the oxide film.
【００２４】以下の実施例では本発明における結晶性シ
リコン膜の表面の酸化方法について説明する。In the following examples, the method of oxidizing the surface of the crystalline silicon film according to the present invention will be described.
【００２５】（実施例２）上述の実施例１で図１〜図６
のようにして得られた結晶性シリコン膜１１１を形成し
た基板を、加熱設備と石英チューブで構成される熱アニ
ール炉中に保持する。次に熱アニール炉中にＮ2ガス、
Ｏ2ガス、Ｈｃｌガスを導入し、６５０℃以下の温度、
好ましくは５５０℃〜６００℃の温度で１〜１２時間加
熱処理して結晶性シリコン膜の表面を酸化して酸化膜１
１４を形成する。(Embodiment 2) FIGS. 1 to 6 in Embodiment 1 described above.
The substrate on which the crystalline silicon film 111 thus obtained is formed is held in a thermal annealing furnace composed of heating equipment and a quartz tube. Next, in a thermal annealing furnace, N 2 gas,
Introducing O 2 gas and Hcl gas, a temperature of 650 ° C. or lower,
The oxide film 1 is preferably formed by heat treatment at a temperature of 550 ° C. to 600 ° C. for 1 to 12 hours to oxidize the surface of the crystalline silicon film.
14 is formed.
【００２６】（実施例３）上述の実施例１で図１〜図６
のようにして得られた結晶性シリコン膜１１１を、形成
した基板を加熱設備と石英チューブで構成される熱アニ
ール炉中に保持する。次に熱アニール炉中に水蒸気ある
いは水蒸気を含む窒素を導入し、６５０℃以下の温度、
好ましくは５５０℃〜６００℃の温度で１〜１２時間加
熱処理して結晶性シリコン膜の表面を酸化して酸化膜１
１４を形成する。(Third Embodiment) FIGS. 1 to 6 in the first embodiment described above.
The substrate on which the crystalline silicon film 111 thus obtained is formed is held in a thermal annealing furnace composed of heating equipment and a quartz tube. Next, steam or nitrogen containing steam is introduced into the thermal annealing furnace, and the temperature of 650 ° C. or lower,
The oxide film 1 is preferably formed by heat treatment at a temperature of 550 ° C. to 600 ° C. for 1 to 12 hours to oxidize the surface of the crystalline silicon film.
14 is formed.
【００２７】（実施例４）石英水槽に硝酸、亜硝酸、過
マンガン酸、クロム酸、塩素酸、次亜塩素酸などのオキ
ソ酸あるいは硝酸、亜硝酸、過マンガン酸、クロム酸、
塩素酸、次亜塩素酸などのオキソ酸塩水溶液を用意し、
これを常温あるいはヒーターを用いて１５０℃以下の温
度に保つ。次に上述の実施例１で図１〜図６のようにし
て得られた結晶性シリコン膜１１１を形成した基板を上
記オキソ酸あるいはオキソ酸塩水溶液に浸漬して結晶性
シリコン膜の表面を酸化して酸化膜１１４を形成する。Example 4 In a quartz water tank, oxo acids such as nitric acid, nitrous acid, permanganic acid, chromic acid, chloric acid and hypochlorous acid, or nitric acid, nitrous acid, permanganic acid, chromic acid,
Prepare an aqueous oxo acid salt solution such as chloric acid or hypochlorous acid,
This is kept at room temperature or at a temperature of 150 ° C. or lower using a heater. Next, the surface of the crystalline silicon film is oxidized by immersing the substrate having the crystalline silicon film 111 obtained in the above-described Example 1 as shown in FIGS. 1 to 6 in the oxo acid or oxo acid salt aqueous solution. Then, the oxide film 114 is formed.
【００２８】（実施例５）石英水槽に濃硫酸を用意し、
これを常温あるいはヒーターを用いて１５０℃以下の温
度、好ましくは１３０℃前後の温度に保つ。次に上述の
実施例１で図１〜図６のようにして得られた結晶性シリ
コン膜を形成した基板を濃硫酸に浸漬して結晶性シリコ
ン膜１１１の表面を酸化して酸化膜１１４を形成する。(Example 5) Prepare concentrated sulfuric acid in a quartz water tank,
This is kept at room temperature or using a heater at a temperature of 150 ° C. or lower, preferably around 130 ° C. Next, the substrate having the crystalline silicon film formed as shown in FIGS. 1 to 6 in the first embodiment is immersed in concentrated sulfuric acid to oxidize the surface of the crystalline silicon film 111 to form the oxide film 114. Form.
【００２９】（実施例６）上述の実施例１で図１〜図６
のようにして得られた結晶性シリコン膜を形成した基板
を真空排気設備を備え、加熱設備と石英チューブで構成
される熱アニール炉中に保持する。次に塩素、臭素など
のハロゲンガスを熱アニール炉中に導入し、６００℃以
下の温度で１〜１２時間加熱処理して結晶性シリコン膜
１１１の表面を酸化して酸化膜１１４を形成する。ハロ
ゲンガスの代わりに熱アニール炉中に硝酸ガスを導入し
た場合は、６００℃以下の温度、好ましくは３００〜３
５０℃の温度で１〜１２時間加熱処理して結晶性シリコ
ン膜１１１の表面を酸化して酸化膜１１４を形成する。(Embodiment 6) FIG. 1 to FIG. 6 in Embodiment 1 described above.
The substrate on which the crystalline silicon film formed in the above manner is formed is held in a thermal annealing furnace which is equipped with a vacuum evacuation facility and is composed of a heating facility and a quartz tube. Then, a halogen gas such as chlorine or bromine is introduced into the thermal annealing furnace, and heat treatment is performed at a temperature of 600 ° C. or lower for 1 to 12 hours to oxidize the surface of the crystalline silicon film 111 to form an oxide film 114. When nitric acid gas is introduced into the thermal annealing furnace instead of halogen gas, the temperature is 600 ° C. or lower, preferably 300 to 3
The surface of the crystalline silicon film 111 is oxidized by heat treatment at a temperature of 50 ° C. for 1 to 12 hours to form an oxide film 114.
【００３０】（実施例７）上述の実施例１で図１〜図６
のようにして得られた結晶性シリコン膜を形成した基板
を加熱設備と石英チューブで構成される熱アニール炉中
に保持する。次に酸素あるいは酸素を混合したガスを熱
アニール炉中に導入し、６５０℃以下の温度、好ましく
は５５０〜６００℃の温度で１〜１２時間加熱処理して
結晶性シリコン膜１１１の表面を酸化して酸化膜１１４
を形成する。(Embodiment 7) FIG. 1 to FIG. 6 in Embodiment 1 described above.
The substrate on which the crystalline silicon film thus obtained is formed is held in a thermal annealing furnace composed of heating equipment and a quartz tube. Next, oxygen or a gas mixed with oxygen is introduced into a thermal annealing furnace, and heat treatment is performed at a temperature of 650 ° C. or lower, preferably 550 to 600 ° C. for 1 to 12 hours to oxidize the surface of the crystalline silicon film 111. Oxide film 114
To form.
【００３１】（実施例８）上述の実施例１で図１〜図６
の工程により得られた結晶性シリコン膜を形成した基板
を平行平板型プラズマＣＶＤ装置またはＥＣＲＣＶＤ装
置あるいはマイクロ波プラズマＣＶＤ装置のチャンバー
内に保持する。次にチャンバー内の圧力を１３３パスカ
ル程度に保ち、３００〜３５０℃の温度で５分〜１時間
酸素プラズマに基板を晒して結晶性シリコン膜１１１の
表面を酸化して酸化膜１１４を形成する。(Embodiment 8) FIG. 1 to FIG. 6 in Embodiment 1 described above.
The substrate on which the crystalline silicon film is formed obtained in the above step is held in the chamber of a parallel plate plasma CVD apparatus, an ECRCVD apparatus or a microwave plasma CVD apparatus. Next, the pressure in the chamber is maintained at about 133 Pascal, the substrate is exposed to oxygen plasma at a temperature of 300 to 350 ° C. for 5 minutes to 1 hour, and the surface of the crystalline silicon film 111 is oxidized to form an oxide film 114.
【００３２】（実施例９）上述の実施例１で図１〜図６
のようにして得られた結晶性シリコン膜を形成した基板
を高圧容器内の炉中に保持する。次に炉中に２５気圧程
度の高圧オキシダントあるいは２５気圧程度の高圧加熱
水蒸気を導入し、６５０℃以下の温度、好ましくは５５
０〜６００℃の温度で１〜１２時間加熱処理して結晶性
シリコン膜１１１の表面を酸化して酸化膜１１４を形成
する。(Embodiment 9) FIG. 1 to FIG. 6 in Embodiment 1 described above.
The substrate on which the crystalline silicon film thus obtained is formed is held in a furnace in a high pressure vessel. Next, a high-pressure oxidant of about 25 atm or high-pressure heated steam of about 25 atm was introduced into the furnace, and the temperature was 650 ° C. or lower, preferably 55 ° C.
The surface of the crystalline silicon film 111 is oxidized by heat treatment at a temperature of 0 to 600 ° C. for 1 to 12 hours to form an oxide film 114.
【００３３】（実施例１０）上述の実施例１で図１〜図
６のようにして得られた結晶性シリコン膜を形成した基
板を真空排気設備を備え、加熱設備と石英チューブで構
成されるた熱アニール炉中に保持する。次に熱アニール
炉中にＮ2Ｏガス導入し、常圧で５００〜６５０℃の温
度、好ましくは６００℃に保ち、５分〜１時間、好まし
くは３０分程度紫外線ランプにより紫外線を基板に照射
して結晶性シリコン膜１１１の表面を酸化して酸化膜１
１４を形成する。(Embodiment 10) The substrate having the crystalline silicon film formed as shown in FIGS. 1 to 6 in Embodiment 1 described above is equipped with a vacuum exhaust facility, and is composed of a heating facility and a quartz tube. Kept in a thermal annealing furnace. Next, N 2 O gas is introduced into the thermal annealing furnace, and the substrate is irradiated with ultraviolet rays by an ultraviolet lamp for 5 minutes to 1 hour, preferably at a temperature of 500 to 650 ° C., preferably 600 ° C. under normal pressure. Then, the surface of the crystalline silicon film 111 is oxidized to form the oxide film 1.
14 is formed.
【００３４】本発明は上述の実施例に限定されるもので
はなく、本発明の技術的思想に基づく各種の変形が可能
である。本発明による半導体装置の応用としては、液晶
表示用のアクティブマトリクス型基板以外に、例えば、
密着型イメージセンサ、ドライバ内蔵型サーマルヘッ
ド、有機系ＥＬ等を発光素子としたドライバ内蔵型の光
書き込み素子や表示素子、三次元ＩＣ等が考えられる。
本発明を用いることで、これらの素子の高速化、高解像
度化等の高性能化が実現される。さらに本発明は、上述
の実施例で説明した薄膜トランジスタをはじめとして幅
広く半導体プロセス全般に応用することができる。The present invention is not limited to the above embodiments, but various modifications can be made based on the technical idea of the present invention. Examples of applications of the semiconductor device according to the present invention include, in addition to active matrix type substrates for liquid crystal display,
A contact image sensor, a thermal head with a built-in driver, an optical writing element and a display element with a built-in driver using an organic EL or the like as a light emitting element, a three-dimensional IC, and the like are considered.
By using the present invention, high performance such as high speed and high resolution of these elements is realized. Further, the present invention can be widely applied to general semiconductor processes including the thin film transistor described in the above embodiments.
【００３５】[0035]
【発明の効果】結晶化を助長する金属元素を非晶質シリ
コン膜に導入して基板と平行に結晶成長させた結晶性シ
リコン膜を利用して半導体素子を作製する半導体装置の
製造方法において、結晶性シリコン膜の表面を強制的に
酸化し、その酸化膜をエッチングして除去することによ
り、結晶性シリコン膜中の金属元素濃度の低減および結
晶性シリコン膜表面の汚染物質除去が同時に行え、高品
質な結晶性シリコン膜を得ることができる。そして、こ
の結晶性シリコン膜を用いて半導体素子を作製すること
により、基板全面にわたって高性能で安定した特性の半
導体素子を有する半導体装置が実現可能となる。その
際、結晶成長方向とキャリアの移動する方向とが平行と
なるように半導体素子を構成することにより、キャリア
の移動が結晶粒界の影響を受けない高移動度を有する半
導体装置を得ることができ、結晶成長方向とキャリアの
移動する方向とが垂直となるように半導体素子を構成す
ることにより、電界集中領域の粒界部分をなくすことが
でき、オフ電流の小さい半導体装置を得ることができ
る。According to the method of manufacturing a semiconductor device, a semiconductor element is manufactured by using a crystalline silicon film in which a metal element that promotes crystallization is introduced into an amorphous silicon film and crystal is grown parallel to a substrate. By forcibly oxidizing the surface of the crystalline silicon film and etching and removing the oxide film, the concentration of metal elements in the crystalline silicon film can be reduced and contaminants on the surface of the crystalline silicon film can be removed at the same time. A high quality crystalline silicon film can be obtained. Then, by manufacturing a semiconductor element using this crystalline silicon film, a semiconductor device having a semiconductor element having high performance and stable characteristics over the entire surface of the substrate can be realized. At this time, by configuring the semiconductor element so that the crystal growth direction and the carrier movement direction are parallel to each other, a semiconductor device having high mobility in which carrier movement is not affected by crystal grain boundaries can be obtained. By forming the semiconductor element so that the crystal growth direction and the carrier movement direction are perpendicular to each other, the grain boundary portion in the electric field concentration region can be eliminated, and a semiconductor device with a small off current can be obtained. .
【図１】本発明の実施例における半導体素子の第１工程
説明図である。FIG. 1 is an explanatory diagram of a first step of a semiconductor device in an example of the present invention.
【図２】本発明の実施例における半導体素子の第２工程
説明図である。FIG. 2 is a second step explanatory view of the semiconductor element in the example of the present invention.
【図３】本発明の実施例における半導体素子の第３工程
説明図である。FIG. 3 is a third step explanatory view of the semiconductor element in the example of the present invention.
【図４】本発明の実施例における半導体素子の第４工程
説明図である。FIG. 4 is a fourth step explanatory view of the semiconductor element in the example of the present invention.
【図５】本発明の実施例における半導体素子の第５工程
説明図である。FIG. 5 is a fifth step explanatory view of the semiconductor element in the example of the present invention.
【図６】本発明の実施例における半導体素子の第６工程
説明図である。FIG. 6 is a sixth step explanatory view of the semiconductor element in the example of the present invention.
【図７】本発明の実施例における半導体素子の第７工程
説明図である。FIG. 7 is a seventh step explanatory view of the semiconductor element in the example of the present invention.
【図８】本発明の実施例における半導体素子の第８工程
説明図である。FIG. 8 is an explanatory view of an eighth step of manufacturing a semiconductor device according to an example of the present invention.
【図９】本発明の実施例における半導体素子の第９工程
説明図である。FIG. 9 is a ninth step explanatory view of the semiconductor element in the example of the present invention.
【図１０】本発明の実施例における半導体素子の第１０
工程説明図である。FIG. 10 is a tenth example of a semiconductor device according to an embodiment of the present invention.
FIG.
【図１１】本発明の実施例における半導体素子の第１１
工程説明図である。FIG. 11 is an eleventh embodiment of the semiconductor device according to the present invention.
FIG.
【図１２】本発明の実施例における半導体素子の第１２
工程説明図である。FIG. 12 is a twelfth semiconductor device according to an embodiment of the present invention.
FIG.
【図１３】本発明の実施例における半導体素子の第１３
工程説明図である。FIG. 13 is a thirteenth semiconductor device according to an embodiment of the present invention.
FIG.
【図１４】本発明の実施例における半導体素子の第１４
工程説明図である。FIG. 14 is a fourteenth semiconductor device according to an embodiment of the present invention.
FIG.
【図１５】従来の薄膜トランジスタを基板上面から見た
場合の平面図である。FIG. 15 is a plan view of a conventional thin film transistor as viewed from the top surface of a substrate.
【図１６】従来の他の薄膜トランジスタを基板上面から
見た場合の平面図である。FIG. 16 is a plan view of another conventional thin film transistor as viewed from the top surface of the substrate.
１０１ ガラス基板 １０２ ベースコート膜 １０３ 非晶質シリコン膜 １０４ マスク層 １０５ 金属元素添加用開口部 １０６ 金属元素 １０７ 金属−シリコン合金領域 １０８，１１５ 金属元素の拡散 １０９ 結晶成長方向 １１０ 金属元素高濃度領域 １１１ 結晶性シリコン領域 １１２ 結晶成長端部の金属元素高濃度領域 １１３ 酸化前の結晶性シリコン膜表面 １１４ 酸化膜 １１６ 低濃度化した金属元素注入領域 １１７ 低濃度化した結晶性シリコン領域 １１８ 低濃度化した結晶成長端部 １１９ ゲート絶縁膜 １２０ ゲート電極 １２１ 不純物イオン １２２，１２３ ソース・ドレイン領域 １２４ 層間絶縁膜 １２５ コンタクトホール １２６，１２７ ソース・ドレイン電極 ２００ 金属元素添加用窓 ２０１ 金属元素添加領域 ２０２ 結晶成長方向 ２０３ 結晶成長部分 ２０４ ソース領域 ２０５ チャネル領域 ２０６ ドレイン領域 Reference Signs List 101 glass substrate 102 base coat film 103 amorphous silicon film 104 mask layer 105 opening for metal element addition 106 metal element 107 metal-silicon alloy region 108, 115 diffusion of metal element 109 crystal growth direction 110 metal element high concentration region 111 crystal Crystalline silicon region 112 Metal element high concentration region at crystal growth edge 113 Crystalline silicon film surface before oxidation 114 Oxide film 116 Low concentration metal element injection region 117 Low concentration crystalline silicon region 118 Low concentration crystal Growth end portion 119 Gate insulating film 120 Gate electrode 121 Impurity ion 122,123 Source / drain region 124 Interlayer insulating film 125 Contact hole 126,127 Source / drain electrode 200 Metal element addition window 201 Metal element addition region 202 Crystal Long direction 203 crystal growth portion 204 source region 205 channel region 206 a drain region
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 21/316 Ｙ 7352−4Ｍ Ｓ 7352−4Ｍ 29/786 21/336 (72)発明者 森田 達夫 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification number Internal reference number in the agency FI Technical indication H01L 21/316 Y 7352-4M S 7352-4M 29/786 21/336 (72) Inventor Tatsuo Morita 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Prefecture
Claims (16)
晶質シリコン膜を形成する工程と、前記工程の前または
後において、結晶化を助長する金属元素を前記非晶質シ
リコン膜の一部に選択的に導入する工程と、加熱によっ
て前記非晶質シリコン膜を前記金属元素が選択的に導入
された領域の周辺部において、基板表面に対し概略平行
な方向に結晶成長を行わせる工程と、前記工程において
結晶化した結晶性シリコン膜の表面を強制的に酸化させ
る工程と、前記結晶性シリコン膜表面の被酸化部分をエ
ッチングして除去する工程とを少なくとも有し、前記工
程における結晶性シリコン膜を素子形成領域とすること
を特徴とする半導体装置の製造方法。1. A step of forming a substantially amorphous silicon film on a substrate having an insulating surface, and a metal element for promoting crystallization is added to the amorphous silicon film before or after the step. A step of selectively introducing into a part of the amorphous silicon film, and heating is performed to perform crystal growth in a direction substantially parallel to the substrate surface in the peripheral portion of the region into which the metal element is selectively introduced. At least a step, a step of forcibly oxidizing the surface of the crystalline silicon film crystallized in the step, and a step of etching and removing an oxidized portion of the crystalline silicon film surface, A method of manufacturing a semiconductor device, comprising using a crystalline silicon film as an element formation region.
面の酸化を塩化水素ガス雰囲気中での加熱により行うこ
とを特徴とする半導体装置の製造方法。2. The method of manufacturing a semiconductor device according to claim 1, wherein the surface of the crystalline silicon film is oxidized by heating in a hydrogen chloride gas atmosphere.
面の酸化を水蒸気雰囲気中または水蒸気を含む窒素雰囲
気中での加熱により行うことを特徴とする半導体装置の
製造方法。3. The method of manufacturing a semiconductor device according to claim 1, wherein the surface of the crystalline silicon film is oxidized by heating in a steam atmosphere or a nitrogen atmosphere containing steam.
面の酸化を硝酸、亜硝酸、過マンガン酸、クロム酸、塩
素酸、次亜塩素酸などのオキソ酸の内のいずれかを用い
て行うことを特徴とする半導体装置の製造方法。4. The oxidation according to claim 1, wherein the surface of the crystalline silicon film is oxidized by using one of oxo acids such as nitric acid, nitrous acid, permanganic acid, chromic acid, chloric acid and hypochlorous acid. A method of manufacturing a semiconductor device, comprising:
面の酸化を硝酸、亜硝酸、過マンガン酸、クロム酸、塩
素酸、次亜塩素酸などのオキソ酸の内のいずれかの塩の
溶液を用いて行うことを特徴とする半導体装置の製造方
法。5. The solution of any one of oxo acids such as nitric acid, nitrous acid, permanganic acid, chromic acid, chloric acid, and hypochlorous acid for oxidizing the surface of the crystalline silicon film according to claim 1. A method of manufacturing a semiconductor device, comprising:
面の酸化を熱濃硫酸を用いて行うことを特徴とする半導
体装置の製造方法。6. The method of manufacturing a semiconductor device according to claim 1, wherein the surface of the crystalline silicon film is oxidized by using hot concentrated sulfuric acid.
面の酸化を塩素、臭素などのハロゲンガス雰囲気中での
加熱により行うことを特徴とする半導体装置の製造方
法。7. The method of manufacturing a semiconductor device according to claim 1, wherein the surface of the crystalline silicon film is oxidized by heating in an atmosphere of a halogen gas such as chlorine or bromine.
面の酸化を硝酸ガス雰囲気中での６５０℃以下の温度に
よる加熱により行うことを特徴とする半導体装置の製造
方法。8. The method of manufacturing a semiconductor device according to claim 1, wherein the surface of the crystalline silicon film is oxidized by heating at a temperature of 650 ° C. or lower in a nitric acid gas atmosphere.
面の酸化を酸素雰囲気中または酸素混合雰囲気中での６
５０℃以下の温度による加熱により行うことを特徴とす
る半導体装置の製造方法。9. The oxidation of the crystalline silicon film surface according to claim 1, wherein the oxidation is performed in an oxygen atmosphere or an oxygen mixed atmosphere.
A method for manufacturing a semiconductor device, which is performed by heating at a temperature of 50 ° C. or less.
表面の酸化をＲＦプラズマ、マイクロ波プラズマ、ＥＣ
Ｒプラズマなどのプラズマ雰囲気中での加熱により行う
ことを特徴とする半導体装置の製造方法。10. The method according to claim 1, wherein the surface of the crystalline silicon film is oxidized by RF plasma, microwave plasma or EC.
A method of manufacturing a semiconductor device, which is performed by heating in a plasma atmosphere such as R plasma.
表面の酸化を２５気圧程度の高圧のオキシダント雰囲気
中での加熱により行うことを特徴とする半導体装置の製
造方法。11. The method for manufacturing a semiconductor device according to claim 1, wherein the surface of the crystalline silicon film is oxidized by heating in a high pressure oxidant atmosphere of about 25 atm.
表面の酸化を２５気圧程度の高圧の加熱水蒸気雰囲気中
での加熱により行うことを特徴とする半導体装置の製造
方法。12. The method of manufacturing a semiconductor device according to claim 1, wherein the surface of the crystalline silicon film is oxidized by heating in a high temperature steam atmosphere of about 25 atm.
表面の酸化を紫外線照射下のＮ2 ０ガス雰囲気中での５
００℃以上の温度による加熱により行うことを特徴とす
る半導体装置の製造方法。13. The method according to claim 1, wherein the oxidation of the surface of the crystalline silicon film is performed in an N 2 0 gas atmosphere under UV irradiation.
A method of manufacturing a semiconductor device, which is performed by heating at a temperature of 00 ° C. or higher.
中のキャリアの移動する方向と、結晶成長方向とが概略
平行となるように半導体素子を構成することを特徴とす
る半導体装置の製造方法。14. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor element is configured such that a moving direction of carriers in the crystalline silicon film and a crystal growth direction are substantially parallel to each other.
中のキャリアの移動する方向と、結晶成長方向とが概略
垂直となるように半導体素子を構成することを特徴とす
る半導体装置の製造方法。15. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor element is configured such that a moving direction of carriers in the crystalline silicon film and a crystal growth direction are substantially perpendicular to each other.
ｉ、Ｃｏ、Ｐｄ、Ｐｔの中から選ばれた少なくとも一つ
の材料を用いることを特徴とする半導体装置の製造方
法。16. The N as the metal element according to claim 1.
A method of manufacturing a semiconductor device, wherein at least one material selected from i, Co, Pd, and Pt is used.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5331626A JP3041177B2 (en) | 1993-12-27 | 1993-12-27 | Method for manufacturing semiconductor device |
| TW083110986A TW279275B (en) | 1993-12-27 | 1994-11-25 | |
| US08/357,653 US5550070A (en) | 1993-12-27 | 1994-12-16 | Method for producing crystalline semiconductor film having reduced concentration of catalyst elements for crystallization and semiconductor device having the same |
| KR1019940039279A KR0156020B1 (en) | 1993-12-27 | 1994-12-27 | Ion or catalyst elements for crystallization and semiconductor device having the same |
| CN94112771A CN1045688C (en) | 1993-12-27 | 1994-12-27 | Method for producing semiconductor film and semiconductor device having the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5331626A JP3041177B2 (en) | 1993-12-27 | 1993-12-27 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07192998A true JPH07192998A (en) | 1995-07-28 |
| JP3041177B2 JP3041177B2 (en) | 2000-05-15 |
Family
ID=18245766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5331626A Expired - Fee Related JP3041177B2 (en) | 1993-12-27 | 1993-12-27 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3041177B2 (en) |
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|---|---|---|---|---|
| JPH09289168A (en) * | 1996-02-23 | 1997-11-04 | Semiconductor Energy Lab Co Ltd | Semiconductor thin film, its forming method, semiconductor device and its forming method |
| JP2001144016A (en) * | 1995-12-15 | 2001-05-25 | Semiconductor Energy Lab Co Ltd | Producing method for semiconductor device |
| US6337259B1 (en) | 1999-05-27 | 2002-01-08 | Sharp Kabushiki Kaisha | Method for fabricating semiconductor device with high quality crystalline silicon film |
| JP2004128514A (en) * | 1996-01-19 | 2004-04-22 | Semiconductor Energy Lab Co Ltd | Method of manufacturing semiconductor device |
| JP2004128515A (en) * | 1996-01-19 | 2004-04-22 | Semiconductor Energy Lab Co Ltd | Semiconductor device and its manufacturing method |
| KR100549353B1 (en) * | 1996-12-27 | 2006-06-28 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Active Matrix Display and Semiconductor Devices |
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| JP2007243216A (en) * | 1996-01-19 | 2007-09-20 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| US7372073B2 (en) | 1996-02-23 | 2008-05-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor thin film, semiconductor device and manufacturing method thereof |
| US7375401B2 (en) | 1996-02-23 | 2008-05-20 | Semiconductor Energy Laboratory Co., Ltd. | Static random access memory using thin film transistors |
| US7759681B2 (en) | 1996-12-30 | 2010-07-20 | Semiconductor Energy Laboratory Co., Ltd. | Thin film circuit |
| JP4646343B2 (en) * | 1998-11-27 | 2011-03-09 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
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-
1993
- 1993-12-27 JP JP5331626A patent/JP3041177B2/en not_active Expired - Fee Related
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001144016A (en) * | 1995-12-15 | 2001-05-25 | Semiconductor Energy Lab Co Ltd | Producing method for semiconductor device |
| JP2007243216A (en) * | 1996-01-19 | 2007-09-20 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| JP2004128514A (en) * | 1996-01-19 | 2004-04-22 | Semiconductor Energy Lab Co Ltd | Method of manufacturing semiconductor device |
| JP2004128515A (en) * | 1996-01-19 | 2004-04-22 | Semiconductor Energy Lab Co Ltd | Semiconductor device and its manufacturing method |
| US7372073B2 (en) | 1996-02-23 | 2008-05-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor thin film, semiconductor device and manufacturing method thereof |
| JPH09289168A (en) * | 1996-02-23 | 1997-11-04 | Semiconductor Energy Lab Co Ltd | Semiconductor thin film, its forming method, semiconductor device and its forming method |
| US7375401B2 (en) | 1996-02-23 | 2008-05-20 | Semiconductor Energy Laboratory Co., Ltd. | Static random access memory using thin film transistors |
| US8368142B2 (en) | 1996-10-15 | 2013-02-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of manufacturing the same |
| KR100549353B1 (en) * | 1996-12-27 | 2006-06-28 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Active Matrix Display and Semiconductor Devices |
| US7759681B2 (en) | 1996-12-30 | 2010-07-20 | Semiconductor Energy Laboratory Co., Ltd. | Thin film circuit |
| JP4646343B2 (en) * | 1998-11-27 | 2011-03-09 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
| KR100372841B1 (en) * | 1999-05-27 | 2003-02-19 | 샤프 가부시키가이샤 | Method for fabricating semiconductor device with high quality crystalline silicon film |
| US6337259B1 (en) | 1999-05-27 | 2002-01-08 | Sharp Kabushiki Kaisha | Method for fabricating semiconductor device with high quality crystalline silicon film |
| JP2006216969A (en) * | 2006-02-16 | 2006-08-17 | Semiconductor Energy Lab Co Ltd | Semiconductor device and its fabrication process |
| US8507917B2 (en) | 2010-09-03 | 2013-08-13 | Samsung Display Co., Ltd. | Thin film transistor, method for manufacturing the same, and display device using the same |
| JP2013012566A (en) * | 2011-06-29 | 2013-01-17 | Kyocera Corp | Method of forming oxide film, method of manufacturing semiconductor device, semiconductor device, and formation device for oxide film |
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