JPH07183487A - Very small vacuum tube and its manufacture - Google Patents
Very small vacuum tube and its manufactureInfo
- Publication number
- JPH07183487A JPH07183487A JP32441493A JP32441493A JPH07183487A JP H07183487 A JPH07183487 A JP H07183487A JP 32441493 A JP32441493 A JP 32441493A JP 32441493 A JP32441493 A JP 32441493A JP H07183487 A JPH07183487 A JP H07183487A
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、微小真空管およびその
製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a micro vacuum tube and its manufacturing method.
【０００２】[0002]
【従来の技術】真空マイクロエレクトロニクスの分野に
おいて近年発達した半導体加工技術を応用して製造され
る電界放出型冷陰極を用いた微小真空管の開発が盛んに
行なわれている。2. Description of the Related Art In the field of vacuum microelectronics, a micro vacuum tube using a field emission type cold cathode manufactured by applying a semiconductor processing technology developed in recent years has been actively developed.
【０００３】その代表的な一例として、例えばＣ．Ａ．
Ｓｐｉｎｔらにより、Journal of Applied Pysics,Vol.
47,5248(1976) に公開された技術が一般に知られてい
る。As a typical example thereof, for example, C.I. A.
Spint et al., Journal of Applied Pysics, Vol.
The technology disclosed in 47,5248 (1976) is generally known.
【０００４】その微小真空管の電界放出型冷陰極は、図
４に示すように、Ｓｉ単結晶基板２０１上にＳｉＯ2 層
２０３を例えばＣＶＤのような堆積法で形成し、その上
にゲート電極となるＭｏ層２０５および犠牲層となるＡ
ｌ層２０７をスパッタリング法および斜め蒸着法などに
より形成した後、直径が例えば 1.5μｍ程度の開口２１
１をエッチング法などにより穿設し、エミッタ２１３と
なる材料、例えばＭｏのような金属を、Ｓｉ単結晶基板
２０１全体を回転させながらそのＳｉ単結晶基板２０１
に対する垂直方向から真空蒸着させることで、前記の開
口２１１に円錐型に金属（Ｍｏ）が堆積してゆきエミッ
タ２１３が形成される。またその一方で前記の犠牲層２
０７上にも徐々に金属（Ｍｏ）が堆積するために前記の
開口２１１がエミッタ２１３の形成とともに塞がってゆ
き、開口２１１が完全に塞がれてエミッタ２１３の形成
が終了する。その後、堆積した金属（Ｍｏ）膜および犠
牲層２０７等を除去してそのゲート電極層２０５を露出
させて、円錐型のエミッタ２１３を有する電界放出型冷
陰極が形成される。そして、図５に示すように冷陰極４
００に所定の距離を置きながら対向するようにアノード
４０１が配設されて、従来の微小真空管４０３の主要部
分が形成されていた。図５中、４０５はゲート電極層、
４０７はそのゲート電極層４０５上にアノード４０１を
支持する支持材、４０９はアノード４０１とゲート電極
層４０５との間隙を適性に保持するスペーサ、４００は
チューブ状の冷陰極（エミッタ）である。The field emission type cold cathode of the micro vacuum tube is, as shown in FIG. 4, formed by forming a SiO 2 layer 203 on a Si single crystal substrate 201 by a deposition method such as CVD, and forming a gate electrode thereon. Mo layer 205 to be formed and A to be a sacrificial layer
1 layer 207 is formed by a sputtering method, an oblique vapor deposition method, or the like, and then an opening 21 having a diameter of, for example, about 1.5 μm is formed.
1 is formed by an etching method or the like, and a material to be the emitter 213, for example, a metal such as Mo is rotated while rotating the entire Si single crystal substrate 201.
By vacuum evaporation from the direction perpendicular to the direction, a conical metal (Mo) is deposited in the opening 211 to form the emitter 213. On the other hand, the sacrificial layer 2
Since metal (Mo) is gradually deposited on 07 as well, the opening 211 is closed as the emitter 213 is formed, and the opening 211 is completely closed to complete the formation of the emitter 213. Then, the deposited metal (Mo) film, the sacrificial layer 207, and the like are removed to expose the gate electrode layer 205, thereby forming a field emission cold cathode having a conical emitter 213. Then, as shown in FIG.
The anodes 401 were arranged so as to face each other with a predetermined distance from 00, and the main part of the conventional micro vacuum tube 403 was formed. In FIG. 5, 405 is a gate electrode layer,
Reference numeral 407 is a support material that supports the anode 401 on the gate electrode layer 405, 409 is a spacer that appropriately maintains the gap between the anode 401 and the gate electrode layer 405, and 400 is a tubular cold cathode (emitter).
【０００５】また、上記の他にも、応用物理vol.59,p16
4(1990) に公開された技術がある。これは、図６に示す
ように、Ｓｉ基板５０１を異方性エッチングを用いて加
工してエミッタ５０３を形成し、さらにエミッタ層５０
５上に絶縁層５０７、ゲート電極層５０９、絶縁層５１
１、アノード５１３をこの順で積層形成し、これらに開
口を開けてエミッタ５０３を露出させた構造のものであ
る。In addition to the above, applied physics vol.59, p16
There is a technology published in 4 (1990). As shown in FIG. 6, the Si substrate 501 is processed using anisotropic etching to form the emitter 503, and the emitter layer 50 is further formed.
5, the insulating layer 507, the gate electrode layer 509, and the insulating layer 51.
1 and the anode 513 are laminated in this order, and an opening is opened in these to expose the emitter 503.
【０００６】その製造工程を詳細に図６（ａ）〜（ｅ）
に示す。まず（ａ）に示すように、Ｓｉ基板５０１上に
ＳｉＮ膜５１５を約 4μｍの厚さにスパッタ法で堆積
し、フォトレジスト５１７およびＳＦ6 を用いたＲＩＥ
（Reactive Ion Etching）法によりエッチングマスク５
１９を形成する。そして異方性エッチング液（ただし僅
かにサイドエッチングが生じるようにエッチングファク
タを調節する）を用いて、エッチングマスク５１９の下
のＳｉ基板５０１にまでエッチングが回り込むようにア
ンダーエッチング（アンダーカット）し、先端部が尖鋭
な錐状の***部を形成して、この先端部が尖鋭な***部
をエミッタ５０３として有するエミッタ層５０５を形成
する。そしてエミッタ層５０５上に、ＳｉＯ2 層とＴａ
層とをこの順に交互に 2回続けて蒸着して、絶縁層５０
７、ゲート電極層５０９、絶縁層５１１、アノード５１
３をこの順で積層形成する。そして最後に、エミッタ５
０３上に残っているエッチングマスク５１９およびフォ
トレジスト５１７を例えば超音波洗浄などにより除去
（剥離）し、さらに前記の異方性エッチング液および弗
酸などを用いて軽いエッチングを行なってエミッタ５０
３の最終加工および残渣などとしてその上に残っている
絶縁物等を除去して、微小真空管を得ていた。The manufacturing process is shown in detail in FIGS.
Shown in. First, as shown in (a), a SiN film 515 is deposited on a Si substrate 501 to a thickness of about 4 μm by a sputtering method, and RIE using a photoresist 517 and SF 6 is performed.
Etching mask 5 by (Reactive Ion Etching) method
19 is formed. Then, using an anisotropic etching solution (however, the etching factor is adjusted so that side etching slightly occurs), under-etching (undercut) is performed so that the etching reaches around the Si substrate 501 under the etching mask 519, The tip forms a sharp pyramidal ridge, and the emitter layer 505 having the tip has a sharp ridge as the emitter 503 is formed. Then, on the emitter layer 505, a SiO 2 layer and Ta are formed.
Layer and the insulating layer 50 are deposited in this order alternately twice in succession.
7, gate electrode layer 509, insulating layer 511, anode 51
3 is laminated in this order. And finally, the emitter 5
The etching mask 519 and the photoresist 517 remaining on 03 are removed (peeled) by, for example, ultrasonic cleaning, and then light etching is performed using the anisotropic etching solution and hydrofluoric acid, and the emitter 50 is removed.
The micro vacuum tube was obtained by removing the insulating material and the like remaining on the final processing of 3 and the residue.
【０００７】[0007]
【発明が解決しようとする課題】しかしながら、上記の
ような従来の微小真空管の構造およびその製造方法にお
いては、主に下記のような問題がある。However, the above-mentioned conventional structure of the micro vacuum tube and the manufacturing method thereof have the following problems.
【０００８】まず、従来の回転蒸着法により形成される
微小真空管の場合、Ｓｉ単結晶基板２０１全体を回転さ
せながら開口２１１に円錐型に金属を堆積させている
が、このときエミッタ２１３の形成の制御は前記の開口
２１１が塞がることを利用して行なっているため、エミ
ッタ２１３の先端部の形状や、エミッタ２１３の高さな
どの寸法などの正確な制御が極めて困難で、出来上がっ
たエミッタ２１３の形状や高さなどの特性が大きくばら
ついてしまい形状再現性が悪いために製造歩留まりが低
い。特に多数の同一形状の電界放出型冷陰極を同一基板
上に列設する場合などに製造コストが著しく増加すると
いう問題がある。First, in the case of the micro vacuum tube formed by the conventional rotary evaporation method, the conical metal is deposited in the opening 211 while rotating the entire Si single crystal substrate 201. At this time, the emitter 213 is formed. Since the control is performed by utilizing the fact that the opening 211 is closed, it is extremely difficult to accurately control the shape of the tip of the emitter 213 and the dimensions such as the height of the emitter 213. The manufacturing yield is low because the characteristics such as shape and height vary greatly and the shape reproducibility is poor. In particular, when a large number of field emission cold cathodes having the same shape are arranged in a row on the same substrate, there is a problem that the manufacturing cost significantly increases.
【０００９】しかもそのようにエミッタ２１３の形状や
寸法などの特性が大きくばらつくために電界放出の均一
性が低いうえに、電界放出の際に必要なエミッタ２１３
の先端部の鋭さに欠けるため電界放出効率が低く、消費
電力の増大をもたらすという問題がある。Moreover, since the characteristics such as the shape and size of the emitter 213 vary greatly, the uniformity of the field emission is low, and the emitter 213 necessary for the field emission is required.
Since the sharpness of the tip portion of the is low, the field emission efficiency is low, resulting in an increase in power consumption.
【００１０】また、ＳｉＯ2 層２０３をＣＶＤ法などに
より厚く堆積して形成しその上にゲート電極層２０５を
形成しており、しかもさらにその上にＭｏのようなエミ
ッタ２１３を形成する際に用いる金属を一旦堆積した後
に除去しているので、電界放出効率を決定する主要素で
あるゲート−エミッタ間の距離を正確に制御することが
困難であり、その電界放出型冷陰極の電界放出効率に大
きくばらつきが生じる結果、微小真空管としての動作特
性にばらつきが生じるという問題がある。これは異方性
エッチングで形成されたエミッタ５０３を備えた微小真
空管の場合にも同様である。Further, a SiO 2 layer 203 is deposited thickly by a CVD method or the like to form a gate electrode layer 205 on the SiO 2 layer 203, and further used to form an emitter 213 such as Mo on the gate electrode layer 205. Since the metal is deposited and then removed, it is difficult to accurately control the distance between the gate and the emitter, which is the main factor that determines the field emission efficiency, and the field emission efficiency of the field emission cold cathode is reduced. As a result of the large variation, there is a problem that the operating characteristics of the micro vacuum tube vary. This also applies to a micro vacuum tube having an emitter 503 formed by anisotropic etching.
【００１１】また、回転蒸着法により形成される従来の
微小真空管の場合、図５に示すようにアノード４０１を
配置すれば真空筐体に匹敵する強度を持たせることがで
きるが、スペーサ４０９をアノード４０１とゲート電極
層４０５との間に介挿してそれらの間隙を保持する必要
がある。このときスペーサ４０９としては一般にガラス
ビースが用いられるが、前記間隙を正確な距離に保持す
るためには、このガラスビースのような材料からなるス
ペーサ４０９の直径を正確かつ均一に揃えることが必要
だが、このようなスペーサ４０９の直径の制御は実用上
スペーサ４０９を多数使用するため困難かつ煩雑であ
る。また製造時にスペーサ４０９がゲート電極層４０５
の開孔を塞いでしまい、動作不良が生じるという問題も
ある。Further, in the case of the conventional micro vacuum tube formed by the rotary evaporation method, if the anode 401 is arranged as shown in FIG. 5, it is possible to have the strength comparable to that of the vacuum casing, but the spacer 409 is used as the anode. It is necessary to interpose between 401 and the gate electrode layer 405 to maintain the gap therebetween. At this time, glass beads are generally used as the spacers 409, but in order to keep the gap at an accurate distance, it is necessary to make the diameters of the spacers 409 made of a material such as glass beads accurate and uniform. It is difficult and complicated to control the diameter of the spacer 409 in practice because a large number of spacers 409 are used in practice. In addition, the spacer 409 is used as the gate electrode layer 405 during manufacturing.
However, there is also a problem that the operation failure occurs due to blocking the opening of the.
【００１２】また、特に異方性エッチングを用いた従来
の微小真空管の場合では、上記の回転蒸着法と比較して
エミッタ５０３の先端部を尖鋭に形成可能でその形状の
均一性も向上すると理論的には考えられるが、実際上は
エミッタ５０３形成のためのアンダーカットの制御、つ
まりエッチングファクタの制御が極めて困難かつ煩雑で
あり、またエッチングマスク５１９の剥離のばらつきが
大きくなるという問題がある。また、上記のエミッタ５
０３およびエミッタ層５０１の材料としては仕事関数の
値が小さく物理化学的に安定で、なおかつ異方性エッチ
ングによる形状再現性の良好な材料が好ましいが、この
ような条件に対してはＳｉ基板は不十分な材料であると
いう問題がある。Further, in particular, in the case of a conventional micro vacuum tube using anisotropic etching, the tip of the emitter 503 can be formed sharper and the shape uniformity can be improved as compared with the above rotary evaporation method. However, in practice, it is extremely difficult and complicated to control the undercut for forming the emitter 503, that is, the control of the etching factor, and there is a problem that the variation of the peeling of the etching mask 519 becomes large. In addition, the above-mentioned emitter 5
03 and the material for the emitter layer 501 are preferably materials having a small work function value, stable physicochemically, and good shape reproducibility by anisotropic etching. There is a problem that it is an insufficient material.
【００１３】また、異方性エッチングを用いた従来の微
小真空管の場合、エミッタ５０３の先端の直上にはアノ
ードは対面しておらず、エミッタ５０３の尖鋭な先端か
ら斜め方向にゲート電極層５０９およびアノード５１３
が配置されており、しかもエミッタ５０３先端からアノ
ード５１３の露出端面までの距離の方が、エミッタ５０
３先端からゲート電極層５０９の露出端面までの距離よ
りも遠い。従って、エミッタ５０３の先端から放出され
る電子が、ゲート電極層５０９の露出端面にトラップさ
れることなく効果的に加速されてアノード５１３へと到
達する確率が高くなるような電界分布を与えることが困
難である。つまり、アノード５１３へと到達する電流有
効利用率が低いという問題がある。In the case of the conventional micro vacuum tube using anisotropic etching, the anode does not face directly above the tip of the emitter 503, and the gate electrode layer 509 and the gate electrode layer 509 are formed diagonally from the sharp tip of the emitter 503. Anode 513
And the distance from the tip of the emitter 503 to the exposed end surface of the anode 513 is
3 is longer than the distance from the tip to the exposed end surface of the gate electrode layer 509. Therefore, electrons emitted from the tip of the emitter 503 can be effectively accelerated without being trapped on the exposed end surface of the gate electrode layer 509, and a field distribution can be provided to increase the probability of reaching the anode 513. Have difficulty. That is, there is a problem that the effective utilization factor of the electric current reaching the anode 513 is low.
【００１４】また、図６からも明らかなように基板にエ
ミッタが露出する開孔が開いているため、微小真空管と
して真空筐体化するためには、例えばガラス容器で少な
くとも開口部を覆って真空封止する等のパッケージング
（実装）が必要となり、微小真空管としての小型化や構
造の簡潔化の妨げとなるという問題がある。Further, as is apparent from FIG. 6, since the substrate has an opening through which the emitter is exposed, in order to form a vacuum casing as a micro vacuum tube, for example, a glass container is used to cover at least the opening portion to form a vacuum. There is a problem that packaging (mounting) such as sealing is required, which hinders miniaturization as a micro vacuum tube and simplification of structure.
【００１５】本発明は、このような問題を解決するため
に成されたもので、その目的は、電界放出効率が高く、
エミッタ形状の均一性に優れており、微小真空管として
の小型化や構造の簡潔化が可能で、しかも高歩留まりで
製作することのできる生産性に富んだ微小真空管を提供
することにある。The present invention has been made to solve such a problem, and an object thereof is to have a high field emission efficiency,
It is an object of the present invention to provide a micro vacuum tube which is excellent in the uniformity of the emitter shape, can be miniaturized as a micro vacuum tube, can be simplified in structure, and can be manufactured with a high yield, and is highly productive.
【００１６】[0016]
【課題を解決するための手段】上記課題を解決するため
に、本発明の微小真空管は、先端部が尖った***部を一
部に備えたエミッタ層と、前記エミッタ層上に形成さ
れ、前記エミッタ層の***部が露出するように開孔が穿
設された、前記エミッタ層の前記***部よりも厚い板厚
を有する基板と、前記基板上に前記エミッタ層と対向し
て形成され、前記基板によって支持されたアノード層と
を具備することを特徴としている。In order to solve the above-mentioned problems, a micro vacuum tube of the present invention comprises an emitter layer having a ridge having a sharp tip, and is formed on the emitter layer. A substrate having a plate thickness thicker than the raised portion of the emitter layer, in which an opening is formed so that the raised portion of the emitter layer is exposed; and a substrate formed on the substrate so as to face the emitter layer, And an anode layer supported by the substrate.
【００１７】また、上記の微小真空管において、前記基
板に前記開孔が複数個穿設され、該開孔ごとにエミッタ
が形成され、前記複数個のエミッタの先端部それぞれと
対向するように前記アノード層が配置されて、前記微小
真空管が前記基板に複数個形成されていることを特徴と
している。Further, in the above-mentioned micro vacuum tube, a plurality of the holes are bored in the substrate, an emitter is formed in each of the holes, and the anode is arranged so as to face each tip of the plurality of emitters. It is characterized in that layers are arranged and a plurality of the micro vacuum tubes are formed on the substrate.
【００１８】また、その製造方法は、少なくとも底部先
端が尖鋭に窪んだ形状の凹部を基板の第１主面側に刻設
する工程と、前記凹部を含む前記基板の第１主面側に、
前記凹部に沿った少なくとも底部先端が尖鋭に窪んだ形
状の凹部を備えた絶縁層を形成する工程と、前記基板の
凹部に対応する位置に前記第１主面側とは反対側の第２
主面側から開孔を穿設し、該開孔から前記絶縁層の凹部
の第２主面側を凸状に露出させるとともに、前記絶縁層
の前記第１主面側の凹部を埋めつつ前記絶縁層の第一主
面側の面上にエミッタ層材料を形成し、前記絶縁層の前
記第１主面側の凹部に沿って先端部に尖鋭なエミッタを
備えた形状の***部を有するエミッタ層を形成する工程
と、前記基板の第２主面側によって支持されて、前記エ
ミッタ層の先端部と対向するように、アノード層を配置
する工程とを含むことを特徴としている。Further, in the manufacturing method thereof, a step of engraving a recess having a sharply recessed bottom end at least on the first main surface side of the substrate, and a step of forming the recess on the first main surface side of the substrate including the recess,
A step of forming an insulating layer provided with a concave portion having a shape in which at least a bottom end is sharply recessed along the concave portion; and a second side opposite to the first main surface side at a position corresponding to the concave portion of the substrate.
An opening is formed from the main surface side, the second main surface side of the concave portion of the insulating layer is exposed in a convex shape from the opening, and the concave portion on the first main surface side of the insulating layer is filled with An emitter having an emitter layer material formed on the surface of the insulating layer on the side of the first main surface and having a ridge having a shape with a sharp emitter at the tip along the recess on the side of the first main surface of the insulating layer. It is characterized by including a step of forming a layer and a step of disposing the anode layer so as to be supported by the second main surface side of the substrate and to face the tip end portion of the emitter layer.
【００１９】なお、前記のエミッタの形状としては、先
端部が尖鋭な形状であればよく、例えば四角錐や円錐、
あるいは紡錘型などに形成してもよい。そしてこのとき
前記のゲート電極層は尖鋭なエミッタを備えた***部の
表面形状にほぼ平行に沿って、エミッタとの間に距離を
おいて非接触に対面してエミッタ先端を包囲するように
形成することが望ましい。そしてこのエミッタ先端を露
出させる開口を形成するとともに、そのエミッタ先端以
外の***部を含めたエミッタ層の大部分は前記の絶縁層
で被覆してもよく、あるいはエミッタ先端だけでなくエ
ミッタが先端に形成された***部ほぼ全体を露出させる
ように形成してもよい。このような細部の設定は、本発
明に係る微小真空管が用いられる際に要求される諸特性
に適合するように、適宜ゲート電極とエミッタの先端部
との間の距離やエミッタの形状や寸法などの諸条件を勘
案して設定すればよい。The emitter may have any shape as long as its tip is sharp, such as a quadrangular pyramid or a cone.
Alternatively, it may be formed in a spindle shape or the like. Then, at this time, the gate electrode layer is formed so as to face the emitter tip in a non-contact manner at a distance from the emitter along substantially parallel to the surface shape of the ridge having the sharp emitter. It is desirable to do. Then, while forming an opening for exposing the emitter tip, most of the emitter layer including the raised portion other than the emitter tip may be covered with the above-mentioned insulating layer, or not only the emitter tip but also the emitter tip may be covered. It may be formed so as to expose almost the entire formed protrusion. Such fine settings are appropriately set such that the distance between the gate electrode and the tip of the emitter, the shape and size of the emitter, and the like are adjusted so as to meet various characteristics required when the micro vacuum tube according to the present invention is used. It may be set in consideration of various conditions.
【００２０】また、前記の絶縁層は、例えばシリコン単
結晶基板の表面を熱酸化して形成してもよく、あるいは
その他の方法により形成してもよい。特に熱酸化法で絶
縁層を形成すれば、その絶縁層の凹部の底部先端は好適
な尖鋭形状になるので、それにより得られるエミッタの
先端部も好適な尖鋭形状となり、電界集中効果を飛躍的
に高くすることができるので好ましい。また熱酸化法に
よれば一般的な半導体製造工程等とのプロセス整合性や
工程の簡易化を図ることもできるので、好ましい。The insulating layer may be formed, for example, by thermally oxidizing the surface of the silicon single crystal substrate, or may be formed by another method. In particular, when the insulating layer is formed by the thermal oxidation method, the tip of the bottom of the recess of the insulating layer has a suitable sharp shape, and the tip of the resulting emitter also has a suitable sharp shape, which dramatically improves the electric field concentration effect. It is preferable because it can be made extremely high. Further, the thermal oxidation method is preferable because it can achieve process consistency with a general semiconductor manufacturing process or the like and simplification of the process.
【００２１】また、アノードとエミッタの先端部との距
離やアノードの形状等は、微小真空管として要求される
諸特性に適合するように適宜に設定すればよい。Further, the distance between the anode and the tip of the emitter, the shape of the anode, etc. may be appropriately set so as to meet various characteristics required for the micro vacuum tube.
【００２２】[0022]
【作用】本発明によれば、エミッタの形成を従来の回転
堆積法とは異なり異方性エッチングなどのフォトリソグ
ラフィ工程で基板に正確な形状に（例えば錐状に）形成
した凹部に沿って形成された絶縁層を原型として用い
て、これにエミッタ層の材料を充填することにより形成
することができるので、エミッタを前記の尖鋭な錐状に
正確な寸法で形成することができる。このとき、絶縁層
を熱酸化法で形成することにより絶縁層の錐状部分の先
端は極めて好適な尖鋭形状になるので、それに沿って形
成されるエミッタの先端部も極めて好適な尖鋭形状とな
り、電界集中効果を飛躍的に高くすることができる。ま
た熱酸化法は一般的な半導体製造工程等とのプロセス整
合性が良好で、製造工程の簡易化を図ることもできる。According to the present invention, unlike the conventional rotary deposition method, the emitter is formed along the recess formed in the substrate by the photolithography process such as anisotropic etching in a precise shape (for example, a cone shape). Since the formed insulating layer can be used as a prototype and is filled with the material of the emitter layer, the emitter can be formed in the above-mentioned sharp conical shape with accurate dimensions. At this time, the tip of the pyramidal portion of the insulating layer has a very suitable sharp shape by forming the insulating layer by the thermal oxidation method, so that the tip of the emitter formed along it also has a very suitable sharp shape, The electric field concentration effect can be dramatically increased. Further, the thermal oxidation method has good process compatibility with a general semiconductor manufacturing process and the like, and the manufacturing process can be simplified.
【００２３】また、本発明に係る微小真空管におけるア
ノードは、エミッタが形成された基板の開孔部分でエミ
ッタの先端部と対面するように設置されているので、エ
ミッタの先端から放出される電子が、ゲート電極層の露
出端面にトラップされることなく効果的に加速されてア
ノードへと到達する確率が高くなるような電界分布を与
えることができ、アノードへと到達する電子の確率を飛
躍的に向上して、電流有効利用率を向上することができ
る。Further, since the anode in the micro vacuum tube according to the present invention is installed so as to face the tip of the emitter at the opening portion of the substrate in which the emitter is formed, the electrons emitted from the tip of the emitter are , It is possible to give an electric field distribution that effectively accelerates the probability of reaching the anode without being trapped on the exposed end surface of the gate electrode layer, and the probability of electrons reaching the anode is dramatically increased. As a result, the effective current utilization rate can be improved.
【００２４】また、例えば板体状のアノードを、第３の
絶縁膜等を介して基板の第２主面上に載置し、その基板
をアノードの支持材料として用いるとともにエミッタが
露出する基板の開孔を塞ぐシール蓋材としても兼用する
ことができる。これにより、アノード自体をシール蓋材
として用いて真空筐体を小型で簡易な構造に形成するこ
とができる。Further, for example, a plate-shaped anode is placed on the second main surface of the substrate via a third insulating film or the like, the substrate is used as a supporting material of the anode, and the emitter is exposed. It can also be used as a seal lid member for closing the opening. As a result, the anode itself can be used as a seal lid member to form a vacuum housing having a small size and a simple structure.
【００２５】また、本発明によれば、基板の板厚と第２
の絶縁膜の膜厚とゲート電極層の膜厚と第３の絶縁膜の
膜厚との合計と、エミッタ先端部を有する***部のエミ
ッタ層平面からの高さとの差が、アノードとエミッタの
先端部との距離となる。従って、前記の基板の板厚ある
いは第３の絶縁層などの厚さを適宜に設定することによ
り、所望のアノードとエミッタの先端部との距離を正確
に得ることができ、微小真空管として要求される諸特性
に対して煩雑なプロセス制御等を必要とせずに簡易に適
合させることができる。According to the present invention, the board thickness and the second
The difference between the sum of the film thickness of the insulating film, the film thickness of the gate electrode layer and the film thickness of the third insulating film, and the height of the ridge having the emitter tip from the plane of the emitter layer is the difference between the anode and the emitter. It is the distance from the tip. Therefore, by appropriately setting the plate thickness of the substrate or the thickness of the third insulating layer or the like, the desired distance between the anode and the tip of the emitter can be accurately obtained, which is required as a micro vacuum tube. It can be easily adapted to various characteristics without requiring complicated process control.
【００２６】上記の結果、電界放出効率が高くかつその
動作特性のばらつきが極めて少ない均一な特性を有し、
小型でしかも簡易な構造の生産性に富んだ微小真空管お
よびその製造方法を提供することができる。As a result of the above, the field emission efficiency is high, and the operating characteristics thereof are extremely uniform and have uniform characteristics.
It is possible to provide a small vacuum tube with a simple structure and a high productivity and a manufacturing method thereof.
【００２７】また、上記のような構造の本発明ら係る微
小真空管は、一枚の基板に複数個の開孔を穿設し、その
一つ一つに 1個ずつエミッタおよびゲート電極等を形成
して、一枚の基板で複数個形成してもよい。このときア
ノードは各 1個のエミッタごとに個別に配置してもよ
く、あるいは例えば板体状の一枚のアノードを前記の複
数個のエミッタと対向するように配置してもよい。この
ようにすれば、複数のエミッタに正確な配置精度で対向
したアノードを簡易に形成することができる。In the micro vacuum tube of the present invention having the above structure, a plurality of openings are formed in one substrate, and an emitter and a gate electrode are formed in each of the openings. Then, a plurality of substrates may be formed on one substrate. At this time, the anode may be individually arranged for each one emitter, or for example, one plate-shaped anode may be arranged so as to face the plurality of emitters. By doing so, it is possible to easily form the anode facing the plurality of emitters with accurate placement accuracy.
【００２８】あるいは、一枚の基板に微小真空管を複数
個形成した後、これら一つ一つをダイシングして（切り
離して）、単体の微小真空管を複数個得ることもできる
ことは言うまでもない。このようにすれば、動作特性の
均一性に優れた微小真空管を安定して得ることができ
る。Alternatively, it goes without saying that a plurality of micro vacuum tubes can be obtained by forming a plurality of micro vacuum tubes on one substrate and then dicing (separating) each of these micro vacuum tubes. By doing so, it is possible to stably obtain a micro vacuum tube having excellent uniformity of operating characteristics.
【００２９】[0029]
【実施例】以下、本発明に係る微小真空管およびその製
造方法の実施例を、図面に基づいて詳細に説明する。Embodiments of the micro vacuum tube and the method of manufacturing the same according to the present invention will be described below in detail with reference to the drawings.
【００３０】図１および図２は、本発明に係る微小真空
管の主要部の構造およびその製造方法を示す図である。
本発明の微小真空管の主要部の構造は以下のように形成
される。1 and 2 are views showing the structure of a main part of a micro vacuum tube according to the present invention and a manufacturing method thereof.
The structure of the main part of the micro vacuum tube of the present invention is formed as follows.
【００３１】シリコン（Ｓｉ）単結晶からなる基板１の
第１主面３側に底部が錐状に尖鋭に窪んだ形状の凹部５
を刻設する。このような凹部５を刻設する好適な方法と
しては例えば次に示すような異方性エッチングを用いる
方法がある。まず、図１（ａ）に示すように、ｐ型で結
晶面方位のシリコン単結晶基板１の第１主面３側に厚さ
0.1μｍのＳｉＯ2 熱酸化層７をドライ酸化法により形
成しさらにレジスト９をスピンコート法により塗布す
る。On the side of the first main surface 3 of the substrate 1 made of silicon (Si) single crystal, a concave portion 5 having a bottom that is sharply recessed into a conical shape.
Engrave. As a suitable method for engraving such a recess 5, for example, there is a method using anisotropic etching as described below. First, as shown in FIG. 1A, the thickness of the p-type silicon single crystal substrate 1 having a crystal plane orientation on the side of the first main surface 3 is increased.
A 0.1 μm SiO 2 thermal oxide layer 7 is formed by a dry oxidation method, and a resist 9 is applied by a spin coating method.
【００３２】続いて図１（ｂ）に示すように、例えばス
テッパを用いてレジストに 1μｍ角の正方形の開口パタ
ーンを露光しこれを現像して 1μｍ角の正方形の開口の
レジストパターンを形成する。そしてＮＨ4 Ｆ・ＨＦ混
合溶液をエッチャントとして用いてＳｉＯ2 熱酸化層７
をエッチングして開口１１を穿設する。そしてレジスト
９を剥離する。Then, as shown in FIG. 1B, a resist is exposed with a 1 μm square square opening pattern by using, for example, a stepper, and this is developed to form a 1 μm square square resist pattern. Then, using a mixed solution of NH 4 F and HF as an etchant, the SiO 2 thermal oxide layer 7 is formed.
Is etched to form the opening 11. Then, the resist 9 is peeled off.
【００３３】続いてＳｉＯ2 熱酸化層７をマスクとして
用いるとともに30ｗｔ％のＫＯＨ水溶液をエッチャント
として用いて異方性エッチングを行ない、図１（ｃ）に
示すような底部が錐状に尖鋭に窪んだいわゆる逆ピラミ
ッド型の形状で深さが0.71μｍの凹部５をシリコン単結
晶基板の第１主面３側から刻設する。Subsequently, anisotropic etching was performed using the SiO 2 thermal oxide layer 7 as a mask and a 30 wt% KOH aqueous solution as an etchant, and the bottom was sharply dented into a conical shape as shown in FIG. 1 (c). A recess 5 having a so-called inverted pyramid shape and a depth of 0.71 μm is formed from the first main surface 3 side of the silicon single crystal substrate.
【００３４】そしてＮＨ4 Ｆ・ＨＦ混合溶液を用いて前
記のＳｉＯ2 熱酸化層７を除去した後、図１（ｄ）に示
すように凹部５を含む基板１の第１主面３に第１の絶縁
層１３を形成する。この第１の絶縁層１３は、本実施例
では基板１の第１主面３表層をウエット酸化法により酸
化することで、厚さ 0.3μｍのＳｉＯ2 熱酸化膜として
形成した。このように第１の絶縁層１３を熱酸化法で形
成することにより、第１の絶縁層１３の凹部５先端部は
極めて好適な尖鋭形状になるので、それにより後工程で
得られるエミッタ（後述）の先端部も極めて好適な尖鋭
形状となり、電界集中効果を向上することができるので
好ましい。また熱酸化法によれば一般的な半導体製造工
程等とのプロセス整合性や工程の簡易化を図ることもで
きるので好ましい。Then, after removing the SiO 2 thermal oxide layer 7 using a mixed solution of NH 4 F and HF, as shown in FIG. 1D, the first main surface 3 of the substrate 1 including the concave portion 5 is exposed. The first insulating layer 13 is formed. In this embodiment, the first insulating layer 13 was formed as a SiO 2 thermal oxide film having a thickness of 0.3 μm by oxidizing the surface layer of the first main surface 3 of the substrate 1 by the wet oxidation method. By thus forming the first insulating layer 13 by the thermal oxidation method, the tip of the concave portion 5 of the first insulating layer 13 has a very suitable sharp shape, so that an emitter (to be described later) obtained in a later step can be obtained. The tip part of (1) also has an extremely suitable sharpened shape, and the electric field concentration effect can be improved, which is preferable. Further, the thermal oxidation method is preferable because it can achieve process consistency with a general semiconductor manufacturing process or the like and simplification of the process.
【００３５】続いて、図１（ｅ）に示すように、基板１
の凹部５に対応する位置に第１主面３側とは反対の第２
主面１５側から開孔１７を穿設し、この開孔１７から第
１の絶縁層１３の第２主面１５側の錐状部分１９を露出
させる。この開孔１７は、例えば基板１の第２主面１５
側にレジストを塗布して前記の凹部５に対応する位置に
開孔１７のパターンを形成し、このレジストパターンを
用いて基板１をリアクティブイオンエッチング（ＲＩ
Ｅ）により第２主面１５側からエッチングすることによ
り形成する。このエッチングは開孔１７から第１の絶縁
層１３の第２主面１５側の錐状部分１９が露出するまで
行なう。Subsequently, as shown in FIG. 1 (e), the substrate 1
At a position corresponding to the recess 5 of the second main surface 3 opposite to the second main surface 3 side.
An opening 17 is bored from the main surface 15 side, and a conical portion 19 of the first insulating layer 13 on the second main surface 15 side is exposed from the opening 17. This opening 17 is, for example, the second main surface 15 of the substrate 1.
A resist is applied to the side to form a pattern of openings 17 at the position corresponding to the recess 5, and the substrate 1 is subjected to reactive ion etching (RI) using this resist pattern.
It is formed by etching from the second main surface 15 side according to E). This etching is performed until the conical portion 19 on the second main surface 15 side of the first insulating layer 13 is exposed from the opening 17.
【００３６】続いて前記のレジストを剥離した後、図２
（ｆ）に示すように、基板１の第２主面１５側の表面お
よび開孔１７の側壁２１に熱酸化を施して層厚約 0.2μ
ｍのＳｉＯ2 熱酸化層として第２の絶縁層２３を形成す
る。そして第１の絶縁層１３の第１主面３側の形状に沿
って先端部が錐状に尖鋭なエミッタ２５を有するエミッ
タ層２７を形成する。本実施例ではこのエミッタ層２７
は、タングステン（Ｗ）をスパッタ法により厚さ 2μｍ
となるように成膜して形成した。このエミッタ層２７の
材料としては、この他にも例えばモリブデン（Ｍｏ）の
ように、冷陰極として十分に仕事関数の低い材料を好適
に用いることができる。また本実施例ではこのエミッタ
層２７がいわゆるカソード電極の機能をも兼ねるように
用いられているが、エミッタ層２７に用いた材料の材質
によっては、さらにＩＴＯ（酸化インジウム錫）のよう
な導電材料からなる導電層を積層してもよい。なお、こ
の図２（ｆ）に示した工程は、基板１のエッチング工程
の以前に行なってもよい。Then, after the resist is peeled off, as shown in FIG.
As shown in (f), the surface of the substrate 1 on the second main surface 15 side and the side wall 21 of the opening 17 are thermally oxidized to have a layer thickness of about 0.2 μm.
A second insulating layer 23 is formed as a SiO 2 thermal oxidation layer of m. Then, along the shape of the first insulating layer 13 on the first major surface 3 side, the emitter layer 27 having the emitter 25 having a sharp cone-shaped tip is formed. In this embodiment, the emitter layer 27
Is tungsten (W) with a thickness of 2 μm
The film was formed so that As a material of the emitter layer 27, other materials such as molybdenum (Mo) having a sufficiently low work function as a cold cathode can be preferably used. In the present embodiment, the emitter layer 27 is also used so as to have a function of a so-called cathode electrode. However, depending on the material of the material used for the emitter layer 27, a conductive material such as ITO (indium tin oxide) may be used. You may laminate the conductive layer which consists of. The step shown in FIG. 2F may be performed before the step of etching the substrate 1.
【００３７】続いて、図２（ｇ）に示すように、第２主
面側１５側の第２の絶縁層２３を被覆するとともに開孔
１７から露出する第１の絶縁層１３の錐状部分１９の第
２主面１５側を被覆するゲート電極材料層２９を形成す
る。このゲート電極材料層２９としては、例えばＷ（タ
ングステン）のような金属材料などが好適である。本実
施例ではこのゲート電極材料層２９としてＷを用いてス
パッタ法により 0.9μｍの厚さに成膜して形成した。Subsequently, as shown in FIG. 2G, the conical pyramidal portion of the first insulating layer 13 which covers the second insulating layer 23 on the second principal surface 15 side and is exposed from the opening 17 is formed. A gate electrode material layer 29 covering the second main surface 15 side of 19 is formed. As the gate electrode material layer 29, a metal material such as W (tungsten) is suitable. In this embodiment, W is used as the gate electrode material layer 29 by sputtering to form a film having a thickness of 0.9 μm.
【００３８】続いて、図２（ｈ）に示すように、ゲート
電極材料層２９の表面にＳｉＯ2 層３１を成膜、さらに
その上を覆うようにフォトレジスト３３を塗布し、この
フォトレジスト３３およびＳｉＯ2 層３１をパターニン
グして、ゲート電極材料層２９の少なくとも先端部が露
出するような開口パターンに形成する。本実施例では、
前記のゲート電極材料層２９によって被覆されたエミッ
タ２５先端が前記の開口から約 0.7μｍほど露出するよ
うにパターニングした。Subsequently, as shown in FIG. 2H, a SiO 2 layer 31 is formed on the surface of the gate electrode material layer 29, and a photoresist 33 is applied so as to cover the SiO 2 layer 31, and the photoresist 33 is applied. Then, the SiO 2 layer 31 is patterned to form an opening pattern such that at least the tip of the gate electrode material layer 29 is exposed. In this embodiment,
Patterning was performed so that the tip of the emitter 25 covered with the gate electrode material layer 29 was exposed to about 0.7 μm from the opening.
【００３９】そして前記の開口を有するフォトレジスト
３３およびＳｉＯ2 層３１をマスクとして用いてエッチ
ングを 2回に分けて行なって、図２（ｉ）にその断面図
を示すように、エミッタ２５の少なくとも先端に対応す
る部分のゲート電極材料層２９および第１の絶縁層１３
を除去して開口３５を形成することで、エミッタ２５の
先端部を含む表面を非接触に包囲するとともにそのエミ
ッタ２５の少なくとも先端部が開口３５から露出するゲ
ート電極層３７を、ゲート電極材料層２９から得た。本
実施例においては、まず第一のエッチングとしてエミッ
タ２５の先端部に対応する部分のゲート電極材料層２９
をＲＩＥにより除去して開口３５を開けた後、このゲー
ト電極材料層２９の開口３５から露出した第１の絶縁層
１３をさらに第２のエッチングとしてフォトレジスト
（図示省略）およびＮＨ4 Ｆ・ＨＦ混合溶液からなるエ
ッチャントを用いてフォトリソグラフィ法により選択的
にエッチング除去して、ゲート電極材料層２９の開口３
５よりも第１の絶縁層１３をさらに大きく除去すること
で前記のようなゲート電極層３７を形成した。Then, the photoresist 33 having the above-mentioned opening and the SiO 2 layer 31 are used as a mask to perform etching in two steps, and as shown in the sectional view of FIG. The gate electrode material layer 29 and the first insulating layer 13 in the portion corresponding to the tip
Are removed to form the opening 35, so that the surface including the tip of the emitter 25 is surrounded in a non-contact manner, and at least the tip of the emitter 25 is exposed through the opening 35. Obtained from 29. In this embodiment, first, as the first etching, the portion of the gate electrode material layer 29 corresponding to the tip of the emitter 25 is formed.
Is removed by RIE to open the opening 35, and the first insulating layer 13 exposed from the opening 35 of the gate electrode material layer 29 is further used as second etching for photoresist (not shown) and NH 4 F · HF. The openings 3 of the gate electrode material layer 29 are selectively removed by photolithography using an etchant made of a mixed solution.
The gate electrode layer 37 as described above was formed by removing the first insulating layer 13 to a greater extent than in No. 5.
【００４０】また、前記の開口されたＳｉＯ2 層３１
は、第３の絶縁層３９としてゲート電極層３７を被覆し
ている。Further, the above-mentioned opened SiO 2 layer 31 is formed.
Cover the gate electrode layer 37 as the third insulating layer 39.
【００４１】そして、最後にエミッタ２５の先端に対向
するように板体状の導電性材料からなるアノード４１を
前記の第３の絶縁層３９の上に載置し、このアノード４
１の周囲を例えばガラスフリット静電接着法などの方法
で封着して、真空封止された本発明に係る微小真空管を
得る。Finally, an anode 41 made of a plate-like conductive material is placed on the third insulating layer 39 so as to face the tip of the emitter 25, and the anode 4
The periphery of 1 is sealed by a method such as a glass frit electrostatic bonding method to obtain a vacuum-sealed micro vacuum tube according to the present invention.
【００４２】以上のように主要部が形成された本発明に
係る微小真空管は、異方性エッチングなどのフォトリソ
グラフィ工程で形成した凹部５および開孔１７の正確な
形状に沿って形成された第１の絶縁層１３を原型として
用いて、これにエミッタ層２７の材料を充填することに
よりエミッタ２５を形成することができるので、従来の
回転堆積法によるエミッタとは異なり正確な形状および
寸法にエミッタを形成することができる。また、第１の
絶縁層１３を熱酸化法で形成することにより第１の絶縁
層１３の錐状部分１９の先端が極めて尖鋭な形状になる
ので、それに沿って形成されるエミッタ２５の先端部も
極めて好適に尖鋭な形状となり電界集中効果を飛躍的に
高くすることができる。また熱酸化法は一般的な半導体
製造工程等とのプロセス整合性が良く工程の簡易化を図
ることもできる。その結果電界放出効率が高くかつその
特性がばらつきの極めて少ない均一な特性であり、しか
も高歩留まりで製作することができる生産性に富んだ微
小真空管を実現することができる。The micro vacuum tube according to the present invention, in which the main portion is formed as described above, is formed in the precise shape of the recess 5 and the opening 17 formed by the photolithography process such as anisotropic etching. Since the emitter 25 can be formed by using the first insulating layer 13 as a prototype and filling the same with the material of the emitter layer 27, the emitter 25 has an accurate shape and size unlike the conventional rotary deposition method. Can be formed. Further, since the tip of the pyramidal portion 19 of the first insulating layer 13 has an extremely sharp shape by forming the first insulating layer 13 by the thermal oxidation method, the tip of the emitter 25 formed along the pyramidal portion 19 has a very sharp shape. Can be extremely sharpened and the electric field concentration effect can be remarkably enhanced. Further, the thermal oxidation method has good process compatibility with a general semiconductor manufacturing process and the like, and the process can be simplified. As a result, it is possible to realize a micro vacuum tube having high field emission efficiency and uniform characteristics with very few variations, and being highly productive that can be manufactured with a high yield.
【００４３】また、本発明に係る微小真空管のアノード
４１は、エミッタ２５が形成された基板１の開孔１７の
部分でエミッタ２５の先端と斜め方向でなくほぼ最短距
離で対面するように設置しているので、エミッタ２５先
端から放出される電子を極めて高い確率で有効にアノー
ド４１へと到達させることができる。The anode 41 of the micro-vacuum tube according to the present invention is installed so as to face the tip of the emitter 25 at the portion of the opening 17 of the substrate 1 in which the emitter 25 is formed, not at an oblique direction but at a substantially shortest distance. Therefore, the electrons emitted from the tip of the emitter 25 can effectively reach the anode 41 with a very high probability.
【００４４】また、例えば板体状のアノード４１を、第
３の絶縁膜３９等を介して基板１の第２主面１５上に載
置し、その基板１の厚みをアノード４１の支持材料とし
て用いるとともにエミッタ２５が露出する基板１の開孔
を塞ぐシール蓋材としても兼用して真空封止することが
できる。これにより、アノード４１自体を微小真空管の
実装のシール蓋材として用いて、その筐体を小型で簡易
な構造に形成することができる。Further, for example, a plate-shaped anode 41 is placed on the second main surface 15 of the substrate 1 via the third insulating film 39 and the like, and the thickness of the substrate 1 is used as a support material for the anode 41. In addition to being used, it can also be used as a seal lid member for closing the opening of the substrate 1 where the emitter 25 is exposed, and can be vacuum-sealed. With this, the anode 41 itself can be used as a seal lid member for mounting the micro vacuum tube, and the housing can be formed in a small and simple structure.
【００４５】また、本発明によれば、基板１の板厚等に
よるアノード４１の支持高さと、エミッタ２５先端のエ
ミッタ層２７平面からの高さとの差が、アノード４１と
エミッタ２５先端との距離となる。従って、前記の基板
１の板厚あるいは第３の絶縁層３９等の厚さを適宜に設
定することにより、所望のアノード４１とエミッタ２５
先端との距離を正確に得ることができ、微小真空管とし
て要求される諸特性に対して煩雑なプロセス制御等を必
要とせずに簡易に適合させることができるという利点を
も備えている。According to the present invention, the difference between the support height of the anode 41 due to the thickness of the substrate 1 and the like and the height of the tip of the emitter 25 from the plane of the emitter layer 27 is the distance between the anode 41 and the tip of the emitter 25. Becomes Therefore, by appropriately setting the plate thickness of the substrate 1 or the thickness of the third insulating layer 39, etc., the desired anode 41 and emitter 25 can be obtained.
It also has the advantage that the distance to the tip can be accurately obtained, and various characteristics required as a micro vacuum tube can be easily adapted without requiring complicated process control.
【００４６】上記の結果、本発明によれば、電界放出効
率が高くかつその動作特性のばらつきが極めて少ない均
一な特性を有し、小型でしかも簡易な構造の生産性に富
んだ微小真空管およびその製造方法を提供することがで
きる。As a result of the above, according to the present invention, a micro-vacuum tube having a high field emission efficiency and uniform characteristics with very little variation in its operating characteristics, a small vacuum tube having a simple structure and high productivity, and the same. A manufacturing method can be provided.
【００４７】なお、上記実施例では、本発明に係る微小
真空管を、一つの基板内に単数設けた場合について述べ
たが、上記実施例のような構造の微小真空管を一つの基
板内に複数個形成することも可能であることは言うまで
もない。これを図３に示す。なお図３においては図１、
図２と同様の部位に対しては同一の符号を付して示して
いる。In the above embodiments, the case where a single micro vacuum tube according to the present invention is provided in one substrate has been described. However, a plurality of micro vacuum tubes having the structure as in the above embodiments are provided in one substrate. It goes without saying that it can be formed. This is shown in FIG. In FIG. 3, FIG.
The same parts as those in FIG. 2 are designated by the same reference numerals.
【００４８】あるいは、一枚の基板内に上記実施例で示
した微小真空管を複数個形成した後、この基板をダイシ
ング（カット）してそれら一つ一つの微小真空管を分割
し、一枚の基板から単体の微小真空管を複数個得ること
も可能である。Alternatively, after forming a plurality of micro vacuum tubes shown in the above embodiment in one substrate, dicing (cutting) this substrate to divide each of the micro vacuum tubes into one substrate. It is also possible to obtain a plurality of single micro vacuum tubes.
【００４９】また、上記実施例においてはエミッタ層２
７がカソード電極およびその配線をも兼ねる構成として
いるが、上記実施例でも述べたごとく、エミッタ層２７
に用いる材料などの場合によってはエミッタ層２７とは
別体で例えばＩＴＯや金属膜などを用いてさらに導電層
を形成してもよい。Further, in the above embodiment, the emitter layer 2
7 also functions as a cathode electrode and its wiring. However, as described in the above embodiment, the emitter layer 27
Depending on the material used for the above, a conductive layer may be formed separately from the emitter layer 27 by using, for example, ITO or a metal film.
【００５０】その他、本発明の要旨を逸脱しない範囲
で、本発明の微小真空管の各部位の形成材料や、成膜方
法などの変更が種々可能であることは言うまでもない。Needless to say, the material for forming each part of the micro vacuum tube of the present invention and the film forming method can be variously modified without departing from the scope of the present invention.
【００５１】[0051]
【発明の効果】以上、詳細な説明で明示したように、本
発明によれば、電界放出効率が高くかつその特性のばら
つきが極めて少ない均一な特性を備え、しかも高歩留ま
りで製作することができる生産性の優れた微小真空管を
実現することができる。As is clear from the detailed description above, according to the present invention, it is possible to manufacture the device with uniform characteristics having high field emission efficiency and very little variation in its characteristics, and with high yield. A micro vacuum tube with excellent productivity can be realized.
【図１】本発明に係る微小真空管の製造工程を示す図。FIG. 1 is a diagram showing a manufacturing process of a micro vacuum tube according to the present invention.
【図２】本発明に係る微小真空管の製造工程を示す図。FIG. 2 is a diagram showing a manufacturing process of a micro vacuum tube according to the present invention.
【図３】本発明に係る微小真空管を一枚の基板に複数個
形成した場合を示す図。FIG. 3 is a view showing a case where a plurality of micro vacuum tubes according to the present invention are formed on one substrate.
【図４】従来の微小真空管のエミッタ部分の回転蒸着法
を用いた製造工程を示す図。FIG. 4 is a view showing a manufacturing process using a rotary evaporation method for an emitter portion of a conventional micro vacuum tube.
【図５】従来の微小真空管の構造を示す図。FIG. 5 is a view showing a structure of a conventional micro vacuum tube.
【図６】従来の微小真空管の異方性エッチングを用いた
製造方法を示す図。FIG. 6 is a diagram showing a conventional method for manufacturing a micro vacuum tube using anisotropic etching.
１…シリコン単結晶基板、３…第１主面側、５…凹部、
１３…第１の絶縁層、１５…第２主面側、１７…開孔、
１９…錐状部分、２１…側壁、２３…第２の絶縁層、２
５…エミッタ、２７…エミッタ層、２９…ゲート電極材
料層、３１…ＳｉＯ2 層、３３…フォトレジスト、３５
…開口、３７…ゲート電極層、３９…第３の絶縁層、４
１…アノード1 ... Silicon single crystal substrate, 3 ... First main surface side, 5 ... Recessed portion,
13 ... 1st insulating layer, 15 ... 2nd main surface side, 17 ... Open hole,
19 ... Conical portion, 21 ... Side wall, 23 ... Second insulating layer, 2
5 ... Emitter, 27 ... Emitter layer, 29 ... Gate electrode material layer, 31 ... SiO 2 layer, 33 ... Photoresist, 35
... Opening, 37 ... Gate electrode layer, 39 ... Third insulating layer, 4
1 ... Anode
Claims (3)
ミッタ層と、 前記エミッタ層上に形成され、前記エミッタ層の***部
が露出するように開孔が穿設された、前記エミッタ層の
前記***部よりも厚い板厚を有する基板と、 前記基板上に前記エミッタ層と対向して形成され、前記
基板によって支持されたアノード層と、を具備すること
を特徴とする微小真空管。1. An emitter layer having a ridge with a sharp tip in a part thereof, and an opening formed on the emitter layer so that the ridge of the emitter layer is exposed. A micro vacuum tube comprising: a substrate having a thickness greater than that of the raised portion of the emitter layer; and an anode layer formed on the substrate so as to face the emitter layer and supported by the substrate. .
ミッタが形成され、前記複数個のエミッタの先端部それ
ぞれと対向するように前記アノード層が配置されて、前
記微小真空管が前記基板に複数個形成されていることを
特徴とする微小真空管。2. The micro vacuum tube according to claim 1, wherein a plurality of the openings are formed in the substrate, and an emitter is formed in each of the openings so as to face each tip of the plurality of emitters. And a plurality of the micro vacuum tubes formed on the substrate.
の凹部を基板の第１主面側に刻設する工程と、 前記凹部を含む前記基板の第１主面側に、前記凹部に沿
った少なくとも底部先端が尖鋭に窪んだ形状の凹部を備
えた絶縁層を形成する工程と、 前記基板の凹部に対応する位置に前記第１主面側とは反
対側の第２主面側から開孔を穿設し、該開孔から前記絶
縁層の凹部の第２主面側を凸状に露出させるとともに、
前記絶縁層の前記第１主面側の凹部を埋めつつ前記絶縁
層の第一主面側の面上にエミッタ層材料を形成し、前記
絶縁層の前記第１主面側の凹部に沿って先端部に尖鋭な
エミッタを備えた形状の***部を有するエミッタ層を形
成する工程と、 前記基板の第２主面側によって支持されて、前記エミッ
タ層の先端部と対向するように、アノード層を配置する
工程と、を含むことを特徴とする微小真空管の製造方
法。3. A step of engraving a concave portion having a shape in which at least a bottom tip is sharply dented on the first main surface side of the substrate, and on the first main surface side of the substrate including the concave portion, along the concave portion. A step of forming an insulating layer having at least a concave portion whose bottom end is sharply dented, and a hole at a position corresponding to the concave portion of the substrate from a second main surface side opposite to the first main surface side And exposing the second main surface side of the concave portion of the insulating layer in a convex shape from the opening,
An emitter layer material is formed on the surface of the insulating layer on the first main surface side while filling the recesses of the insulating layer on the first main surface side, and along the recesses on the first main surface side of the insulating layer. Forming an emitter layer having a ridge having a shape with a sharp emitter at the tip, and an anode layer supported by the second main surface side of the substrate and facing the tip of the emitter layer. And a step of disposing the micro vacuum tube.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32441493A JP3625297B2 (en) | 1993-12-22 | 1993-12-22 | Micro vacuum tube and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32441493A JP3625297B2 (en) | 1993-12-22 | 1993-12-22 | Micro vacuum tube and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07183487A true JPH07183487A (en) | 1995-07-21 |
| JP3625297B2 JP3625297B2 (en) | 2005-03-02 |
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ID=18165534
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
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| Country | Link |
|---|---|
| JP (1) | JP3625297B2 (en) |
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1993
- 1993-12-22 JP JP32441493A patent/JP3625297B2/en not_active Expired - Fee Related
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