JPH07169900A - Multilayer lead frame and semiconductor device utilizing the same - Google Patents

Multilayer lead frame and semiconductor device utilizing the same

Info

Publication number
JPH07169900A
JPH07169900A JP34294893A JP34294893A JPH07169900A JP H07169900 A JPH07169900 A JP H07169900A JP 34294893 A JP34294893 A JP 34294893A JP 34294893 A JP34294893 A JP 34294893A JP H07169900 A JPH07169900 A JP H07169900A
Authority
JP
Japan
Prior art keywords
metal plate
lead frame
adhesive layer
leads
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34294893A
Other languages
Japanese (ja)
Inventor
Tatsuya Otaka
達也 大高
Yasuharu Kameyama
康晴 亀山
Hisanori Akino
久則 秋野
Shigeji Takahagi
茂治 高萩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP34294893A priority Critical patent/JPH07169900A/en
Publication of JPH07169900A publication Critical patent/JPH07169900A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To realize cost down by sticking, on a plurality of leads connected with a semiconductor element, a metal plate of which one surface placed in the lead side is coated with an insulating bonding agent layer through such insulating bonding agent layer. CONSTITUTION:A metal plate 5 of which one surface placed in the lead side is coated with an insulating bonding agent layer 6 is stuck on a plurality of leads 3 connected with a semiconductor element 1 through such insulating bonding agent layer 6. A semiconductor device comprises a multilayer lead frame described above, a semiconductor element l fixed on such metal plate 5 through a conductive bonding agent 7, a bonding wire 4 connecting a plurality of leads 3 and the semiconductor element 1 and a resin mold material 2 provided to surround the entire part of a plurality of leads 3, except for a part of such leads. For example, a copper group metal is used as the metal plate 5. Moreover, the insulating bonding agent layer 6 is formed using a thermosetting bonding agent having a glass transisition temperature of 180 deg.C or higher.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は多層リードフレームおよ
びそれを用いた半導体装置に関し、特に、コストダウン
を図りながらパッケージクラックの発生を低減し、且
つ、電源等へのノイズの重畳を防げるようにした多層リ
ードフレームおよびそれを用いた半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer lead frame and a semiconductor device using the same, and more particularly, to reduce the occurrence of package cracks while reducing the cost and prevent the noise from being superposed on the power supply. And a semiconductor device using the same.

【０００２】[0002]

【従来の技術】ロジック系素子の高集積化，および高速
化に伴い、半導体素子を搭載するリードフレームには電
気伝搬特性の向上，および放熱性の向上が求められてい
る。最近は、これに対応して、リードフレームに金属板
を貼り合わせることによって、リードのインダクタンス
を減少させた構造を有するリードフレームや、その貼り
合わせた金属板上に直接半導体素子を搭載することによ
って、放熱性を向上させたリードフレーム等が実用化さ
れている。2. Description of the Related Art With the higher integration and higher speed of logic elements, lead frames on which semiconductor elements are mounted are required to have improved electric propagation characteristics and heat dissipation. Recently, in response to this, by attaching a metal plate to the lead frame, a lead frame having a structure in which the inductance of the lead is reduced, or by mounting a semiconductor element directly on the attached metal plate Lead frames with improved heat dissipation have been put to practical use.

【０００３】一般的に、上述の多層化されたリードフレ
ームは、両面接着剤付フィルムを介してリードフレーム
と金属板を接着することによって製造されている。Generally, the above-mentioned multi-layered lead frame is manufactured by adhering the lead frame and the metal plate through a double-sided adhesive film.

【０００４】[0004]

【発明が解決しようとする課題】しかしながら、従来の
多層リードフレームによると、両面接着剤付フィルムを
介してリードフレームと金属板を接着しているため、フ
ィルム材料費やフィルム貼合わせ加工費が累積され、更
にこの工程での歩留り損失も原価に加算されることから
大幅なコストアップになるという問題がある。However, according to the conventional multilayer lead frame, since the lead frame and the metal plate are adhered via the double-sided adhesive film, the film material cost and the film laminating process cost are accumulated. In addition, since the yield loss in this process is added to the cost, there is a problem that the cost is significantly increased.

【０００５】従って、本発明の目的はコストダウンを図
ることができる多層リードフレームおよびそれを用いた
半導体装置を提供することである。Therefore, an object of the present invention is to provide a multilayer lead frame and a semiconductor device using the same which can reduce the cost.

【０００６】[0006]

【課題を解決するための手段】本発明は上記問題点に鑑
み、コストダウンを図るため、半導体素子と接続される
複数のリード上に、複数のリード側となる片面に絶縁性
接着剤層が塗布された金属板をその絶縁性接着剤層を介
して貼り合わせた多層リードフレームを提供するもので
ある。SUMMARY OF THE INVENTION In view of the above problems, the present invention has a plurality of leads connected to a semiconductor element, and an insulating adhesive layer is provided on one side of the plurality of leads in order to reduce costs. It is intended to provide a multilayer lead frame in which a coated metal plate is bonded via its insulating adhesive layer.

【０００７】上記絶縁性接着剤層は、ガラス転移温度が
１８０℃以上の熱可塑性接着剤が好ましく、更に、絶縁
性接着剤層は複数の熱可塑性接着剤の積層体より構成さ
れ、その複数の熱可塑性接着剤は金属板との接着面から
遠い層程、ガラス転移温度が高くなっている構成が好ま
しい。The insulating adhesive layer is preferably a thermoplastic adhesive having a glass transition temperature of 180 ° C. or higher, and the insulating adhesive layer is composed of a laminate of a plurality of thermoplastic adhesives. The thermoplastic adhesive preferably has a structure in which the glass transition temperature is higher in a layer farther from the bonding surface with the metal plate.

【０００８】また、両面接着剤付フィルムを使用せずに
金属板の片面に塗布された絶縁性接着剤層で接着する
と、次のようなことが懸念される。If the insulating adhesive layer applied to one side of the metal plate is used for bonding without using the double-sided adhesive-coated film, the following may occur.

【０００９】モールド成形後に金属板の半導体素子の搭
載される面からパッケージクラックが発生し易く、この
発生によりボンディングワイヤが切断してしまうという
致命的な欠陥につながる。また、半導体素子と金属板間
に接着剤厚の絶縁膜が形成されることになるため、この
絶縁膜がコンデンサ成分を構成し、半導体素子が高速稼
動する際、このコンデンサ成分が素子の回路上の信号に
ノイズを与える。After molding, a package crack is likely to occur on the surface of the metal plate on which the semiconductor element is mounted, and this causes a fatal defect that the bonding wire is cut. Moreover, since an insulating film having an adhesive thickness is formed between the semiconductor element and the metal plate, this insulating film constitutes a capacitor component, and when the semiconductor element operates at high speed, this capacitor component is on the circuit of the element. Add noise to the signal.

【００１０】本発明の多層リードフレームではこのよう
な懸念に対して以下のような対策が施されている。The multilayer lead frame of the present invention has the following countermeasures against such a concern.

【００１１】上記絶縁性接着剤層は、金属板の片面の一
部を残して略全面に塗布されることにより、その一部に
金属板の露出部を有して構成されている。また、金属板
は所定の深さの接着剤充填孔を有し、絶縁性接着剤層は
金属板の片面の接着剤充填孔を残すように略全面に塗布
された構成であっても良く、更には、金属板は所定の高
さの突起を有し、絶縁性接着剤層は金属板の片面の突起
を残すように略全面に塗布された構成であっても良い。The insulative adhesive layer is formed by coating the substantially entire surface of a metal plate, leaving a part of one side thereof, so that the metal plate has an exposed portion. Further, the metal plate has an adhesive filling hole of a predetermined depth, the insulating adhesive layer may be applied to substantially the entire surface to leave the adhesive filling hole on one side of the metal plate, Further, the metal plate may have protrusions having a predetermined height, and the insulating adhesive layer may be applied to substantially the entire surface of the metal plate so that the protrusions on one surface are left.

【００１２】また、上記の目的を達成する本発明の多層
リードフレームを用いた半導体装置は、複数のリード上
に当該複数のリード側となる片面に絶縁性接着剤層が塗
布された金属板を前記絶縁性接着剤層を介して貼り合わ
せられた多層リードフレームと、金属板上に導電性接着
剤を介して固定された半導体素子と、複数のリードと半
導体素子を接続するボンディンクワイヤと、複数のリー
ドの一部を残して全体を包囲するように施された樹脂モ
ールド体とを備えている。Further, in a semiconductor device using the multilayer lead frame of the present invention which achieves the above-mentioned object, a metal plate having an insulating adhesive layer applied on one surface on the plurality of leads is provided. A multilayer lead frame bonded via the insulating adhesive layer, a semiconductor element fixed on a metal plate via a conductive adhesive, and a bonding wire connecting a plurality of leads to the semiconductor element, And a resin mold body which is provided so as to surround the whole of the plurality of leads except for a part thereof.

【００１３】ここで、上記した半導体装置においても、
金属板の片面に塗布された絶縁性接着剤層で接着するこ
とによる懸念に対して以下のような対策が施されてい
る。Here, also in the above semiconductor device,
The following measures have been taken against the concern of bonding with an insulating adhesive layer applied to one surface of a metal plate.

【００１４】上記絶縁性接着剤層は、金属板の片面の一
部を残して略全面に塗布されることにより、その一部に
金属板の露出部を有し、導電性接着剤層がその露出部を
介して金属板と電気的に接続された構成を有している。
また、金属板は所定の深さの接着剤充填孔を有し、絶縁
性接着剤層は金属板の片面の接着剤充填孔を残すように
略全面に塗布され、導電性接着剤が接着剤充填孔を介し
て金属板と電気的に接続されている構成であっても良
く、また、金属板は所定の高さの突起を有し、絶縁性接
着剤層は金属板の片面の前記突起を残すように略全面に
塗布され、突起は半導体素子の裏面と電気的に接続され
ている構成であっても良い。The insulating adhesive layer is applied to substantially the entire surface of the metal plate except a part of one side of the metal plate, so that the exposed part of the metal plate is formed in a part of the conductive adhesive layer. It has the structure electrically connected to the metal plate via the exposed portion.
In addition, the metal plate has an adhesive filling hole of a predetermined depth, the insulating adhesive layer is applied to substantially the entire surface of the metal plate leaving the adhesive filling hole on one side, and the conductive adhesive is used as the adhesive. It may be configured to be electrically connected to the metal plate through the filling hole, the metal plate has a protrusion of a predetermined height, and the insulating adhesive layer is the protrusion on one side of the metal plate. The coating may be applied on almost the entire surface so that the projections are left, and the protrusions are electrically connected to the back surface of the semiconductor element.

【００１５】このように本発明は、貼り付けられる金属
板に予め接着剤を塗布しておき、その接着剤を用いてリ
ードフレームと金属板を接着するため、両面接着剤付フ
ィルムのようなフィルム材料費や加工費等が不要にな
り、大幅なコストダウンを図ることができる。また、金
属板の素子搭載面側に絶縁性接着剤層が略全面に塗布さ
れているため、一般に接着剤とレジンとの密着性は非常
に良好なことからパッケージクラックの発生を完全に防
止することができる。更に、半導体素子を固定する導電
性接着剤と金属板を電気的に接続して、半導体素子の裏
面と金属板の電位を等しくすることにより、このように
全面に接着剤を塗布した金属板に半導体素子を搭載した
際に生ずる半導体素子裏面と金属板間に発生するコンデ
ンサ成分をなくすことができる。これによって、例え
ば、５０ＭＨｚ程度またはそれ以上の高速スイッチング
を行う素子を搭載した場合でも、電源等にノイズ電位が
重畳するのを防ぐことができる。As described above, according to the present invention, a metal plate to be attached is coated with an adhesive in advance, and the lead frame and the metal plate are adhered using the adhesive, so that a film such as a double-sided adhesive-attached film is used. Material costs and processing costs are no longer necessary, and a significant cost reduction can be achieved. In addition, since the insulating adhesive layer is applied on almost the entire surface of the metal plate on which the element is mounted, the adhesion between the adhesive and the resin is generally very good, so that the occurrence of package cracks is completely prevented. be able to. Further, by electrically connecting the conductive adhesive for fixing the semiconductor element and the metal plate to equalize the potentials of the back surface of the semiconductor element and the metal plate, the metal plate coated with the adhesive on the entire surface in this manner is It is possible to eliminate the capacitor component generated between the back surface of the semiconductor element and the metal plate when the semiconductor element is mounted. This makes it possible to prevent the noise potential from being superposed on the power source or the like even when an element that performs high-speed switching of about 50 MHz or higher is mounted.

【００１６】[0016]

【実施例】以下、本発明の多層リードフレームおよびそ
れを用いた半導体装置について添付図面を参照しながら
詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A multilayer lead frame of the present invention and a semiconductor device using the same will be described below in detail with reference to the accompanying drawings.

【００１７】図１には、本発明の一実施例の多層リード
フレームおよびそれを用いた半導体装置の断面構造が示
されている。まず、多層リードフレームにおいては、後
述する半導体素子と接続される複数のリード３と、複数
のリード３側となる片面に絶縁性接着剤層６が塗布され
た金属板５をその絶縁性接着剤層６を介して貼り合わせ
て構成されている。FIG. 1 shows a cross-sectional structure of a multilayer lead frame and a semiconductor device using the same according to an embodiment of the present invention. First, in a multi-layer lead frame, a plurality of leads 3 connected to a semiconductor element described later and a metal plate 5 having an insulating adhesive layer 6 applied to one surface on the side of the plurality of leads 3 are used as the insulating adhesive. It is constructed by laminating it via the layer 6.

【００１８】ここで、金属板５としては銅系，或いは４
２Ｎｉ−Ｆｅ系が一般的であるが、電気伝導性又は熱伝
導性を考慮すると、銅系を適用することが好ましい。ま
た、絶縁性接着層６としては熱可塑性接着剤を適用する
が、その中でもワイヤボンディング性，ハンダリフロー
時の耐クラック性等を考慮すると、２２０℃で１０10ｄ
ｙｎ／ｃｍ2 程度以上の弾性率を有し、ガラス転移温度
が２２０℃以上の特性を有していることが望ましい。こ
れらを満たす接着材料としては、ポリイミド系もしくは
ポリアミドイミド系のものが望ましい。絶縁性接着層の
厚さは良好な接着を考慮すると、約２０μｍ程度である
ことが望ましい。また、絶縁性接着層６が多層で構成し
ても良く、その場合には接着に寄与する部分の厚さが約
２０μｍ程度、接着に寄与しない金属板５に近い側の絶
縁のための部分の厚みが約５μｍ以上あれば良く、更
に、接着剤のガラス転移温度を段階的に変える場合に
は、貼付温度の変動を考慮すると、そのガラス転移温度
の差は１０℃以上あることが必要である。Here, the metal plate 5 is made of copper or 4
The 2Ni-Fe system is generally used, but in consideration of electrical conductivity or thermal conductivity, it is preferable to apply the copper system. Further, a thermoplastic adhesive is applied as the insulating adhesive layer 6, and in consideration of the wire bonding property, the crack resistance during solder reflow, and the like among them, 10 10 d at 220 ° C.
It is desirable that it has an elastic modulus of about yn / cm 2 or more and a glass transition temperature of 220 ° C. or more. As an adhesive material that satisfies these, a polyimide-based or polyamide-imide-based adhesive is desirable. The thickness of the insulating adhesive layer is preferably about 20 μm in consideration of good adhesion. Further, the insulating adhesive layer 6 may be composed of multiple layers. In that case, the thickness of the portion contributing to adhesion is about 20 μm, and the portion for insulation on the side close to the metal plate 5 which does not contribute to adhesion is formed. The thickness may be about 5 μm or more. Further, when the glass transition temperature of the adhesive is changed stepwise, it is necessary that the difference between the glass transition temperatures is 10 ° C. or more in consideration of the variation of the sticking temperature. .

【００１９】次に、半導体装置においては、前述した多
層リードフレームと、その金属板５の上部に銀ペースト
による導電性接着剤７を介して固定された半導体素子１
と、多層リードフレームの複数のリード３と半導体素子
１の電極を接続するボンディングワイヤ４と、複数のリ
ード３の一部（アウターリード）を残して全体を包囲す
る樹脂モールド体２を備えて構成されている。Next, in the semiconductor device, the above-mentioned multi-layered lead frame and the semiconductor element 1 fixed to the upper part of the metal plate 5 via the conductive adhesive 7 made of silver paste.
And a bonding wire 4 connecting the plurality of leads 3 of the multilayer lead frame to the electrodes of the semiconductor element 1, and a resin mold body 2 enclosing the whole of the plurality of leads 3 except for some (outer leads). Has been done.

【００２０】このような構成では、金属板５の片面に塗
布された絶縁性接着剤層６を用いてリードフレームの複
数のリード３と金属板５を接着するため、両面接着剤付
フィルムを用いた接着が不要になり、フィルム材料費や
加工費等の低減による大幅なコストダウンを図ることが
できる。また、金属板５の素子搭載面側に接着剤が略全
面に塗布されているため、樹脂モールド体２との密着性
が良好になり、パッケージクラックの発生を完全に防止
することができる。In such a structure, since the plurality of leads 3 of the lead frame are bonded to the metal plate 5 by using the insulating adhesive layer 6 applied to one surface of the metal plate 5, a double-sided adhesive film is used. This eliminates the need for bonding, and can significantly reduce costs by reducing film material costs and processing costs. Further, since the adhesive is applied to almost the entire surface of the metal plate 5 on which the element is mounted, the adhesiveness with the resin mold body 2 is improved, and the occurrence of package cracks can be completely prevented.

【００２１】図２には、本発明の第２の実施例が示され
ている。この実施例の多層リードフレームを用いた半導
体装置は、金属板５上に導電性接着剤を用いずに絶縁性
接着剤６だけで半導体素子１を固定して構成されたもの
である。このような構成では第１の実施例と同様な効果
を得ることができる。この半導体装置を組み立てるにあ
たっては、加熱することによって絶縁性接着剤を溶融す
る必要があるが、全体を一様に加熱すると、金属板およ
びリードフレームと半導体素子の熱膨張係数の異なるた
めに熱膨張差に基づく残留応力が発生する。この残留応
力の発生を抑えるためには、半導体素子と金属板および
リードフレームの加熱温度に差をつけ、例えば、金属板
が銅であれば両者の温度比を４：１に設定することが望
ましい。FIG. 2 shows a second embodiment of the present invention. The semiconductor device using the multilayer lead frame of this embodiment is configured by fixing the semiconductor element 1 on the metal plate 5 only with the insulating adhesive 6 without using a conductive adhesive. With such a structure, the same effect as that of the first embodiment can be obtained. When assembling this semiconductor device, it is necessary to melt the insulating adhesive by heating, but if the whole is heated uniformly, the thermal expansion coefficient is different because the thermal expansion coefficient of the metal plate and the lead frame is different from that of the semiconductor element. Residual stress is generated due to the difference. In order to suppress the occurrence of this residual stress, it is desirable to set a difference in heating temperature between the semiconductor element, the metal plate, and the lead frame, and for example, if the metal plate is copper, set the temperature ratio of both to 4: 1. .

【００２２】図３には、本発明の第３の実施例が示され
ている。この実施例の多層リードフレームを用いた半導
体装置は、金属板５の絶縁性接着剤層６に金属板５に通
じる露出部８が形成されており、半導体素子１を固定す
る導電性接着剤７がこの露出部８に充填されることによ
り金属板５と電気的に接続された構成を有している。こ
の露出部８は、例えば、接着剤を塗布する段階で機械的
な方法で接着層欠損部を形成することによって得ること
ができる。FIG. 3 shows a third embodiment of the present invention. In the semiconductor device using the multilayer lead frame of this embodiment, an exposed portion 8 communicating with the metal plate 5 is formed in the insulating adhesive layer 6 of the metal plate 5, and the conductive adhesive 7 for fixing the semiconductor element 1 is formed. Is filled in the exposed portion 8 to be electrically connected to the metal plate 5. The exposed portion 8 can be obtained, for example, by forming the adhesive layer defective portion by a mechanical method at the stage of applying the adhesive.

【００２３】このような構成では、半導体素子１の裏側
の導電性接着剤７と金属板５を電気的に接続して、半導
体素子１の裏面と金属板５の電位を等しくすることがで
き、半導体素子１の裏面と金属板５の間に発生するコン
デンサ成分をなくすことができる。このため、第１およ
び第２の実施例の効果に加え、例えば、５０ＭＨｚ程度
またはそれ以上の高速スイッチングを行う素子を搭載し
た場合でも、電源等にノイズ電位が重畳するのを防ぐこ
とができるといった効果を得ることができる。In such a structure, the conductive adhesive 7 on the back side of the semiconductor element 1 and the metal plate 5 can be electrically connected to make the back surface of the semiconductor element 1 and the metal plate 5 have the same potential. It is possible to eliminate the capacitor component generated between the back surface of the semiconductor element 1 and the metal plate 5. Therefore, in addition to the effects of the first and second embodiments, it is possible to prevent the noise potential from being superposed on the power supply or the like even when an element that performs high-speed switching of about 50 MHz or higher is mounted. The effect can be obtained.

【００２４】図４には、本発明の第４の実施例が示され
ている。この実施例の多層リードフレームを用いた半導
体装置は、金属板５と絶縁性接着剤層６に貫通孔９が形
成されており、半導体素子１を固定する導電性接着剤７
がこの貫通孔９に充填されることにより金属板５と電気
的に接続された構成を有している。このような構成では
第３の実施例と同様な効果を得ることができる。また、
貫通孔以外でも良く、例えば、図５に示すように、金属
板５に所定の深さの接着剤充填孔１０を形成しておき、
これに導電性接着剤７を充填させて導通を確保しても良
い。更に、図６に示すように、金属板５に所定の高さの
突起５Ａを形成し、この突起５Ａを介して直接、金属板
５と半導体素子１の裏面を電気的に接続しても良い。こ
の場合、絶縁性接着剤層６は突起５Ａの高さに応じて所
定の厚さで塗布する必要がある。FIG. 4 shows a fourth embodiment of the present invention. In the semiconductor device using the multilayer lead frame of this embodiment, a through hole 9 is formed in the metal plate 5 and the insulating adhesive layer 6, and the conductive adhesive 7 for fixing the semiconductor element 1 is used.
Is filled with the through hole 9 to be electrically connected to the metal plate 5. With such a configuration, the same effect as that of the third embodiment can be obtained. Also,
Other than the through hole, for example, as shown in FIG. 5, an adhesive filling hole 10 having a predetermined depth is formed in the metal plate 5,
This may be filled with a conductive adhesive 7 to ensure conduction. Further, as shown in FIG. 6, a protrusion 5A having a predetermined height may be formed on the metal plate 5, and the metal plate 5 and the back surface of the semiconductor element 1 may be electrically connected directly via the protrusion 5A. . In this case, the insulating adhesive layer 6 needs to be applied in a predetermined thickness according to the height of the protrusion 5A.

【００２５】[0025]

【発明の効果】以上説明した通り、本発明の多層リード
フレームおよびそれを用いた半導体装置によると、半導
体素子と接続される複数のリード上に、複数のリード側
となる片面に絶縁性接着剤層が塗布された金属板をその
絶縁性接着剤層を介して貼り合わせているため、コスト
ダウンを図ることができる。As described above, according to the multilayer lead frame and the semiconductor device using the same of the present invention, the insulating adhesive is provided on the plurality of leads connected to the semiconductor element and on one side of the plurality of leads. Since the metal plates coated with the layers are bonded via the insulating adhesive layer, the cost can be reduced.

【００２６】また、金属板の素子搭載面側に絶縁性接着
剤層が略全面に塗布されているため、レジンとの密着性
が良好になり、パッケージクラックの発生を完全に防止
することができる。更に、半導体素子を固定する導電性
接着剤と金属板を電気的に接続して、半導体素子の裏面
と金属板の電位を等しくしているため、半導体素子の裏
面と金属板の間に発生するコンデンサ成分をなくすこと
ができる。このため、例えば、５０ＭＨｚ程度またはそ
れ以上の高速スイッチングを行う素子を搭載した場合で
も、電源等にノイズ電位が重畳するのを防ぐことができ
る。Further, since the insulative adhesive layer is applied to almost the entire surface of the metal plate on which the device is mounted, the adhesion with the resin is improved, and the occurrence of package cracks can be completely prevented. . Furthermore, since the conductive adhesive for fixing the semiconductor element and the metal plate are electrically connected to equalize the potentials of the back surface of the semiconductor element and the metal plate, a capacitor component generated between the back surface of the semiconductor element and the metal plate. Can be eliminated. Therefore, for example, even when an element that performs high-speed switching of about 50 MHz or higher is mounted, it is possible to prevent the noise potential from being superimposed on the power source or the like.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の一実施例を示す断面図。FIG. 1 is a sectional view showing an embodiment of the present invention.

【図２】本発明の第２の実施例を示す断面図。FIG. 2 is a sectional view showing a second embodiment of the present invention.

【図３】本発明の第３の実施例を示す断面図。FIG. 3 is a sectional view showing a third embodiment of the present invention.

【図４】本発明の第４の実施例を示す断面図。FIG. 4 is a sectional view showing a fourth embodiment of the present invention.

【図５】本発明の第５の実施例を示す断面図。FIG. 5 is a sectional view showing a fifth embodiment of the present invention.

【図６】本発明の第６の実施例を示す断面図。FIG. 6 is a sectional view showing a sixth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

１ 半導体素子 ２ 樹脂
モールド体 ３ リード ４ ボン
ディングワイヤ ５ 金属板 ５Ａ 突起 ６ 絶縁性接着剤層 ７ 導電
性接着剤 ８ 露出部 ９ 貫通
孔 １０ 接着剤充填孔1 Semiconductor Element 2 Resin Molded Body 3 Lead 4 Bonding Wire 5 Metal Plate 5A Protrusion 6 Insulating Adhesive Layer 7 Conductive Adhesive 8 Exposed Part 9 Through Hole 10 Adhesive Filling Hole

───────────────────────────────────────────────────── フロントページの続き (72)発明者 高萩 茂治 茨城県土浦市木田余町3550番地 日立電線 株式会社システムマテリアル研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shigeharu Takahagi 3550, Kidayomachi, Tsuchiura City, Ibaraki Prefecture Hitachi Cable Co., Ltd.

Claims (10)

【特許請求の範囲】[Claims] 【請求項１】 半導体素子と接続される複数のリード上
に、前記複数のリード側となる片面に絶縁性接着剤層が
塗布された金属板を前記絶縁性接着剤層を介して貼り合
わせられていることを特徴とする多層リードフレーム。1. A metal plate having an insulating adhesive layer applied to one side of the plurality of leads is bonded onto the plurality of leads connected to a semiconductor element via the insulating adhesive layer. A multi-layered lead frame characterized in that 【請求項２】 前記絶縁性接着剤層は、前記金属板の片
面の一部を残して略全面に塗布されることにより、前記
一部に前記金属板の露出部を有する構成の請求項１の多
層リードフレーム。2. The insulating adhesive layer is applied to substantially the entire surface of the metal plate except a part of one side of the metal plate, so that the exposed part of the metal plate is provided in the part. Multi-layer lead frame. 【請求項３】 前記金属板は、所定の深さの接着剤充填
孔を有し、 前記絶縁性接着剤層は、前記金属板の片面の前記接着剤
充填孔を残すように略全面に塗布されている構成の請求
項１，或いは２の多層リードフレーム。3. The metal plate has an adhesive filling hole having a predetermined depth, and the insulating adhesive layer is applied to substantially the entire surface of the metal plate so as to leave the adhesive filling hole on one side. The multi-layered lead frame according to claim 1 or 2, wherein the multi-layered lead frame is provided. 【請求項４】 前記金属板は、所定の高さの突起を有
し、 前記絶縁性接着剤層は、前記金属板の片面の前記突起を
残すように略全面に塗布されている構成の請求項１，或
いは２の多層リードフレーム。4. The metal plate has a protrusion having a predetermined height, and the insulating adhesive layer is applied to substantially the entire surface of the metal plate so as to leave the protrusion on one surface of the metal plate. Item 1. The multilayer lead frame according to item 1 or 2. 【請求項５】 前記絶縁性接着剤層は、ガラス転移温度
が１８０℃以上の熱可塑性接着剤である構成の請求項１
の多層リードフレーム。5. The insulating adhesive layer is a thermoplastic adhesive having a glass transition temperature of 180 ° C. or higher.
Multi-layer lead frame. 【請求項６】 前記絶縁性接着剤層は、複数の熱可塑性
接着剤の積層体より構成され、 前記複数の熱可塑性接着剤は、前記金属板との接着面か
ら遠い層程、ガラス転移温度が高くなっている構成の請
求項３の多層リードフレーム。6. The insulating adhesive layer is composed of a laminated body of a plurality of thermoplastic adhesives, and the plurality of thermoplastic adhesives have a glass transition temperature in a layer farther from a bonding surface with the metal plate. The multi-layered lead frame according to claim 3, wherein the height is higher. 【請求項７】 複数のリード上に当該複数のリード側と
なる片面に絶縁性接着剤層が塗布された金属板を前記絶
縁性接着剤層を介して貼り合わせられた多層リードフレ
ームと、 前記金属板上に導電性接着剤を介して固定された半導体
素子と、 前記複数のリードと前記半導体素子を接続するボンディ
ンクワイヤと、 前記複数のリードの一部を残して全体を包囲するように
施された樹脂モールド体とを備えたことを特徴とする多
層リードフレームを用いた半導体装置。7. A multi-layered lead frame, comprising: a plurality of leads, a metal plate having an insulating adhesive layer applied to one surface of the plurality of leads, the metallic plate being bonded via the insulating adhesive layer; A semiconductor element fixed on a metal plate via a conductive adhesive, a bonding wire connecting the plurality of leads to the semiconductor element, and a part of the plurality of leads so as to surround the whole. A semiconductor device using a multilayer lead frame, comprising: a resin mold body that has been applied. 【請求項８】 前記絶縁性接着剤層は、前記金属板の片
面の一部を残して略全面に塗布されることにより、前記
一部に前記金属板の露出部を有し、 前記導電性接着剤層は前記露出部を介して前記金属板と
電気的に接続されている構成の請求項７の多層リードフ
レームを用いた半導体装置。8. The insulative adhesive layer is applied to substantially the entire surface of the metal plate except a part of one side of the metal plate, so that the exposed part of the metal plate is provided in the part. The semiconductor device using a multilayer lead frame according to claim 7, wherein the adhesive layer is electrically connected to the metal plate via the exposed portion. 【請求項９】 前記金属板は、所定の深さの接着剤充填
孔を有し、 前記絶縁性接着剤層は、前記金属板の片面の前記接着剤
充填孔を残すように略全面に塗布され、 前記導電性接着剤は前記接着剤充填孔を介して前記金属
板と電気的に接続されている構成の請求項７，或いは８
の多層リードフレームを用いた半導体装置。9. The metal plate has an adhesive filling hole of a predetermined depth, and the insulative adhesive layer is applied to substantially the entire surface of the metal plate so as to leave the adhesive filling hole on one side. The conductive adhesive is electrically connected to the metal plate through the adhesive filling hole.
Device using the multilayer lead frame of. 【請求項１０】 前記金属板は、所定の高さの突起を有
し、 前記絶縁性接着剤層は、前記金属板の片面の前記突起を
残すように略全面に塗布され、 前記突起は前記半導体素子の裏面と電気的に接続されて
いる構成の請求項７の多層リードフレームを用いた半導
体装置。10. The metal plate has protrusions of a predetermined height, and the insulating adhesive layer is applied to substantially the entire surface of the metal plate so as to leave the protrusions on one surface of the metal plate, and the protrusions are A semiconductor device using the multilayer lead frame according to claim 7, which is electrically connected to the back surface of the semiconductor element.
JP34294893A 1993-12-15 1993-12-15 Multilayer lead frame and semiconductor device utilizing the same Pending JPH07169900A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34294893A JPH07169900A (en) 1993-12-15 1993-12-15 Multilayer lead frame and semiconductor device utilizing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34294893A JPH07169900A (en) 1993-12-15 1993-12-15 Multilayer lead frame and semiconductor device utilizing the same

Publications (1)

Publication Number Publication Date
JPH07169900A true JPH07169900A (en) 1995-07-04

Family

ID=18357760

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34294893A Pending JPH07169900A (en) 1993-12-15 1993-12-15 Multilayer lead frame and semiconductor device utilizing the same

Country Status (1)

Country Link
JP (1) JPH07169900A (en)

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