JPH0715216Y2 - PLL tuning device - Google Patents
PLL tuning deviceInfo
- Publication number
- JPH0715216Y2 JPH0715216Y2 JP1989057324U JP5732489U JPH0715216Y2 JP H0715216 Y2 JPH0715216 Y2 JP H0715216Y2 JP 1989057324 U JP1989057324 U JP 1989057324U JP 5732489 U JP5732489 U JP 5732489U JP H0715216 Y2 JPH0715216 Y2 JP H0715216Y2
- Authority
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- Japan
- Prior art keywords
- frequency
- phase
- signal
- circuit
- oscillation signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Description
【考案の詳細な説明】 [産業上の利用分野] この考案は、位相比較動作をキード型とした位相ロック
ドループを用いたPLL選局装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of use] The present invention relates to a PLL tuning device using a phase locked loop with a keyed phase comparison operation.
[従来の技術] 第3図に示すテレビジョン受像機1は、PLL選局装置2
を内蔵するものである。アンテナ3により捕捉されたテ
レビジョン電波に含まれる高周波映像信号を、PLL選局
装置2において特定チャンネルの映像中間周波信号に周
波数変換したのち、映像中間周波増幅回路4を介して映
像検波回路5に送り込む。映像検波回路5において同期
検波により抽出された合成映像信号は、映像増幅回路6
にて増幅されたのち、マトリクス回路7を介してCRT受
像管8に送り込まれる。映像増幅回路6には、色復調回
路9と同期分離回路10が接続してあり、色復調回路9に
て復調された色信号がマトリクス回路7に供給され、一
方また同期分離回路10にて分離された水平と垂直の各同
期信号が、偏向回路11に送り込まれる。[Prior Art] A television receiver 1 shown in FIG.
Is built in. The high frequency video signal included in the television radio wave captured by the antenna 3 is frequency-converted into a video intermediate frequency signal of a specific channel in the PLL tuning device 2, and then the video intermediate frequency amplification circuit 4 is used to output the video detection circuit 5 to the video detection circuit 5. Send in. The composite video signal extracted by the synchronous detection in the video detection circuit 5 is the video amplification circuit 6
After being amplified by, it is sent to the CRT picture tube 8 via the matrix circuit 7. A color demodulation circuit 9 and a sync separation circuit 10 are connected to the video amplification circuit 6, and the color signal demodulated by the color demodulation circuit 9 is supplied to the matrix circuit 7, while it is separated by the sync separation circuit 10 again. The horizontal and vertical synchronizing signals thus generated are sent to the deflection circuit 11.
PLL選局装置2は、選局操作により分周比が可変される
位相ロックドループからなる局部発振回路12を有してお
り、アンテナ3に接続された入力回路13から高周波増幅
回路14を介して混合回路15に送り込まれた高周波映像信
号に対し、選局チャンネルに応じた局部発振信号を混合
することで、58.75MHzの映像中間周波信号を得るもので
ある。局部発振回路12は、第4図に示す位相ロックドル
ープを有しており、プログラマブルディバイダ分周器16
として用いることで、例えば4ビットマイクロコンピュ
ータからの選局指令をもって分周比が随意設定できるよ
うにしてある。また、水晶振動子を内蔵する基準発振器
17の発振出力は、位相比較器18にて分周器16の分周出力
と位相比較され、そのさいに得られる位相比較誤差が同
調電圧として低域波回路19を介して電圧制御発振器20
に送り込まれる。従って、電圧制御発振器20は、位相比
較誤差に応じた周波数をもつ発振出力を局部発振信号と
して出力し、この局部発振信号が分周器16を介して位相
比較器18に帰還されることにより、局部発振信号の周波
数制御が行われる。The PLL tuning device 2 has a local oscillation circuit 12 consisting of a phase-locked loop whose frequency division ratio is variable by tuning operation, and from an input circuit 13 connected to the antenna 3 via a high frequency amplifier circuit 14. By mixing the local oscillation signal corresponding to the selected channel with the high frequency video signal sent to the mixing circuit 15, a video intermediate frequency signal of 58.75 MHz is obtained. The local oscillator circuit 12 has the phase locked loop shown in FIG.
As a result, the frequency division ratio can be arbitrarily set by a channel selection command from a 4-bit microcomputer, for example. In addition, a reference oscillator with a built-in crystal oscillator
The oscillation output of 17 is phase-compared with the frequency-divided output of the frequency divider 16 by the phase comparator 18, and the phase comparison error obtained at that time is used as a tuning voltage via the low-frequency wave circuit 19 and the voltage-controlled oscillator 20.
Sent to. Therefore, the voltage controlled oscillator 20 outputs an oscillation output having a frequency corresponding to the phase comparison error as a local oscillation signal, and the local oscillation signal is fed back to the phase comparator 18 via the frequency divider 16, Frequency control of the local oscillation signal is performed.
[考案が解決しようとする課題] 上記従来のPLL選局装置2は、局部発振回路12内に高精
度の水晶振動子を内蔵する基準発振器17を用いること
で、定常位相誤差を極力押さえることができるが、位相
比較器18と電圧制御発振器20の間に、低域波回路19が
介在させてあるために、位相比較器18の出力に含まれる
リプル成分を完全に除去することはできない。低域波
回路19は、元来、位相比較器18の出力に含まれるリプル
成分を除去し、同調電圧を直流として電圧制御発振器20
に与える役割を担うものであり、その波特性は、ロッ
クアップタイムやループ帯域幅或はループ利得といった
位相ロックドループ全体の基本的な動特性を考慮して決
定するのが普通であり、例えば定常位相誤差を抑制する
観点からは、波帯域をできる限り狭めるのがよいとさ
れている。[Problems to be Solved by the Invention] The conventional PLL channel selecting device 2 can suppress the stationary phase error as much as possible by using the reference oscillator 17 in which the high-precision crystal oscillator is built in the local oscillation circuit 12. However, since the low-pass wave circuit 19 is interposed between the phase comparator 18 and the voltage controlled oscillator 20, the ripple component contained in the output of the phase comparator 18 cannot be completely removed. The low-pass wave circuit 19 originally removes the ripple component included in the output of the phase comparator 18, and uses the tuning voltage as a DC voltage controlled oscillator 20.
The wave characteristics are usually determined in consideration of the basic dynamic characteristics of the entire phase locked loop such as lockup time, loop bandwidth or loop gain. From the viewpoint of suppressing the stationary phase error, it is said that the wave band should be narrowed as much as possible.
しかし、低域波回路19の波帯域を狭めると、系の応
答速度が犠牲にされるため、引き込み時間が長くなった
り、キャプチャレンジが狭くなるなどの弊害を招いてし
まい、特に分周器16の分周比を徐々に変えつつ、自動同
調を計る自動選局機能をもたせるような場合に、選局動
作が素早く行えないといった問題が生ずる。従って、低
域波回路19の帯域幅には下限を設ける必要があり、位
相ロックドループにもある程度は定常位相誤差の存在を
許容せざるを得ない。このため、従来のPLL選局装置2
の出力である映像中間周波信号の搬送周波数には、58.7
5MHzを中心に常時微妙な揺らぎが付きまとっており、こ
の周波数の揺らぎが、映像検波回路5後段の映像増幅回
路6に接続される色復調回路9において、色復調軸の変
動要因を形成するために、色復調精度が悪いといった課
題を抱えていた。However, if the wave band of the low-frequency circuit 19 is narrowed, the response speed of the system is sacrificed, which causes adverse effects such as a long pull-in time and a narrow capture range. When the automatic tuning function for measuring the automatic tuning is provided while gradually changing the frequency division ratio, the problem that the tuning operation cannot be performed quickly occurs. Therefore, it is necessary to set a lower limit to the bandwidth of the low-pass wave circuit 19, and there is no choice but to allow the existence of a steady phase error in the phase locked loop to some extent. Therefore, the conventional PLL channel selection device 2
The carrier frequency of the video intermediate frequency signal that is the output of
There is always a subtle fluctuation around 5 MHz, and this fluctuation in the frequency is used to form a variation factor of the color demodulation axis in the color demodulation circuit 9 connected to the video amplification circuit 6 at the subsequent stage of the video detection circuit 5. The problem was that the color demodulation accuracy was poor.
また、映像検波回路5として、位相ロックドループによ
り入力映像中間周波信号と同位相かつ同周波数の信号を
生成し、プロダクト検波するいわゆるPLL同期検波回路
を用いる場合に、例えばクリアビジョン放送信号の垂直
帰線期間に重畳されたゴーストキャンセルリファレンス
信号の抽出精度を高める目的で、水平と垂直の各同期信
号期間にだけ位相ロックドループを活性化させるいわゆ
るキード型の構成を採用したような場合に、入力映像中
間周波信号の周波数の揺らぎが、常時位相ロックドルー
プを活性化させていたこれまでのPLL同期検波回路には
見られなかったような悪影響を及ぼし、映像検波精度の
低下、ひいては色復調回路9の復調精度の劣化を招くと
いった課題を抱えていた。Further, when a so-called PLL synchronous detection circuit that generates a signal having the same phase and the same frequency as the input video intermediate frequency signal by a phase locked loop as the video detection circuit 5 and that performs product detection is used, for example, the vertical feedback of a clear vision broadcast signal is used. In order to improve the extraction accuracy of the ghost cancellation reference signal superimposed on the line period, when the so-called keyed type configuration that activates the phase locked loop only in each horizontal and vertical synchronization signal period is adopted, the input video Fluctuations in the frequency of the intermediate frequency signal have an adverse effect that has not been seen in the PLL synchronous detection circuit which has always activated the phase-locked loop, and the deterioration of the image detection accuracy, and eventually the color demodulation circuit 9. There was a problem that the demodulation accuracy was deteriorated.
[課題を解決するための手段] この考案は、上記課題を解決したものであり、高周波映
像信号に混合して映像中間周波信号を得るための局部発
振信号を、選局チャンネルに応じた分周比をもって位相
ロックドループ内で分周し、基準発振信号に位相が一致
するよう帰還させることで周波数制御するPLL選局装置
において、選局チャンネルに応じた局部発振信号の分周
出力と基準発振信号との位相比較動作を、実質的に水平
又は垂直の同期信号期間或は水平と垂直の各同期信号期
間に限定して行う位相ロックドループを具備したことを
特徴とするものである。[Means for Solving the Problems] The present invention is to solve the above problems, and divides a local oscillation signal for mixing with a high frequency video signal to obtain a video intermediate frequency signal according to a selected channel. In a PLL tuning device that performs frequency control by dividing the frequency in a phase-locked loop with a ratio and feeding it back so that the phase matches the reference oscillation signal, the divided output of the local oscillation signal and the reference oscillation signal according to the selected channel. And a phase-locked loop for performing the phase comparison operation with the above in substantially the horizontal or vertical synchronizing signal period or each of the horizontal and vertical synchronizing signal periods.
[作用] この考案は、高周波映像信号に混合して映像中間周波信
号を得るための局部発振信号を、選局チャンネルに応じ
た分周比をもって位相ロックドループ内で分周し、基準
発振信号に位相が一致するよう帰還させることで周波数
制御するとともに、局部発振信号の分周出力と基準発振
信号との位相比較動作を、実質的に水平又は垂直の同期
信号期間或は水平と垂直の各同期信号期間に限定して行
うことにより、映像中間周波の搬送周波数の変動を抑制
し、特に色復調動作の安定化を図る。[Operation] The present invention divides a local oscillation signal for obtaining a video intermediate frequency signal by mixing it with a high frequency video signal in a phase locked loop with a frequency division ratio according to a selected channel to obtain a reference oscillation signal. The frequency is controlled by feeding back so that the phases match, and the phase comparison operation of the divided output of the local oscillation signal and the reference oscillation signal is performed in a substantially horizontal or vertical synchronization signal period or each horizontal and vertical synchronization. By limiting the operation to the signal period, fluctuations in the carrier frequency of the video intermediate frequency are suppressed, and particularly the color demodulation operation is stabilized.
[実施例] 以下、この考案の実施例について、第1,2図を参照して
説明する。第1図は、この考案のPLL選局装置の一実施
例を示す回路構成図である。[Embodiment] An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a circuit configuration diagram showing an embodiment of the PLL channel selecting apparatus of the present invention.
第1図中、PLL選局装置21は、位相ロックドループから
なる局部発振回路22内の位相比較器23を、水平と垂直の
各同期信号期間内でのみ位相比較動作させる構成とした
ものであり、同期分離回路10にて分離された水平と垂直
の各同期信号を、タイミング信号として位相比較器23に
供給することで、キード型の位相比較動作を実現するも
のである。すなわち、位相ロックドループ内の位相比較
器23は、水平と垂直の各同期信号期間中にのみ位相比較
動作を行うため、低域波回路19の波出力に含まれる
リプル成分が、映像表示期間中に映像中間周波信号の搬
送周波数に変動をもたらすことはない。従って、位相ロ
ックドループ選局方式にもとづく映像中間周波信号の周
波数の揺らぎを、きわめて限定されたものとすることが
でき、カラーバースト信号の位相検波性能が復調精度に
重大な影響を及ぼす色復調回路9の動作を安定させ、色
復調軸が5度程度ずれるだけで色の変化が視認されると
いわれる色復調精度を、十分高めることができる。In FIG. 1, the PLL channel selecting device 21 has a structure in which a phase comparator 23 in a local oscillation circuit 22 composed of a phase locked loop operates a phase comparison operation only within each horizontal and vertical synchronizing signal period. By supplying the horizontal and vertical sync signals separated by the sync separation circuit 10 to the phase comparator 23 as timing signals, a keyed type phase comparison operation is realized. That is, since the phase comparator 23 in the phase locked loop performs the phase comparison operation only during each horizontal and vertical synchronizing signal period, the ripple component included in the wave output of the low-pass wave circuit 19 is changed during the video display period. Therefore, the carrier frequency of the video intermediate frequency signal is not changed. Therefore, the fluctuation of the frequency of the video intermediate frequency signal based on the phase locked loop tuning system can be made extremely limited, and the phase detection performance of the color burst signal has a significant influence on the demodulation accuracy. It is possible to stabilize the operation of No. 9 and sufficiently improve the color demodulation accuracy in which the color change is visually recognized only by shifting the color demodulation axis by about 5 degrees.
すなわち、PLL選局装置21は、局部発振信号の分周出力
と基準発振信号との位相比較動作を、実質的に水平と垂
直の各同期信号期間に限定して行うことで、基準発振信
号を倍周して局部発振信号を生成する位相ロックドルー
プに付随する定常位相誤差を、映像表示期間中は固定
し、水平又は垂直の各同期信号期間においてのみ修正さ
せることで、映像表示期間における映像中間周波信号の
搬送周波数の変動を良好に抑制することができ、これに
より色復調回路9の動作を安定させ、色復調の精度を高
めることができる。また、特にバースト期間に限って位
相比較を行うキードAPC方式の色復調回路を用いるテレ
ビジョン受像機に対しては、位相比較動作を水平同期信
号期間又は垂直同期信号期間に限定したPLL選局装置21
との相性が非常に良いために、色復調の忠実度をさらに
高めることができる。さらにまた、クリアビジョン放送
等において導入されるゴーストキャンセルリファレンス
信号のように、垂直帰線期間に重畳されて送られてくる
信号を分離する上で、映像中間周波増幅回路4に接続さ
れる映像検波回路5において、水平又は垂直の同期信号
期間にだけ位相比較動作を行うキード型APC方式PLL同期
検波回路を用いる場合等にも、キード型位相ロックドル
ープを用いるPLL選局装置21との相性が頗る良いので、
ゴーストキャンセルリファレンス信号を良好に分離し、
優れたゴーストキャンセル効果を挙げることができる。That is, the PLL tuning device 21 performs the phase comparison operation of the frequency-divided output of the local oscillation signal and the reference oscillation signal by limiting the reference oscillation signal to the substantially horizontal and vertical synchronization signal periods. The stationary phase error that accompanies the phase-locked loop that doubles the frequency to generate the local oscillation signal is fixed during the video display period, and is corrected only during each horizontal or vertical synchronization signal period. Fluctuations in the carrier frequency of the frequency signal can be favorably suppressed, whereby the operation of the color demodulation circuit 9 can be stabilized and the accuracy of color demodulation can be improved. Further, particularly for a television receiver using a keyed APC color demodulation circuit that performs phase comparison only in a burst period, a PLL channel selection device in which the phase comparison operation is limited to a horizontal synchronizing signal period or a vertical synchronizing signal period. twenty one
Since it is very compatible with, it is possible to further improve the fidelity of color demodulation. Furthermore, a video detection signal connected to the video intermediate frequency amplifier circuit 4 is used to separate a signal which is superimposed and sent in the vertical blanking period, such as a ghost cancellation reference signal introduced in clear vision broadcasting. In the circuit 5, even when a keyed APC PLL synchronous detection circuit that performs a phase comparison operation only in a horizontal or vertical sync signal period is used, the compatibility with the PLL channel selection device 21 using the keyed phase locked loop is excellent. So good
Good separation of ghost cancellation reference signal,
An excellent ghost canceling effect can be provided.
第2図に示すPLL選局装置31は、局部発振回路32内の低
域波回路19と電圧制御発振器20の間に、水平同期信号
又は垂直同期信号をサンプル・ホールドパルスとして低
域波回路19の出力を保持するサンプル・ホールド回路
33を設けたものである。この実施例の場合も、位相比較
器18における位相比較動作は、実質的には水平同期期間
と垂直同期期間においてのみ行われる。The PLL channel selecting device 31 shown in FIG. 2 has a low-frequency wave circuit 19 between the low-frequency wave circuit 19 and the voltage-controlled oscillator 20 in the local oscillation circuit 32, using a horizontal synchronizing signal or a vertical synchronizing signal as a sample and hold pulse. Hold circuit that holds the output of the
33 is provided. Also in the case of this embodiment, the phase comparison operation in the phase comparator 18 is substantially performed only in the horizontal synchronization period and the vertical synchronization period.
また、位相比較動作をキード型とする前述の実施例と比
較し、サンプル・ホールド回路33を付加した分だけ、回
路構成が複雑化するかのごとき印象を与えるが、低域
波回路19の波出力に含まれるリプル成分を除去する目
的からは、低域波回路19の前段側における処理も後段
側における処理も顕著な差異はなく、既製のサンプル・
ホールド回路33を用いる方が設計上の自由度が高い場合
もあるため、回路方式の選択はケースバイケースで行う
とよい。Further, compared with the above-mentioned embodiment in which the phase comparison operation is of the keyed type, the impression that the circuit configuration is complicated by the addition of the sample and hold circuit 33 is added. From the purpose of removing the ripple component contained in the output, there is no significant difference between the processing on the front side and the processing on the rear side of the low-frequency circuit 19, and it is
Since the use of the hold circuit 33 may have a higher degree of freedom in design in some cases, it is preferable to select the circuit method on a case-by-case basis.
なお、上記両実施例では、位相ロックドループ内の位相
比較動作を水平と垂直の各同期信号期間に限定したが、
水平同期信号期間又は垂直同期信号期間のいずれか一方
だけに限定することも可能である。In both of the above embodiments, the phase comparison operation in the phase locked loop is limited to the horizontal and vertical sync signal periods,
It is also possible to limit to either the horizontal synchronizing signal period or the vertical synchronizing signal period.
[考案の効果] 以上説明したように、この考案は、高周波映像信号に混
合して映像中間周波信号を得るための局部発振信号を、
選局チャンネルに応じた分周比をもって位相ロックドル
ープ内で分周し、基準発振信号に位相が一致するよう帰
還させることで周波数制御するとともに、局部発振信号
の分周出力と基準発振信号との位相比較動作を、実質的
に水平又は垂直の同期信号期間或は水平と垂直の各同期
信号期間に限定して行う構成としたから、基準発振信号
を倍周して局部発振信号を生成する位相ロックドループ
に付随する定常位相誤差を、映像表示期間中は固定し、
水平又は垂直の各同期信号期間においてのみ修正させる
ことで、映像表示期間における映像中間周波信号の搬送
周波数の変動を良好に抑制することができ、これにより
カラーバースト信号の位相検波性能が復調精度に重大な
影響を及ぼす色復調回路の動作を安定させ、色復調の精
度を高めることができ、特にバースト期間に限って位相
比較を行うキードAPC方式の色復調回路を用いるテレビ
ジョン受像機に対しては、位相比較動作を水平同期信号
期間又は垂直同期信号期間に限定したPLL選局装置との
相性が非常に良いため、色復調の忠実度をさらに高める
ことができ、さらにまたクリアビジョン放送等において
導入されるゴーストキャンセルリファレンス信号のよう
に、垂直帰線期間に重畳されて送られてくる信号を分離
する上で、映像中間周波増幅回路に接続される同期検波
回路において、水平又は垂直の同期信号期間にだけ位相
比較動作を行うキード型APC方式PLL同期検波回路を用い
る場合等にも有効であり、ゴーストキャンセルリファレ
ンス信号を良好に分離することで、ゴーストキャンセル
効果を高めることができる等の優れた効果を奏する。[Advantage of Device] As described above, the device of the present invention mixes a high-frequency video signal with a local oscillation signal for obtaining a video intermediate frequency signal.
Frequency division is performed in the phase-locked loop with the division ratio according to the selected channel, and the frequency is controlled by feeding back so that the phase matches the reference oscillation signal, and the divided output of the local oscillation signal and the reference oscillation signal Since the phase comparison operation is configured to be substantially limited to the horizontal or vertical synchronizing signal period or each of the horizontal and vertical synchronizing signal periods, the phase for multiplying the reference oscillation signal to generate the local oscillation signal Fixed the stationary phase error accompanying the locked loop during the video display period,
By correcting only in each horizontal or vertical sync signal period, it is possible to satisfactorily suppress the fluctuation of the carrier frequency of the video intermediate frequency signal in the video display period, and thereby the phase detection performance of the color burst signal is improved in demodulation accuracy. A television receiver that uses a keyed APC system color demodulation circuit that stabilizes the operation of the color demodulation circuit that has a significant effect and can improve the accuracy of color demodulation, and that performs phase comparison only in the burst period. Has a very good compatibility with the PLL tuning device that limits the phase comparison operation to the horizontal sync signal period or the vertical sync signal period, so that the fidelity of color demodulation can be further increased, and in clear vision broadcasting, etc. Like the ghost cancellation reference signal that is introduced, when separating the signal that is superimposed and sent during the vertical blanking period, In a synchronous detection circuit connected to an amplifier circuit, it is also effective when using a keyed APC PLL synchronous detection circuit that performs a phase comparison operation only during a horizontal or vertical synchronous signal period, and it is possible to obtain a good ghost cancellation reference signal. Separation provides an excellent effect such as enhancing the ghost canceling effect.
また、この考案は、分周器の分周出力と基準発振信号
を、水平又は垂直の同期信号期間或は水平と垂直の各同
期信号期間においてのみ位相比較し、比較誤差を出力す
る位相比較器を用いて位相ロックドループを構成するこ
とにより、位相ロックドループの基本的な構成要素以外
に特別な回路を付加することなく、単に位相比較器をキ
ード型の構成とするだけで、映像中間周波信号の搬送周
波数の変動を良好に抑制することができる等の効果を奏
する。Also, the present invention is a phase comparator for comparing the frequency division output of a frequency divider and a reference oscillation signal only in a horizontal or vertical synchronizing signal period or in each horizontal and vertical synchronizing signal period and outputting a comparison error. By configuring the phase-locked loop using the, the intermediate frequency signal of the video signal can be obtained by simply making the phase comparator a keyed type configuration without adding any special circuit other than the basic components of the phase-locked loop. It is possible to effectively suppress the fluctuation of the carrier frequency.
さらにまた、水平又は垂直の同期信号期間或は水平と垂
直の各同期信号期間においてサンプル・ホールドするサ
ンプル・ホールド回路を、低域波回路と分周器の間に
設けた位相ロックドループを用いることにより、低域
波回路の波出力として得られる同調電圧を、水平又は
垂直の同期信号期間において、確実に固定させることが
でき、これにより映像中間周波の搬送周波数の変動を良
好に抑制することができる等の効果を奏する。Furthermore, a phase-locked loop provided between a low-frequency wave circuit and a frequency divider is used as a sample-hold circuit for sample-holding in a horizontal or vertical synchronizing signal period or in each horizontal and vertical synchronizing signal period. As a result, the tuning voltage obtained as the wave output of the low-frequency circuit can be reliably fixed in the horizontal or vertical synchronizing signal period, and thereby the fluctuation of the carrier frequency of the video intermediate frequency can be suppressed well. There is an effect such as being able to.
第1図は、この考案のPLL選局装置の一実施例を示す回
路構成図、第2図は、この考案のPLL選局装置の他の実
施例を示す回路構成図、第3図は、従来のPLL選局装置
を用いたテレビジョン受像機の一例を示す回路構成図、
第4図は、第3図に示した局部発振回路の回路構成図で
ある。 21,31……PLL選局装置,22,32……局部発振回路,23……
位相比較器,33……サンプル・ホールド回路。FIG. 1 is a circuit configuration diagram showing an embodiment of a PLL channel selection device of the present invention, FIG. 2 is a circuit configuration diagram showing another embodiment of a PLL channel selection device of the present invention, and FIG. Circuit configuration diagram showing an example of a television receiver using a conventional PLL channel selection device,
FIG. 4 is a circuit configuration diagram of the local oscillator circuit shown in FIG. 21,31 …… PLL tuning device, 22,32 …… Local oscillation circuit, 23 ……
Phase comparator, 33 …… Sample and hold circuit.
Claims (3)
号を得るための局部発振信号を、選局チャンネルに応じ
た分周比をもって位相ロックドループ内で分周し、基準
発振信号に位相が一致するよう帰還させることで周波数
制御するPLL選局装置において、選局チャンネルに応じ
た局部発振信号の分周出力と基準発振信号との位相比較
動作を、実質的に水平又は垂直の同期信号期間或は水平
と垂直の各同期信号期間に限定して行う位相ロックドル
ープを具備してなるPLL選局装置。1. A local oscillation signal for mixing with a high frequency video signal to obtain a video intermediate frequency signal is divided in a phase locked loop with a division ratio according to a selected channel, and the reference oscillation signal has a phase. In the PLL tuning device that controls the frequency by feeding back so as to match, the phase comparison operation of the divided output of the local oscillation signal and the reference oscillation signal according to the tuning channel is performed in a substantially horizontal or vertical synchronization signal period. Alternatively, a PLL channel selection device comprising a phase locked loop which is performed only during each horizontal and vertical synchronizing signal period.
を選局チャンネルに応じた分周比にて分周する分周器
と、この分周器の分周出力と基準発振信号を、水平又は
垂直の同期信号期間或は水平と垂直の各同期信号期間に
おいてのみ位相比較し、比較誤差を出力する位相比較器
と、この位相比較器の出力を低域波する低域波回路
と、この低域波回路の出力に応じた周波数をもつ局部
発振信号を出力する電圧制御発振器とを具備することを
特徴とする請求項1記載のPLL選局装置。2. The phase-locked loop divides a local oscillation signal by a frequency division ratio according to a selected channel, and a frequency division output of the frequency divider and a reference oscillation signal in a horizontal or horizontal direction. A phase comparator that performs phase comparison and outputs a comparison error only in the vertical synchronizing signal period or in each horizontal and vertical synchronizing signal period, a low-pass wave circuit that low-passes the output of this phase comparator, and this low-frequency circuit 2. The PLL channel selection apparatus according to claim 1, further comprising a voltage controlled oscillator that outputs a local oscillation signal having a frequency according to the output of the band-wave circuit.
を選局チャンネルに応じた分周比にて分周する分周器
と、この分周器の分周出力と基準発振信号を位相比較
し、比較誤差を出力する位相比較器と、この位相比較器
の出力を低域波する低域波回路と、この低域波回
路の波出力を、水平又は垂直の同期信号期間或は水平
と垂直の各同期信号期間においてサンプル・ホールドす
るサンプル・ホールド回路と、このサンプル・ホールド
回路の出力に応じた周波数をもつ局部発振信号を出力す
る電圧制御発振器とを具備することを特徴とする請求項
1記載のPLL選局装置。3. The phase-locked loop compares the frequency of a local oscillation signal with a frequency division ratio corresponding to a selected channel and a frequency division output of the frequency divider and a reference oscillation signal. , A phase comparator that outputs a comparison error, a low-pass wave circuit that low-passes the output of this phase comparator, and a wave output of this low-pass wave circuit that is used for a horizontal or vertical sync signal period or a horizontal and vertical 2. A sample-hold circuit for sampling and holding in each synchronization signal period of 1), and a voltage controlled oscillator outputting a local oscillation signal having a frequency according to the output of the sample-hold circuit. The described PLL channel selection device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989057324U JPH0715216Y2 (en) | 1989-05-18 | 1989-05-18 | PLL tuning device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989057324U JPH0715216Y2 (en) | 1989-05-18 | 1989-05-18 | PLL tuning device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02147942U JPH02147942U (en) | 1990-12-17 |
JPH0715216Y2 true JPH0715216Y2 (en) | 1995-04-10 |
Family
ID=31581925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989057324U Expired - Lifetime JPH0715216Y2 (en) | 1989-05-18 | 1989-05-18 | PLL tuning device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0715216Y2 (en) |
-
1989
- 1989-05-18 JP JP1989057324U patent/JPH0715216Y2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH02147942U (en) | 1990-12-17 |
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