JPH0714880A - Mounting method for chip of semiconductor integrated circuit and electronic equipment mounted therewith - Google Patents
Mounting method for chip of semiconductor integrated circuit and electronic equipment mounted therewithInfo
- Publication number
- JPH0714880A JPH0714880A JP5678392A JP5678392A JPH0714880A JP H0714880 A JPH0714880 A JP H0714880A JP 5678392 A JP5678392 A JP 5678392A JP 5678392 A JP5678392 A JP 5678392A JP H0714880 A JPH0714880 A JP H0714880A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor integrated
- substrate
- chip
- circuit chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、液晶表示装置、サーマ
ルヘッド、ＬＥＤアレイ等の半導体集積回路を利用した
製品において、駆動用の半導体集積回路チップを実装す
る方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting a semiconductor integrated circuit chip for driving in a product using a semiconductor integrated circuit such as a liquid crystal display device, a thermal head and an LED array.
【０００２】[0002]
【従来の技術】従来より、液晶表示装置、サーマルヘッ
ド、ＬＥＤアレイ等の半導体集積回路を利用した製品に
おいてはこれらの装置を駆動用するための半導体製品を
プリント配線基板上に実装し、このプリント基板を液晶
表示装置、サーマルヘッド、ＬＥＤアレイ等の製品に付
加した構成として商品化されている。2. Description of the Related Art Conventionally, in products using semiconductor integrated circuits such as liquid crystal display devices, thermal heads, LED arrays, etc., semiconductor products for driving these devices are mounted on a printed wiring board and printed. It is commercialized as a configuration in which the substrate is added to products such as liquid crystal display devices, thermal heads, and LED arrays.
【０００３】この例を液晶電気光学装置で示す。通常の
液晶電気光学装置はＰＣＢ方式と呼ばれ、図２に示すよ
うなプリント回路基板２１（以下ＰＣＢ）上に樹脂でモ
ールドさせたパッケージＩＣ２２を搭載し、回路配線２
３を通じて、さらにゴムコネクター、またはフレキシブ
ル基板２４を用いて、液晶パネル２５と接続されてい
た。この図面においては基板を２枚重ねただけしか示し
ていないが、実際は液晶の部分が存在している。この実
装構造は現在でも、安価な液晶装置や設置スペースに余
裕のある場合に採用されている。しかしながら、これら
製品の軽量、薄型化等の要求が大きく、製品中に占める
プリント基板の容積が問題とされてきている。This example is shown by a liquid crystal electro-optical device. An ordinary liquid crystal electro-optical device is called a PCB method, and a packaged IC 22 molded with resin is mounted on a printed circuit board 21 (hereinafter referred to as PCB) as shown in FIG.
3 and was further connected to the liquid crystal panel 25 using a rubber connector or a flexible substrate 24. Although only two substrates are shown in this drawing, the liquid crystal portion actually exists. Even now, this mounting structure is used when the liquid crystal device is inexpensive and the installation space is large. However, there is a great demand for reducing the weight and thickness of these products, and the volume of the printed circuit board in the products has become a problem.
【０００４】この問題を解決する構造として、ＣＯＢ方
式と呼ばれ、ＰＣＢ上にチップＩＣを搭載し、ＰＣＢ上
の回路配線にワイヤーボンディング法によって接続し、
樹脂でモールドし、この回路基板と液晶パネルとはじを
フレキシブル基板を用いて接続する構造や、ＴＡＢ方式
と呼ばれ、ポリイミド等の材質によるフィルム上に銅配
線を設け、ＩＣチップをチップ上のバンプ等を介して、
金・金の接合によってこの銅配線と接続し、このフィル
ムを液晶パネルの電極配線と直接接続して液晶電気光学
装置の容積を減らすものであった。これらの構造はいず
れも、ＩＣチップを液晶電気光学装置とは別の基板上に
設け、その基板と液晶パネルとをフィルム等にて接続す
るものであった。As a structure for solving this problem, which is called a COB method, a chip IC is mounted on a PCB and connected to the circuit wiring on the PCB by a wire bonding method,
A structure in which this circuit board and the liquid crystal panel are connected to each other using a flexible board, which is molded with resin, or called the TAB method, copper wiring is provided on a film made of a material such as polyimide, and the IC chip is bumped on the chip. Through etc.
The copper wiring is connected by gold-gold bonding, and the film is directly connected to the electrode wiring of the liquid crystal panel to reduce the volume of the liquid crystal electro-optical device. In all of these structures, the IC chip is provided on a substrate different from the liquid crystal electro-optical device, and the substrate and the liquid crystal panel are connected by a film or the like.
【０００５】一方半導体ＩＣチップを直接に液晶表示装
置、サーマルヘッド、ＬＥＤアレイ等の素子が形成され
た基板上へ設ける方法が提案され一部実用化されてい
る。特に、液晶表示装置のガラス基板上に直接ＩＣチッ
プを設ける技術は広くＣＯＧ（チップ・オン・ガラス）
技術として知られている。このＣＯＧ技術とは、図３に
その概略図を示しているが、例えばガラス基板上３０に
設けられた素子（図３の場合は液晶装置）に接続された
電極配線３１とＩＣチップ３２の取り出し電極３３とを
直接に接続し、プリント配線基板を省略し、周辺のＩＣ
設置部分の容積を減らしたものである。On the other hand, a method of directly providing a semiconductor IC chip on a substrate on which elements such as a liquid crystal display device, a thermal head and an LED array are formed has been proposed and partially put into practical use. In particular, COG (chip on glass) is widely used as a technique for directly mounting an IC chip on a glass substrate of a liquid crystal display device.
Known as technology. This COG technique is shown in a schematic view in FIG. 3. For example, the electrode wiring 31 and the IC chip 32 connected to the element (the liquid crystal device in the case of FIG. 3) provided on the glass substrate 30 are taken out. Directly connected to the electrode 33, omitting the printed wiring board,
The volume of the installation part is reduced.
【０００６】この接続部分の構造としては、図３のよう
に基板上の配線とＩＣチップ３２の電極部３３に設けら
れた導電性の突起物（バンプ）３４とを接触させ、基板
３０とＩＣチップ３２間を有機樹脂３５で固定するもの
や図４に示すように基板上４０の配線４１とＩＣチップ
４２の電極端子４３の間に導電性の粒子４４を分散させ
た有機樹脂４５を設け、この導電性の粒子４４でＩＣチ
ップ４２と基板上の配線４１との接続を行い、導電性の
粒子を分散させた有機樹脂で接着、固定するものがあ
る。また、接着に使用する有機樹脂としては光硬化性の
樹脂や熱硬化性のものあるいは自然硬化性の樹脂等が使
用されている。As for the structure of this connecting portion, as shown in FIG. 3, the wiring on the substrate and the conductive projection (bump) 34 provided on the electrode portion 33 of the IC chip 32 are brought into contact with each other, and the substrate 30 and the IC are connected. An organic resin 45 in which conductive particles 44 are dispersed is provided between the wirings 41 on the substrate 40 and the electrode terminals 43 of the IC chip 42 as shown in FIG. There is one in which the IC chip 42 and the wiring 41 on the substrate are connected by the conductive particles 44 and are bonded and fixed with an organic resin in which the conductive particles are dispersed. Further, as the organic resin used for adhesion, a photocurable resin, a thermosetting resin, a natural curable resin, or the like is used.
【０００７】[0007]
【発明の解決しようとする課題】このような、ＣＯＧ技
術またはフリップチップ技術においては、ＩＣチップが
従来のように樹脂モールドされ、しかもリード電極が形
成されていないために不良のＩＣが発生した場合の補修
技術が問題となる。すなわち、ＩＣはウェハーの状態で
あればＩＣテスター等によって、個々の機能チェックを
行うことは可能であるが、ＩＣチップを基板上に設置す
る為に個々に分断した後では、各々をテストすることは
不可能であり、ＩＣチップはウェハーから分断の後にお
いては、不良が発生することは避けられず、不良のＩＣ
チップが基板上に設置されることがある。In such COG technology or flip chip technology, when a defective IC occurs because the IC chip is resin-molded as in the conventional case and the lead electrode is not formed. The repairing technique of is a problem. That is, if the IC is in a wafer state, it is possible to check individual functions by using an IC tester or the like, but after the IC chips are individually divided to be placed on the substrate, each IC should be tested. Is impossible, and it is inevitable that a defect will occur after the IC chip is separated from the wafer, and the defective IC
The chip may be mounted on the substrate.
【０００８】また、ＩＣチップと基板上の配線とを直接
に接触させるために、接続部分での不良も若干ながら発
生する。当然ながらこれらの不良が発生した場合は不良
箇所のＩＣチップを取り外して、良品のＩＣを再度接続
する必要がある。しかしながら、従来の実装技術では、
ＩＣチップの配線上への固定は一段階の工程で行われる
ために、ＩＣチップを実装後に不良が判明した場合には
不良部分のＩＣを除去し取り替えることが困難であっ
た。Further, since the IC chip and the wiring on the substrate are brought into direct contact with each other, some defects occur at the connecting portion. Of course, when these defects occur, it is necessary to remove the defective IC chip and reconnect a good IC. However, in the conventional mounting technology,
Since the fixing of the IC chip onto the wiring is performed in a one-step process, it is difficult to remove and replace the defective IC when the defect is found after mounting the IC chip.
【０００９】接着用の樹脂として、光硬化性樹脂を使用
した場合、その多くは変性アクリル材からなり完全硬化
後は非常に強力な溶剤を使用して樹脂を解かし取る必要
があった。また、エポキシ系の光硬化性樹脂を使用した
場合には完全硬化後はこの樹脂を溶解させる溶剤がな
く、熱歪みを加えて機械的に剥離させる方法しか存在し
ていなかった。熱硬化性の樹脂を使用した場合も同様
で、樹脂を溶解させる溶剤がなく、熱歪みを加えて機械
的に剥離させる方法しか存在していなかった。When a photo-curable resin is used as an adhesive resin, most of them are made of a modified acrylic material, and it is necessary to dissolve the resin by using a very strong solvent after complete curing. Further, when an epoxy-based photocurable resin is used, there is no solvent for dissolving the resin after complete curing, and there is only a method of mechanically peeling by applying thermal strain. The same applies to the case where a thermosetting resin is used, and there is no solvent for dissolving the resin, and there is only a method of mechanically peeling by applying thermal strain.
【００１０】このような剥離法を用いてＩＣチップのリ
ペアを行った場合、接着に使用した樹脂が一部残存する
とともに、基板上の配線が剥がれたり、配線の接続部分
の表面が汚染され良好な電気接続を実現できなくなっ
た。そのため、基板上に搭載したＩＣチップの機能試験
の後に不良部分を容易にリペアできる確実な方法が求め
られていた。When the IC chip is repaired by using such a peeling method, the resin used for the adhesion is partially left, the wiring on the substrate is peeled off, and the surface of the connecting portion of the wiring is contaminated. It became impossible to realize a good electrical connection. Therefore, there has been a demand for a reliable method capable of easily repairing a defective portion after a functional test of an IC chip mounted on a substrate.
【００１１】[0011]
【課題を解決するための手段】本発明は基板上の電極配
線またはＩＣチップの取り出し電極上の突起物（バン
プ）または導電性粒子を介して、ＩＣチップと配線とを
電気的に接続する際において、光硬化性、熱硬化性ある
いは自然硬化性等異なる硬化条件の有機樹脂を組み合わ
せて混合して使用し仮接着工程の後、不良部分のチェッ
クを行い、不良部分のＩＣを有機樹脂を除去して取り替
えることを特徴とするものである。According to the present invention, when an IC chip and a wiring are electrically connected to each other through an electrode wiring on a substrate or a projection (bump) on an extraction electrode of an IC chip or conductive particles. In the above, the organic resin of different curing conditions such as photo-curing property, thermosetting property or natural curing property is combined and used, and after the temporary adhesion process, the defective part is checked and the IC of the defective part is removed. It is characterized in that it is replaced.
【００１２】具体的なＩＣの実装工程を図１にフローチ
ャートとして示す。すなわち、まず配線付近に光硬化
性、熱硬化性あるいは自然硬化性の有機樹脂を組み合わ
せて混合した接着剤をディスペンサー等で滴下する。次
にＩＣチップと配線の位置合わせを行う、次に圧力を加
えてＩＣチップと配線とを接触させるとともに、光また
は熱を加えて、仮接着する。次にＩＣの不良および接続
の不良テストを行う。このテストで合格したものは、次
工程の本接着へ進み、不合格のものは接着材を除去し、
再度最初の工程に戻るものである。A specific IC mounting process is shown as a flow chart in FIG. That is, first, an adhesive obtained by combining and mixing photocurable, thermosetting, or naturally curable organic resins is dropped near the wiring with a dispenser or the like. Next, the IC chip and the wiring are aligned with each other. Then, pressure is applied to bring the IC chip and the wiring into contact with each other, and light or heat is applied to temporarily bond them. Next, an IC defect and connection defect test is performed. Those that pass this test proceed to the next step of main adhesion, and those that do not pass remove the adhesive,
It returns to the first step again.
【００１３】液晶電気光学装置等複数のＩＣチップを基
板上に多数搭載する場合はこのテストの工程を全てのＩ
Ｃチップが仮接着した後に行う方が効率よくリペアでき
る。ここで、従来はＩＣチップとは、単結晶半導体、例
えば単結晶シリコン上に形成されたモノリシック回路の
ことを意味していたが、例えば、ガラスのような絶縁体
基板上に形成された薄膜半導体回路から成る集積回路で
あってもよい。特に、本発明ではこのような絶縁体上に
形成された集積回路を用いるといくつかのメリットがあ
る。したがって、以下では、ＩＣチップも含めて半導体
集積回路チップと呼ぶこととする。When a plurality of IC chips such as a liquid crystal electro-optical device are mounted on the substrate, this test process is performed for all I
It is more efficient to repair after the C chip is temporarily bonded. Here, conventionally, the IC chip has meant a monolithic circuit formed on a single crystal semiconductor, for example, single crystal silicon, but for example, a thin film semiconductor formed on an insulating substrate such as glass. It may be an integrated circuit including a circuit. In particular, the present invention has some advantages when using an integrated circuit formed on such an insulator. Therefore, hereinafter, the IC chip and the IC chip will be collectively referred to as a semiconductor integrated circuit chip.
【００１４】ここでいう仮接着を実現する為に本発明に
おいては、光硬化性、熱硬化性あるいは自然硬化性の有
機樹脂を組み合わせて混合した接着剤を使用する。そし
てその割合を例えば光硬化性樹脂と熱硬化性樹脂を混合
する場合は光硬化性のものを全体の１０％残りを熱硬化
性にして混合し、仮接着の際には光を照射して、光硬化
性樹脂を硬化させ実現する。一方逆の場合には熱を加え
て仮接着を実現する。このように異なる種類の接着材の
割合の重みを付けて、仮接着を実現するものである。In order to realize the temporary adhesion referred to herein, in the present invention, an adhesive obtained by combining and mixing photocurable, thermosetting or natural curable organic resins is used. Then, for example, when the photo-curable resin and the thermo-curable resin are mixed, 10% of the whole of the photo-curable resin is made thermo-curable and mixed, and light is irradiated at the time of temporary adhesion. Realize by curing the photocurable resin. On the other hand, in the opposite case, heat is applied to achieve temporary adhesion. In this way, the weights of the ratios of the different types of adhesives are weighted to realize temporary adhesion.
【００１５】特に、光硬化性の樹脂と熱硬化性の樹脂と
を光硬化性の樹脂が少ない比率で混合した場合、仮接着
の工程での光照射で硬化するのは光硬化樹脂のみである
ので本発明の特徴である、接着材除去後に残存物が存在
せずかつ清浄な基板表面を実現できる。すなわち、他の
特性の樹脂の混合の組み合わせに比べて、硬化条件の差
が大きく、容易に未接着の部分の接着剤を除去できるも
のである。In particular, when the photo-curable resin and the thermo-curable resin are mixed in a small ratio of the photo-curable resin, only the photo-curable resin is cured by the light irradiation in the temporary adhesion process. Therefore, a characteristic feature of the present invention is that after removing the adhesive, there is no residue and a clean substrate surface can be realized. That is, compared to a combination of mixing resins having other characteristics, the difference in curing conditions is large, and the adhesive in the unbonded portion can be easily removed.
【００１６】また、本発明でいう異なる性質の有機樹脂
を混合することには、異なる硬化条件のものを混合する
ことも含まれる。例えば、光硬化性の場合、硬化する光
の波長が３５０ｎｍと４０５ｎｍのものを１対９の割合
で混合することや、熱硬化の場合、硬化温度１００℃の
ものと２５０℃のものとを混合することも本発明の混合
の範囲に含まれる。Mixing the organic resins having different properties in the present invention also includes mixing under different curing conditions. For example, in the case of photo-curing, the wavelengths of light to be cured are 350 nm and 405 nm in a ratio of 1: 9, and in the case of thermosetting, those having a curing temperature of 100 ° C. and 250 ° C. are mixed. Doing so is also included in the scope of the mixing of the present invention.
【００１７】さらに、異なる特性の有機樹脂の混合割合
は仮接着を行う硬化条件の有機樹脂の割合を少なくする
ものであるが、５０％に近づく程、仮接着後に不良が判
明した場合に半導体集積回路チップを剥がすことが困難
になってくる。その為、仮接着を行う硬化条件の有機樹
脂の割合は２０％以下にする方がリペア後の再度の接着
で良好な電気的接続の結果を得ることができる。逆に０
％に近くなると、電気的な接触を保つために圧力を加え
て仮接着したものがはがれ、電気的な接触がとれなくな
るため、２〜３％以上は必要であった。Further, the mixing ratio of the organic resins having different characteristics is to reduce the ratio of the organic resin under the curing condition for performing the temporary adhesion. However, as the mixing ratio approaches 50%, the semiconductor integration is performed when a defect is found after the temporary adhesion. It becomes difficult to peel off the circuit chip. Therefore, if the proportion of the organic resin under the curing condition for temporary adhesion is 20% or less, good electrical connection results can be obtained by re-adhesion after repair. On the contrary, 0
When it is close to 100%, a pressure-adhered one that is temporarily bonded to maintain electrical contact is peeled off, and electrical contact cannot be made. Therefore, 2 to 3% or more is necessary.
【００１８】また、例えば、仮接着あるいは本接着の際
に光硬化性の樹脂を用いる場合には接着剤に光があたる
必要がある。その場合にはいくつかの組合せが考えられ
る。まず、半導体集積回路チップが従来のＩＣチップの
ような不透明な材料でできている場合には、接着される
べき基板（被接着基板）が透光性を有することが求めら
れる。もし、用いられる接着材が紫外光によって硬化す
るものであれば、基板は石英のような紫外光の透過性が
よいものでなければならない。Further, for example, when a photo-curable resin is used for temporary adhesion or main adhesion, it is necessary that the adhesive is exposed to light. In that case, several combinations are possible. First, when the semiconductor integrated circuit chip is made of an opaque material such as a conventional IC chip, the substrate to be bonded (bonded substrate) is required to have translucency. If the adhesive used is one that is cured by ultraviolet light, the substrate must be one that has a good transmission of ultraviolet light, such as quartz.
【００１９】しかしながら、例えば、液晶表示装置のよ
うな大面積のものに対応するような石英基板は非常に高
価である。また、安い基板は紫外光の透過性に劣る。実
際には、多くの光硬化性の接着剤は紫外光によって硬化
し、可視光以上の波長の電磁波で硬化するものは少な
い。However, for example, a quartz substrate corresponding to a large area such as a liquid crystal display device is very expensive. In addition, a cheap substrate is inferior in ultraviolet light transmission. In reality, many photo-curable adhesives are cured by ultraviolet light, and few are cured by electromagnetic waves having a wavelength longer than visible light.
【００２０】したがって、半導体集積回路チップが不透
明な材料でできているということは、作製プロセス上に
大いなる制約をもたらすこととなる。これに対し、半導
体集積回路が透明な基板、特に紫外光に対しても透明な
基板上に形成されている場合は上記の困難は生じない。
そのような基板材料としては石英が代表的であるが、半
導体集積回路を構成する程度の面積の小さな石英はコス
トも低い。また、石英は特に、耐熱性があるので、半導
体集積回路を作製するプロセスとしては、従来の単結晶
シリコン半導体とほとんど同じ高温プロセス（最高温度
１０００℃以上）を使用することも、あるいは低温プロ
セス（最高温度６００℃程度）を採用することも任意で
ある。このように本発明を実施するにあたっては、対象
とする半導体集積回路チップと被接着基板、および接着
材の特性を考慮することが肝要である。Therefore, the fact that the semiconductor integrated circuit chip is made of an opaque material poses a great limitation on the manufacturing process. On the other hand, when the semiconductor integrated circuit is formed on a transparent substrate, particularly a substrate transparent to ultraviolet light, the above-mentioned difficulties do not occur.
Quartz is a typical material for such a substrate, but the cost is low for quartz having a small area enough to form a semiconductor integrated circuit. Further, since quartz is particularly heat resistant, a high temperature process (maximum temperature of 1000 ° C. or higher), which is almost the same as that of a conventional single crystal silicon semiconductor, can be used as a process for manufacturing a semiconductor integrated circuit, or a low temperature process ( It is also optional to adopt a maximum temperature of about 600 ° C. Thus, in carrying out the present invention, it is important to consider the characteristics of the target semiconductor integrated circuit chip, the substrate to be bonded, and the adhesive material.
【００２１】[0021]
【実施例】〔実施例１〕本実施例は図３に示した構造の
接続を持つＣＯＧ技術に本発明を適用した。実装の工程
は図１のフローチャートに従って各工程を行った。石英
ガラス基板３０上の電極配線３１は公知の方法により、
透明電極を形成後フォトリソ技術により形成され、さら
にＩＣチップとの接続部付近には無電界メッキ法によ
り、ニッケルを０．５μｍ、さらにその上に金を０．０
５μｍの厚さに形成した。シリコンＩＣチップ３２の電
極３３はアルミニウム上にチタンを形成し、その上面に
無電界メッキにより、金を２０μｍ形成しバンプ３４と
した。[Embodiment 1] In this embodiment, the present invention is applied to a COG technique having a connection of the structure shown in FIG. As for the mounting process, each process was performed according to the flowchart of FIG. The electrode wiring 31 on the quartz glass substrate 30 is formed by a known method.
After the transparent electrode is formed, it is formed by the photolithography technique, and nickel near 0.5 μm is further formed on the connection portion with the IC chip by electroless plating.
It was formed to a thickness of 5 μm. For the electrodes 33 of the silicon IC chip 32, titanium was formed on aluminum, and gold was formed to 20 μm on the upper surface of the titanium by electroless plating to form bumps 34.
【００２２】まず配線付近に光硬化性と熱硬化性の有機
樹脂を組み合わせて混合した接着剤をディスペンサー等
で滴下する。この有機樹脂の混合比率は光硬化性樹脂１
５％熱硬化性樹脂８５％とした。First, an adhesive obtained by combining and mixing a photo-curing and thermosetting organic resin is dropped near the wiring by a dispenser or the like. The mixing ratio of this organic resin is 1
It was 5% thermosetting resin 85%.
【００２３】次にＩＣチップと配線の位置合わせを行っ
た。次に圧力を加えてＩＣチップと配線とを接触させる
とともに、３６５ｎｍの波長の光を持つ紫外光源にて、
ガラス基板側から３００秒光を照射し、混合した有機樹
脂のうち光硬化性の有機樹脂のみを硬化し、仮接着し
た。次にＩＣの不良および接続の不良テストを行った。
このテストで合格したものは、次工程の本接着へ進む、
不合格のものは有機樹脂接着剤の溶剤またはシンナーを
樹脂部分に染み込ませて、約６０秒放置後、外部よりゆ
るやかな力を加えて、ＩＣチップを剥離した。その後、
有機樹脂を溶剤にて除去し、清浄な接触面を再現した後
に再度、混合した有機樹脂により、ＩＣチップを接合し
た。Next, the IC chip and the wiring were aligned. Next, pressure is applied to bring the IC chip and the wiring into contact with each other, and with an ultraviolet light source having a light of a wavelength of 365 nm,
Light was irradiated from the glass substrate side for 300 seconds to cure only the photo-curable organic resin among the mixed organic resins, and temporarily adhered. Next, a defective IC test and a defective connection test were conducted.
Those that pass this test proceed to the next step of main adhesion,
In the case of the rejected one, the solvent of the organic resin adhesive or the thinner was soaked in the resin portion, and after leaving it for about 60 seconds, the IC chip was peeled off by applying a gentle force from the outside. afterwards,
After removing the organic resin with a solvent and reproducing a clean contact surface, the IC chip was joined again with the mixed organic resin.
【００２４】このようにして、全てのＩＣチップの正常
動作を確認した後、１２０℃のＮ2雰囲気のオーブン
て、１５分間本接着を行い、ＩＣチップと基板との電気
的な接続と接着を完了した。After confirming the normal operation of all IC chips in this way, main bonding is performed for 15 minutes in an oven at 120 ° C. in N 2 atmosphere to electrically connect and bond the IC chips and the substrate. Completed.
【００２５】表１には本実施例の手法に基づき、リペア
ーを繰り返し行った場合のＩＣチップと配線との接続抵
抗の値を示す。このように繰り返しリペアを行っても接
続抵抗の値が変化せず再現性のよい、電気接続を行える
ことがわかった。Table 1 shows the value of the connection resistance between the IC chip and the wiring when the repair is repeated based on the method of this embodiment. In this way, it was found that the electrical connection can be performed with good reproducibility without changing the value of the connection resistance even if the repair is repeatedly performed.
【００２６】[0026]
【表１】 [Table 1]
【００２７】〔実施例２〕本実施例は図３に示した構造
の接続を持つＣＯＧ技術に本発明を適用したものであ
る。実装の工程は図１のフローチャートに従って各工程
を行った。ソーダガラス基板３０上の電極配線３１は公
知の方法により、透明電極を形成後フォトリソ技術によ
り形成され、さらに半導体集積回路チップとの接続部付
近には無電界メッキ法により、ニッケルを０．５μｍ、
さらにその上に金を０．０５μｍの厚さに形成した。[Embodiment 2] In this embodiment, the present invention is applied to the COG technology having the connection of the structure shown in FIG. As for the mounting process, each process was performed according to the flowchart of FIG. The electrode wiring 31 on the soda glass substrate 30 is formed by a photolithography technique after forming a transparent electrode by a known method, and nickel near 0.5 μm is formed by electroless plating in the vicinity of the connection portion with the semiconductor integrated circuit chip.
Further, gold was formed thereon to a thickness of 0.05 μm.
【００２８】半導体集積回路チップ３２としては、石英
基板上に高温プロセスによって形成した薄膜シリコント
ランジスタからなる回路を用いた。その電極３３はアル
ミニウム上にチタンを形成し、その上面に無電界メッキ
により、金を２０μｍ形成しバンプ３４とした。そし
て、実施例１と同じ同じ接着剤を塗布した。As the semiconductor integrated circuit chip 32, a circuit composed of a thin film silicon transistor formed on a quartz substrate by a high temperature process was used. As the electrode 33, titanium was formed on aluminum, and gold was formed to 20 μm on the upper surface by electroless plating to form bumps 34. Then, the same adhesive as in Example 1 was applied.
【００２９】次に半導体集積回路チップと配線の位置合
わせを行った。次に圧力を加えて半導体集積回路チップ
と配線とを接触させるとともに、３６５ｎｍの波長の光
を持つ紫外光源にて、半導体集積回路側から３００秒光
を照射し、混合した有機樹脂のうち光硬化性の有機樹脂
のみを硬化し、仮接着した。以下の手順は実施例１と同
じであった。このようにして、半導体集積回路チップと
ソーダガラス基板との電気的な接続と接着を完了した。Next, the semiconductor integrated circuit chip and the wiring were aligned. Next, pressure is applied to bring the semiconductor integrated circuit chip and the wiring into contact with each other, and light for 300 seconds is irradiated from the semiconductor integrated circuit side with an ultraviolet light source having a wavelength of 365 nm to photo-cure the mixed organic resin. Only organic organic resin was cured and temporarily bonded. The following procedure was the same as in Example 1. In this way, electrical connection and adhesion between the semiconductor integrated circuit chip and the soda glass substrate were completed.
【００３０】〔実施例３〕本実施例は図３に示した構造
の接続を持つＣＯＧ技術に本発明を適用し、液晶表示装
置（液晶パネル）の作製に用いたものである。実装の工
程は図１のフローチャートに従って各工程を行った。[Embodiment 3] In this embodiment, the present invention is applied to a COG technique having a connection of the structure shown in FIG. 3 and is used for manufacturing a liquid crystal display device (liquid crystal panel). As for the mounting process, each process was performed according to the flowchart of FIG.
【００３１】ガラス基板（コーニング７０５９）３０上
の電極配線３１は公知の方法により、透明電極を形成後
フォトリソ技術により形成され、さらに半導体集積回路
チップとの接続部付近には無電界メッキ法により、ニッ
ケルを０．５μｍ、さらにその上に金を０．０５μｍの
厚さに形成した。ガラス基板は２枚用意し、一方の大き
さは５ｃｍ×１０ｃｍ、他方の大きさは７ｃｍ×６ｃｍ
であった。厚さはいずれも１．１ｍｍであった。これら
のガラス基板には透明導伝膜を形成して、単純マトリク
スで駆動できるようになっている。この液晶表示装置の
画像表示部分の大きさは５ｃｍ×７ｃｍであった。The electrode wiring 31 on the glass substrate (Corning 7059) 30 is formed by the photolithography technique after forming the transparent electrode by a known method, and further, by the electroless plating method in the vicinity of the connection portion with the semiconductor integrated circuit chip. Nickel was formed to a thickness of 0.5 μm, and gold was further formed thereon to a thickness of 0.05 μm. Two glass substrates are prepared, one size is 5 cm x 10 cm, the other size is 7 cm x 6 cm
Met. The thickness was 1.1 mm in all cases. A transparent conductive film is formed on these glass substrates so that they can be driven by a simple matrix. The size of the image display portion of this liquid crystal display device was 5 cm × 7 cm.
【００３２】半導体集積回路チップ３２としては、やは
りコーニング７０５９ガラス基板上にレーザーアニール
プロセスを含む低温プロセスによって形成した薄膜シリ
コントランジスタからなる回路を用いた。その電極３３
はアルミニウム上にチタンを形成し、その上面に無電界
メッキにより、金を２０μｍ形成しバンプ３４とした。
そして、実施例１と同じ同じ接着剤を塗布した。このよ
うに端子部を形成した細長い２種類の集積回路（すなわ
ちスキャン用ドライバーとデータ用ドライバー）をそれ
ぞれ２つずつ、計４つ用意した。それらの大きさはスキ
ャン用ドライバー（ゲイトドライバー）は幅５ｍｍ、長
さ５ｃｍ、厚さ１．１ｍｍで、端子は１００μｍピッチ
で４８０本とした。一方、データ用ドライバーは幅５ｍ
ｍ、長さ７ｃｍ、厚さ１．１ｍｍで、端子は１００μｍ
ピッチで６４０本とした。As the semiconductor integrated circuit chip 32, a circuit composed of a thin film silicon transistor formed on a Corning 7059 glass substrate by a low temperature process including a laser annealing process was used. The electrode 33
The titanium was formed on aluminum, and gold was formed to a thickness of 20 μm on the upper surface of the titanium by electroless plating to form bumps 34.
Then, the same adhesive as in Example 1 was applied. In this way, two long and narrow two types of integrated circuits (that is, a scan driver and a data driver) each having a terminal portion were prepared, four in total. The scan driver (gate driver) had a width of 5 mm, a length of 5 cm, and a thickness of 1.1 mm, and the terminals were 480 with a pitch of 100 μm. On the other hand, the data driver is 5m wide
m, length 7 cm, thickness 1.1 mm, terminal is 100 μm
The pitch was 640.
【００３３】まず、２枚のガラス基板３０ａおよび３０
ｂをあわせて内部に液晶を注入した。その後、図５に示
すようにそれぞれのガラス基板３０ａ、３０ｂの端部に
各集積回路チップ３２ａ〜３２ｄを装着した。そして、
実施例１および２と同様に圧力を加えて半導体集積回路
チップと配線とを接触させるとともに、３６５ｎｍの波
長の光を持つ紫外光源にて、ガラス基板側から６００秒
光を照射し、混合した有機樹脂のうち光硬化性の有機樹
脂のみを硬化し、仮接着した。First, two glass substrates 30a and 30 are provided.
Liquid crystal was injected into the inside together with b. Thereafter, as shown in FIG. 5, the integrated circuit chips 32a to 32d were mounted on the end portions of the glass substrates 30a and 30b. And
In the same manner as in Examples 1 and 2, pressure was applied to bring the semiconductor integrated circuit chip into contact with the wiring, and an ultraviolet light source having a wavelength of 365 nm was used to irradiate 600 seconds of light from the glass substrate side to mix the organic materials. Of the resins, only the photo-curable organic resin was cured and temporarily bonded.
【００３４】この様子を断面図で示したものが図５
（Ｃ）である。すなわち、最初にガラス基板３０ａおよ
び３０ｂを合わせ、液晶３６をその間に注入した。次い
で、前述の棒状の半導体集積回路（ドライバー）チップ
３２ａと３２ｂをガラス基板３０ｂの端部に接着した。
コーニング７０５９ガラスは、紫外光透過性が石英に比
べて劣っているので、接着材の硬化を確実におこなうた
めに実施例１、２に比して光照射時間を長くした。以下
の手順は実施例１と同じであった。このようにして、半
導体集積回路チップとガラス基板との電気的な接続と接
着を完了した。この場合には、被接着基板と半導体集積
回路基板とは同じ材料で出来ているので、その後の熱処
理によっても熱膨張係数の違いから剥がれることはな
く、極めて信頼性の高いものであった。FIG. 5 is a sectional view showing this state.
(C). That is, the glass substrates 30a and 30b were first combined, and the liquid crystal 36 was injected therebetween. Then, the rod-shaped semiconductor integrated circuit (driver) chips 32a and 32b described above were bonded to the end portions of the glass substrate 30b.
Since the Corning 7059 glass is inferior in ultraviolet light transmittance to quartz, the light irradiation time was made longer than in Examples 1 and 2 in order to surely cure the adhesive. The following procedure was the same as in Example 1. In this way, electrical connection and adhesion between the semiconductor integrated circuit chip and the glass substrate were completed. In this case, since the substrate to be adhered and the semiconductor integrated circuit substrate are made of the same material, they did not peel off due to the difference in thermal expansion coefficient even after the subsequent heat treatment, and were extremely reliable.
【００３５】以上とは逆に、図５（Ｂ）に示すように、
まず、それぞれのガラス基板に半導体集積回路チップを
形成してから液晶を注入してもよい。しかしながら、そ
の場合には液晶を注入する際の機械的なダメージが半導
体集積回路チップとガラス基板との接続部分に及ぶこと
もある。Contrary to the above, as shown in FIG.
First, a semiconductor integrated circuit chip may be formed on each glass substrate and then liquid crystal may be injected. However, in that case, mechanical damage at the time of injecting the liquid crystal may reach the connecting portion between the semiconductor integrated circuit chip and the glass substrate.
【００３６】以上の例では単純マトリクス方式の場合を
示した。単純マトリクス方式では、２枚のガラス基板の
双方にドライバーが装着される。一方、例えばＴＦＴ方
式のアクティブマトリクスでは、ドライバーは一方の基
板だけにスキャン用もデータ用も形成されるが、操作手
順自体は本質的には変わらない。本実施例では、スキャ
ン用ドライバーとデータ用ドライバーをそれぞれ２つず
つ使用したが、その数は必要に応じて増減される。In the above example, the case of the simple matrix system is shown. In the simple matrix method, a driver is mounted on both of the two glass substrates. On the other hand, in the TFT active matrix, for example, the driver is formed for scanning and data on only one substrate, but the operating procedure itself is essentially the same. In this embodiment, two scan drivers and two data drivers are used, but the number thereof may be increased or decreased as necessary.
【００３７】従来の液晶表示装置では、スキャン用、デ
ータ用にそれぞれ６〜１０個ものドライバーＩＣを必要
としていた。そのために表示装置の周辺は大変、複雑な
配線がゴチャゴチャ形成されていた。しかしながら、図
５からもわかるように、本実施例で示した棒状のドライ
バーを装着したことによって、端部は非常にコンパクト
になり、デザイン的にもファッショナブルなものになっ
た。このような長細いドライバーは大面積に形成される
ので、不良がある確率が大きく、本発明のようにリペア
技術が無ければ作製できないものであった。The conventional liquid crystal display device requires as many as 6 to 10 driver ICs for scanning and data. Therefore, the periphery of the display device is very complicated, and complicated wiring is formed in a mess. However, as can be seen from FIG. 5, by mounting the rod-shaped driver shown in this embodiment, the end portion becomes very compact and the design becomes fashionable. Since such a long and thin driver is formed in a large area, there is a high probability that there is a defect, and it could not be produced without the repair technique as in the present invention.
【発明の効果】半導体集積回路チップと基板上の配線と
の接着を混合した有機樹脂で行うことにより、仮接着が
実現できたので、半導体集積回路チップのリペアが容易
に行えるようになった。また、上記実施例に示すよう
に、混合有機樹脂により、何度もリペアした後でも、電
気的な接続部分の清浄の程度と不要な樹脂の残存物が存
在しないので、再現性の良いリペアを実現できた。By temporarily adhering the semiconductor integrated circuit chip and the wiring on the substrate with a mixed organic resin, temporary adhesion can be realized, so that the semiconductor integrated circuit chip can be easily repaired. Further, as shown in the above example, even after repeated repairs with a mixed organic resin, since the degree of cleaning of the electrical connection portion and unnecessary resin residue do not exist, repair with good reproducibility can be performed. It was realized.
【００３８】特に本発明では、被接着基板と半導体集積
回路基板と接着剤の組合せによってさまざななバリエー
ションが可能である。例えば、従来のＩＣチップは不透
明でせいぜい１ｃｍ角の大きさしかなかったが、ガラス
基板上に形成する半導体集積は、実質的に透明（回路部
は不透明であるが、肉眼では判別できない。）であり、
大きさも比較的自由に設定できる。例えば幅５ｍｍ、長
さ１０ｃｍの細長い棒状のもの（スティックもしくはス
ティック・クリスタルと称する）とすることも可能であ
る。Particularly, in the present invention, various variations are possible depending on the combination of the substrate to be adhered, the semiconductor integrated circuit substrate and the adhesive. For example, a conventional IC chip is opaque and has a size of at most 1 cm square, but a semiconductor integrated circuit formed on a glass substrate is substantially transparent (a circuit portion is opaque but cannot be discerned by the naked eye). Yes,
The size can be set relatively freely. For example, an elongated rod-shaped member (referred to as stick or stick crystal) having a width of 5 mm and a length of 10 cm can be used.
【００３９】これを例えば液晶表示装置に適用した場合
には、画面の周囲に複雑な配線をパターニングする必要
もなく、実装に必要な部分は極めてシンプルであり、ま
た、周辺回路部も透明であるので極めてファッション性
に富んだ製品となる。しかしながら、一方ではこのよう
なガラス基板上に形成された半導体集積回路はその作製
プロセスが確立されていないので、不良品が発生するこ
とも多かった。したがって、このようなガラス上の半導
体集積回路を接着することは、本発明のようなリペア技
術なくしては語れないものである。When this is applied to, for example, a liquid crystal display device, there is no need to pattern complicated wiring around the screen, the portion required for mounting is extremely simple, and the peripheral circuit portion is also transparent. Therefore, the product will be extremely fashionable. However, on the other hand, since the manufacturing process of the semiconductor integrated circuit formed on such a glass substrate has not been established, defective products often occur. Therefore, bonding such a semiconductor integrated circuit on glass cannot be said without the repair technique of the present invention.
【図面の簡単な説明】[Brief description of drawings]
【図１】本発明の工程のフローを示す。FIG. 1 shows a process flow of the present invention.
【図２】従来の半導体集積回路チップの実装構造の概略
図を示す。FIG. 2 is a schematic view of a mounting structure of a conventional semiconductor integrated circuit chip.
【図３】本発明の半導体集積回路チップの実装構造を示
す。FIG. 3 shows a mounting structure of a semiconductor integrated circuit chip of the present invention.
【図４】本発明の半導体集積回路チップの実装構造を示
す。FIG. 4 shows a mounting structure of a semiconductor integrated circuit chip of the present invention.
【図５】本発明を利用して液晶表示装置を組み立てる様
子を示す。FIG. 5 shows how a liquid crystal display device is assembled using the present invention.
３０・・・基板 ３１・・・配線 ３２・・・ＩＣチップ ３３・・・取り出し電極 ３４・・・バンプ ３５・・・接着用樹脂 30 ... Substrate 31 ... Wiring 32 ... IC chip 33 ... Extraction electrode 34 ... Bump 35 ... Adhesive resin
───────────────────────────────────────────────────── フロントページの続き (72)発明者 竹村 保彦 神奈川県厚木市長谷398番地 株式会社半 導体エネルギー研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasuhiko Takemura 398 Hase, Atsugi, Kanagawa Prefecture Semiconductor Energy Research Institute Co., Ltd.
Claims (6)
プの電極端子とを電気的に接続して基板上に半導体集積
回路チップを搭載する半導体集積回路チップの実装方法
であって、前記半導体集積回路チップを基板に接着する
為の有機樹脂として、異なる硬化条件の有機樹脂を混合
したものを使用して仮接着を行い、仮接着工程の後に半
導体集積回路または接続部分のテストを行うことを特徴
とする半導体集積回路チップの実装方法。1. A method of mounting a semiconductor integrated circuit chip, comprising: electrically connecting electrical wiring on a substrate to electrode terminals of the semiconductor integrated circuit chip to mount the semiconductor integrated circuit chip on the substrate. The organic resin for adhering the circuit chip to the substrate is a mixture of organic resins under different curing conditions, and temporary adhesion is performed, and after the temporary adhesion process, the semiconductor integrated circuit or the connection part is tested. Semiconductor integrated circuit chip mounting method.
硬化性の樹脂とを混合して使用したことを特徴とする半
導体集積回路チップの実装方法。2. The method of mounting a semiconductor integrated circuit chip according to claim 1, wherein a photocurable resin and a thermosetting resin are mixed and used.
光性基板を用いることを特徴とする半導体集積回路チッ
プの実装方法。3. The method for mounting a semiconductor integrated circuit chip according to claim 1, wherein a translucent substrate is used as the adherend substrate.
プとして絶縁基板上に形成された薄膜半導体集積回路チ
ップを用いることを特長とする半導体集積回路チップの
実装方法。4. The method for mounting a semiconductor integrated circuit chip according to claim 1, wherein a thin film semiconductor integrated circuit chip formed on an insulating substrate is used as the semiconductor integrated circuit chip.
プの基板と被接着基板の少なくとも一方は透光性を有す
ることを特長とする半導体集積回路チップの実装方法。5. The method of mounting a semiconductor integrated circuit chip according to claim 1, wherein at least one of the substrate of the semiconductor integrated circuit chip and the substrate to be adhered has a light transmitting property.
れた紫外光に対して透光性を有する基板上に形成された
薄膜半導体集積回路を有することを特徴とする電子機
器。6. An electronic device comprising a thin film semiconductor integrated circuit formed on a substrate having a translucency to ultraviolet light, which is mounted on a substrate to be adhered by a COG method.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4056783A JP2564728B2 (en) | 1991-02-28 | 1992-02-07 | Semiconductor integrated circuit chip mounting method |
| US07/841,526 US5261156A (en) | 1991-02-28 | 1992-02-26 | Method of electrically connecting an integrated circuit to an electric device |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3-58324 | 1991-02-28 | ||
| JP3058824A JP3047485B2 (en) | 1991-03-22 | 1991-03-22 | Apparatus and method for producing diamond film |
| JP3-58824 | 1991-03-22 | ||
| JP4056783A JP2564728B2 (en) | 1991-02-28 | 1992-02-07 | Semiconductor integrated circuit chip mounting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0714880A true JPH0714880A (en) | 1995-01-17 |
| JP2564728B2 JP2564728B2 (en) | 1996-12-18 |
Family
ID=26397783
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4056783A Expired - Fee Related JP2564728B2 (en) | 1991-02-28 | 1992-02-07 | Semiconductor integrated circuit chip mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2564728B2 (en) |
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| JP4609617B2 (en) | 2000-08-01 | 2011-01-12 | 日本電気株式会社 | Semiconductor device mounting method and mounting structure |
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