JPH07119776B2 - Current detection circuit - Google Patents
Current detection circuitInfo
- Publication number
- JPH07119776B2 JPH07119776B2 JP13390589A JP13390589A JPH07119776B2 JP H07119776 B2 JPH07119776 B2 JP H07119776B2 JP 13390589 A JP13390589 A JP 13390589A JP 13390589 A JP13390589 A JP 13390589A JP H07119776 B2 JPH07119776 B2 JP H07119776B2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- current
- current detection
- voltage
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Description
【発明の詳細な説明】 〔概 要〕 電源ラインの電流検出回路に関し、 電流検出回路から無負荷時に発生するオフセット電圧を
除くことを目的とし、 アース電位に対し変動する電位にある検出点に流れる電
流を検出する回路において、 該検出点に入力電流検出抵抗を挿入し、該検出抵抗の両
端をそれぞれ分岐抵抗を介して差動増幅器の入力端子に
接続し、該差動増幅器の一方の入力とアース間をトラン
ジスタと出力電流検出抵抗を介して接続し、該トランジ
スタのベース端子を帰還抵抗を通してあるいは直接前記
差動増幅器の出力端子に接続し、 該トランジスタとアース間に接続された出力電流検出抵
抗の両端電圧を出力とするように構成する。DETAILED DESCRIPTION OF THE INVENTION [Overview] Regarding a current detection circuit of a power supply line, the current detection circuit flows to a detection point at a potential that fluctuates with respect to the ground potential for the purpose of removing an offset voltage generated when there is no load from the current detection circuit. In a circuit for detecting a current, an input current detection resistor is inserted at the detection point, and both ends of the detection resistor are connected to an input terminal of a differential amplifier through branch resistors, respectively, and one input of the differential amplifier is connected. An output current detection resistor connected between the transistor and the ground by connecting a ground to the transistor through the output current detection resistor, and connecting a base terminal of the transistor through a feedback resistor or directly to the output terminal of the differential amplifier. It is configured to output the voltage across both ends of.
本発明は、電源回路の負荷分担および電源ラインの電流
検出に関する。The present invention relates to load sharing of a power supply circuit and current detection of a power supply line.
同一負荷に複数の電源回路より電流を供給する場合、電
源回路出力が互いに接続されて負荷側に供給され、電源
回路の他の一端はアースに接続されている。このような
場合、各電源回路から負荷に供給している電流を知るた
めには、各電源回路の非アース側端子にそれぞれ電流検
出回路を挿入して負荷電流を演出している。When current is supplied from a plurality of power supply circuits to the same load, the power supply circuit outputs are connected to each other and supplied to the load side, and the other end of the power supply circuit is connected to the ground. In such a case, in order to know the current supplied from each power supply circuit to the load, a current detection circuit is inserted in each non-ground side terminal of each power supply circuit to produce the load current.
従来の電源ラインの電流検出回路の回路構成図を第４図
に示す。図において、11は電源回路、12は負荷、13は電
流検出回路、14は検出抵抗ｒ、15は差動増幅器AMP、16
は検出抵抗の電源側と増幅器の＋入力端子間に接続され
る抵抗R1、17は検出抵抗の負荷側と増幅器の−入力端子
間に接続される抵抗R2、18は増幅器の出力端子と−入力
端子間をフィードバック接続する抵抗R3を示す。なお
は電源側との接続端子、は負荷側との接続端子、は
電流検出回路の出力端子とする。FIG. 4 shows a circuit configuration diagram of a conventional current detection circuit for a power supply line. In the figure, 11 is a power supply circuit, 12 is a load, 13 is a current detection circuit, 14 is a detection resistor r, 15 is a differential amplifier AMP, 16
Is a resistor R1, 17 connected between the power supply side of the detection resistor and the + input terminal of the amplifier, a resistor R2 connected between the load side of the detection resistor and the − input terminal of the amplifier, 18 is the output terminal and − input of the amplifier A resistor R3 for feedback connection between terminals is shown. The connection terminal with the power supply side, the connection terminal with the load side, and the output terminal of the current detection circuit.
今検出抵抗ｒに流れる電流をｉとし、出力端子に送出
される電圧をｖとすれば、負荷電流ｉは検出抵抗ｒの両
端に検出電圧として取り出され、抵抗R1とR2により差動
増幅器15に入力されて出力端子から出力電圧ｖが送出
される。この電圧ｖにより負荷電流を検出することがで
きる。Assuming that the current flowing through the detection resistor r is i and the voltage sent to the output terminal is v, the load current i is taken out as a detection voltage across the detection resistor r, and is applied to the differential amplifier 15 by the resistors R1 and R2. When input, the output voltage v is sent out from the output terminal. The load current can be detected by this voltage v.
負荷電流と出力電圧の特性図を第５図に示す。図におい
て、Ｅを無負荷時の電圧、即ちオフセット時の電源電圧
とすれば、負荷電流ｉと出力電圧ｖとの関係は傾斜で示
す特性となる。検出点の電位はそのままオフセット電
圧として出力ｖに現れ、負荷電流ｉにより検出抵抗ｒの
両端に検出される電圧irを差動増幅器15の抵抗比R3/R2
により増幅される電圧が加算されて出力ｖが送出され
る。irの増幅電圧は電流ｉに比例しているので ｖ＝Ｅ＋（irの増幅電圧） となり一定傾斜特性で出力電圧が検出される。しかし検
出点の電位Ｅが変化すると、電流ｉが一定であっても
検出出力電圧ｖが変化してしまうという問題があった。A characteristic diagram of the load current and the output voltage is shown in FIG. In the figure, if E is the voltage at no load, that is, the power supply voltage at the time of offset, the relationship between the load current i and the output voltage v has a characteristic shown by a slope. The potential at the detection point appears as an offset voltage in the output v as it is, and the voltage ir detected across the detection resistor r by the load current i is converted to the resistance ratio R3 / R2 of the differential amplifier 15.
The voltage amplified by is added and the output v is transmitted. Since the amplified voltage of ir is proportional to the current i, v = E + (amplified voltage of ir), and the output voltage is detected with a constant slope characteristic. However, when the potential E at the detection point changes, the detection output voltage v changes even if the current i is constant.
従来の電流検出回路では、出力電圧は負荷電流に比例し
て増加するが、オフセット電圧が常時加算されているの
で、オフセット電圧が変動した場合に出力電圧も変動
し、負荷電流と出力電圧との関係が一定でなくなり、電
流検出回路の精度が損なわれる。In the conventional current detection circuit, the output voltage increases in proportion to the load current, but since the offset voltage is constantly added, the output voltage also changes when the offset voltage changes, and the load current and output voltage The relationship is not constant and the accuracy of the current detection circuit is impaired.
本発明では、このオフセット電圧を電流検出回路から取
り除き、検出点電流のみに比例した出力電圧を得る回路
を構成することを目的とする。An object of the present invention is to configure a circuit that removes this offset voltage from the current detection circuit and obtains an output voltage proportional to only the detection point current.
本発明の原理構成図を第１図に示す。図において、１は
電源、２は負荷、３は電流検出回路、４は入力電流検出
抵抗、５は差動増幅器、6,7は分岐抵抗、８はトランジ
スタ、９は出力電流検出抵抗、10は帰還抵抗を示す。A principle configuration diagram of the present invention is shown in FIG. In the figure, 1 is a power supply, 2 is a load, 3 is a current detection circuit, 4 is an input current detection resistor, 5 is a differential amplifier, 6 and 7 are branch resistors, 8 is a transistor, 9 is an output current detection resistor, and 10 is Indicates the feedback resistance.
電源１は直流電源で負荷２に対して電流を供給する。電
流検出回路３はアース電位に対し変動する電位にある検
出点に流れる電流を検出する回路で、入力電流検出抵
抗４は検出点に流れる電流を取り出し、差動増幅器５
は入力電流検出抵抗４の両端に発生する電圧を分岐抵抗
６と７により入力し、トランジスタ８のベースに直接あ
るいは帰還抵抗10を通して送出し、トランジスタ８と出
力電流検出抵抗９は差動増幅器５の一方の入力とアース
との間に接続され、出力電流検出抵抗９の両端から出力
電圧を検出する。The power supply 1 is a DC power supply and supplies a current to the load 2. The current detection circuit 3 is a circuit that detects a current flowing at a detection point at a potential that fluctuates with respect to the ground potential. The input current detection resistor 4 takes out the current flowing at the detection point and outputs the differential amplifier 5
Inputs the voltage generated at both ends of the input current detection resistor 4 by branch resistors 6 and 7 and sends it directly to the base of the transistor 8 or through the feedback resistor 10. The transistor 8 and the output current detection resistor 9 are It is connected between one input and ground and detects the output voltage from both ends of the output current detection resistor 9.
電源ラインＬの検出点はアースより電源電圧Ｅだけ電
位が高い。電源１より電流検出回路３を通して負荷２に
電流ｉが流れる。入力電流検出抵抗４の抵抗ｒは電流ｉ
の検出抵抗であり、抵抗４の両端にはirの電圧が現れ
る。抵抗４の両端電圧は分岐抵抗６と７を通して差動増
幅器５に入力される。負荷２が接続されているときは分
岐抵抗６の入力電位は分析抵抗７の入力電位より高く、
負荷２が接続されてないときは、分岐抵抗６の入力電位
と分岐抵抗７の入力電位は等しくなるので、この入力電
位の差を差動増幅器５により検出し、該増幅器５の出力
側に接続されたトランジスタ８のベース電位を制御す
る。入力電位の差を検出している間はトランジスタ８の
エミッタとコレクタ間は導通し、トランジスタ８とアー
ス間に接続された出力電流検出抵抗９に負荷電流に比例
した電流が流れる。したがって検出抵抗９の両端の電圧
を検出することにより入力電流に比例した電圧を検出す
ることができる。負荷電流が流れなくなると差動増幅器
５から出力が送出されなくなり、トランジスタ８に対す
るベース電位がなくなり、トランジスタ８は導通しなく
なり、出力電流検出抵抗９の両端には出力電圧が送出さ
れない。即ち出力電流検出抵抗９の両端の出力電圧は０
から平衡状態になり、入力検出電圧irに比例した電圧を
検出することができる。The detection point of the power supply line L has a potential higher than the ground by the power supply voltage E. A current i flows from the power supply 1 to the load 2 through the current detection circuit 3. The resistance r of the input current detection resistor 4 is
The voltage of ir appears at both ends of the resistor 4. The voltage across the resistor 4 is input to the differential amplifier 5 through the branch resistors 6 and 7. When the load 2 is connected, the input potential of the branch resistor 6 is higher than the input potential of the analysis resistor 7,
When the load 2 is not connected, the input potential of the branch resistor 6 and the input potential of the branch resistor 7 become equal. Therefore, the difference between the input potentials is detected by the differential amplifier 5 and connected to the output side of the amplifier 5. The base potential of the transistor 8 is controlled. While the difference between the input potentials is being detected, the emitter and collector of the transistor 8 are in conduction, and a current proportional to the load current flows through the output current detection resistor 9 connected between the transistor 8 and ground. Therefore, by detecting the voltage across the detection resistor 9, a voltage proportional to the input current can be detected. When the load current stops flowing, no output is sent from the differential amplifier 5, the base potential for the transistor 8 disappears, the transistor 8 stops conducting, and the output voltage is not sent across the output current detecting resistor 9. That is, the output voltage across the output current detection resistor 9 is 0
From this, a balanced state is reached, and a voltage proportional to the input detection voltage ir can be detected.
本発明の実施例の回路構成図を第２図に示す。図（ａ）
は増幅器の反転入力端子をトランジスタに接続した場
合、図（ｂ）は増幅器の非反転入力端子をトランジスタ
に接続した場合を示す。A circuit configuration diagram of an embodiment of the present invention is shown in FIG. Figure (a)
Shows the case where the inverting input terminal of the amplifier is connected to the transistor, and FIG. 9B shows the case where the non-inverting input terminal of the amplifier is connected to the transistor.
図において、１は電源Ｅ、２は負荷Ｌ、３は電流検出回
路、４は入力電流検出抵抗ｒ、５は差動増幅器Ａ、６は
分岐抵抗R1、７は分岐抵抗R2、８はトランジスタQ1、９
は出力電流検出抵抗R0、10は帰還抵抗R3を示す。In the figure, 1 is a power supply E, 2 is a load L, 3 is a current detection circuit, 4 is an input current detection resistor r, 5 is a differential amplifier A, 6 is a branch resistor R1, 7 is a branch resistor R2, and 8 is a transistor Q1. , 9
Indicates an output current detection resistor R0, and 10 indicates a feedback resistor R3.
図（ａ）の場合は、抵抗R1は増幅器Ａの−入力端子に接
続すると共にトランジスタQ1のエミッタに接続し、抵抗
R2は増幅器Ａの＋入力端子に接続し、増幅器Ａの出力端
子はトランジスタQ1のベースに接続する。またトランジ
スタQ1のコレクタは出力電流検出抵抗R0に接続する。In the case of Fig. (A), the resistor R1 is connected to the-input terminal of the amplifier A and also to the emitter of the transistor Q1.
R2 is connected to the + input terminal of amplifier A, and the output terminal of amplifier A is connected to the base of transistor Q1. The collector of the transistor Q1 is connected to the output current detection resistor R0.
図（ｂ）の場合は、抵抗R1は増幅器Ａの＋入力端子に接
続すると共にトランジスタQ1のコレクタに接続し、抵抗
R2は増幅器Ａの−入力端子に接続し、増幅器Ａの出力端
子は帰還抵抗R3を経由してトランジスタQ1のベースに接
続する。またトランジスタQ1のエミッタは出力電流検出
抵抗R0に接続する。図（ａ）と図（ｂ）において、電源
Ｅはアースに対して変動電位を持ち、電源ラインＬより
検出点に電位Ｅを送出し、入力電流検出抵抗４を介し
て負荷２に電流ｉを供給する。抵抗４は両端に入力検出
電圧irを取り出し、分岐抵抗R1とR2とを通して増幅器５
に入力電位を供給する。R1の入力電位はR2の入力電位よ
り高く、負荷が接続されない時はR1とR2の電位は等しく
なる。In the case of Fig. (B), the resistor R1 is connected to the + input terminal of the amplifier A and the collector of the transistor Q1.
R2 is connected to the-input terminal of the amplifier A, and the output terminal of the amplifier A is connected to the base of the transistor Q1 via the feedback resistor R3. The emitter of the transistor Q1 is connected to the output current detection resistor R0. In FIGS. (A) and (b), the power supply E has a variable potential with respect to the ground, sends out the potential E from the power supply line L to the detection point, and supplies the current i to the load 2 via the input current detection resistor 4. Supply. The resistor 4 extracts the input detection voltage ir at both ends, and the amplifier 5 through the branch resistors R1 and R2.
Supply the input potential to. The input potential of R1 is higher than the input potential of R2, and the potentials of R1 and R2 are equal when the load is not connected.
図（ａ）において、抵抗４の両端電圧irは、抵抗R1とR2
を通して増幅器５に入力され、反転入力電位が非反転入
力電位に比べ高いため、増幅器５の出力電位が低くな
る。トランジスタQ1のベースは増幅器Ａの出力に接続さ
れているため、トランジスタQ1は増幅器Ａの反転入力が
非反転入力電位に等しくなるまで導通する。トランジス
タQ1のコレクタにはエミッタ電流にほぼ等しく電流が流
れる。即ち抵抗R1とR0に流れる電流はほぼ等しくなり、
抵抗R1には入力電流検出抵抗ｒの電圧降下分の電圧が現
れている。その結果抵抗ｒ両端のR0/R1倍の電圧が出力
電流検出抵抗R0に現れる。In the figure (a), the voltage ir across the resistor 4 is the resistance R1 and R2.
Is input to the amplifier 5 through the inverting input potential and is higher than the non-inverting input potential, the output potential of the amplifier 5 is low. Since the base of transistor Q1 is connected to the output of amplifier A, transistor Q1 will conduct until the inverting input of amplifier A equals the non-inverting input potential. A current flows through the collector of the transistor Q1 almost equal to the emitter current. That is, the currents flowing through the resistors R1 and R0 are almost equal,
A voltage corresponding to the voltage drop of the input current detection resistor r appears in the resistor R1. As a result, R0 / R1 times the voltage across the resistor r appears in the output current detection resistor R0.
本発明の応用例を第３図に示す。図において、21は電源
Ａ、22は電源Ｂ、23はＡ検出器、24はＢ検出器、25は負
荷を示す。An application example of the present invention is shown in FIG. In the figure, 21 is a power supply A, 22 is a power supply B, 23 is an A detector, 24 is a B detector, and 25 is a load.
検出器Ａと検出器Ｂは負荷25を接続しているときは、通
常のとおり電源Ａと電源Ｂの負荷電流iAとiAを検出して
負荷の平衡を検出できるが、負荷25を外した状態におい
ても電源の平衡を検出することができる。即ち電源電圧
が平衡している状態では、Ａ検出器とＢ検出器には電流
iAとiBは流れないが、電源ＡとＢ間に不平衡が発生して
いれば電流iAかiBのどちらかの電流が流れるので、電源
ＡかＢを調整して電流iAとiBを零にすることにより電源
ＡとＢの平衡を簡単に測ることができる。When the load A is connected to the detector A and the detector B, the load currents i A and i A of the power source A and the power source B can be detected as usual to detect the load balance. Even in this state, the balance of the power supply can be detected. That is, in the state where the power supply voltage is balanced, the currents in the A and B detectors are
i A and i B do not flow, but if there is an imbalance between power supplies A and B , either current i A or i B will flow, so adjust power supply A or B to adjust current i A By setting i and i B to zero, the balance between power supplies A and B can be easily measured.
本発明によれば、アース電位に対して変動する電位にあ
る点に流れる電流を、変動する電位に関係せず検出が可
能となる。また負荷を接続しない状態で複数の電源の平
衡調整を簡単に行うことができる。According to the present invention, it is possible to detect a current flowing at a point at a potential that fluctuates with respect to the ground potential, regardless of the fluctuating potential. Further, the balance adjustment of a plurality of power supplies can be easily performed without connecting a load.
第１図は本発明の原理構成図、第２図は実施例の回路構
成図、第３図は応用例の接続構成図、第４図は従来例の
回路構成図、第５図は従来例の電流−電圧特性図を示
す。 図において、1,11,21,22は電源、2,12,25は負荷、3,13
は電流検出回路、4,14は入力電流検出抵抗、5,15は差動
増幅器、6,7,16,17は分岐抵抗、８はトランジスタ、９
は出力電流検出抵抗、10,18は帰還抵抗、23,24は検出器
を示す。FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a circuit block diagram of an embodiment, FIG. 3 is a connection block diagram of an application example, FIG. 4 is a circuit block diagram of a conventional example, and FIG. 5 is a conventional example. The current-voltage characteristic diagram of In the figure, 1,11,21,22 are power supplies, 2,12,25 are loads, and 3,13
Is a current detection circuit, 4 and 14 are input current detection resistors, 5 and 15 are differential amplifiers, 6 and 7, 16 and 17 are branch resistors, 8 is a transistor and 9
Are output current detection resistors, 10 and 18 are feedback resistors, and 23 and 24 are detectors.
Claims (1)
点に流れる電流を検出する回路（３）において、 該検出点に入力電流検出抵抗（４）を挿入し、該検出抵
抗（４）の両端をそれぞれ分岐抵抗（６），（７）を介
して差動増幅器（５）の入力端子に接続し、該差動増幅
器（５）の一方の入力とアース間をトランジスタ（８）
と出力電流検出抵抗（９）を介して接続し、該トランジ
スタ（８）のベース端子を帰還抵抗（10）を通してある
いは直接前記差動増幅器（５）の出力端子に接続し、 該トランジスタ（８）とアース間に接続された出力電流
検出抵抗（９）の両端電圧を出力とすることを特徴とす
る電流検出回路。1. A circuit (3) for detecting a current flowing at a detection point at a potential that fluctuates with respect to the ground potential, wherein an input current detection resistor (4) is inserted at the detection point and the detection resistor (4) is connected. Both ends are connected to the input terminals of the differential amplifier (5) via branch resistors (6) and (7), respectively, and a transistor (8) is connected between one input of the differential amplifier (5) and ground.
And the base terminal of the transistor (8) is connected to the output terminal of the differential amplifier (5) through a feedback resistor (10) or directly, and the transistor (8) is connected to the output terminal of the transistor (8). A current detection circuit characterized by outputting the voltage across the output current detection resistor (9) connected between the ground and the ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13390589A JPH07119776B2 (en) | 1989-05-26 | 1989-05-26 | Current detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13390589A JPH07119776B2 (en) | 1989-05-26 | 1989-05-26 | Current detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02311770A JPH02311770A (en) | 1990-12-27 |
| JPH07119776B2 true JPH07119776B2 (en) | 1995-12-20 |
Family
ID=15115843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13390589A Expired - Fee Related JPH07119776B2 (en) | 1989-05-26 | 1989-05-26 | Current detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07119776B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6498503B2 (en) * | 2015-04-20 | 2019-04-10 | エイブリック株式会社 | Current detection circuit |
| JP2020165772A (en) * | 2019-03-29 | 2020-10-08 | 株式会社デンソーテン | Device and method for measuring current |
-
1989
- 1989-05-26 JP JP13390589A patent/JPH07119776B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02311770A (en) | 1990-12-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |