JPH07114329B2 - Negative feedback amplifier circuit - Google Patents
Negative feedback amplifier circuitInfo
- Publication number
- JPH07114329B2 JPH07114329B2 JP60003473A JP347385A JPH07114329B2 JP H07114329 B2 JPH07114329 B2 JP H07114329B2 JP 60003473 A JP60003473 A JP 60003473A JP 347385 A JP347385 A JP 347385A JP H07114329 B2 JPH07114329 B2 JP H07114329B2
- Authority
- JP
- Japan
- Prior art keywords
- amplifier circuit
- amplifier
- negative feedback
- feedback
- stage amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Amplifiers (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、VHF〜UHF帯をカバーする広帯域、低歪のブー
スター増幅器に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wide band, low distortion booster amplifier that covers the VHF to UHF bands.
従来の技術 GaAs・FETのドレインからゲートに抵抗で負帰還をかけ
負帰還増幅器は、10MHz〜3GHzにわたる広帯域をカバー
する低雑音アンプとして、CATV幹線アンプ等への応用が
知られている。このアンプは、負帰還量とFETの相互コ
ンダクタンスgmを最適設計することにより、入出力イン
ピーダンスを50Ω〜75Ωにすることが可能であり、多段
接続も容易である。たとえば、入出力インピーダンスを
50Ωに設計したGaAs・FET負帰還アンプを２段縦続接続
して10〜2000MHz帯で利得20dBを得たアンプが知られて
いる。（参照文献:M.Nishiumoほか、Inst.Phgs.Conf.Se
r.No.63:Chapter9 Paper presented at Int.Symp.Ga As
and Related Compounds,Japan,1981 pp425〜430“A Ga
As monolithic.low−noise wideband amplifier"） 発明が解決しようとする問題点 ところで、このアンプを、CATV用の幹線ブースタアンプ
として用いる場合、４〜6dBという良好なNFと、20dB程
度の利得の他に、極めて良好な歪特性が要求される。し
かし、従来のアンプでは、NF及び利得は満足するが、歪
特性に関する要望を満足することができなかった。2. Description of the Related Art A negative feedback amplifier in which negative feedback is applied from a drain to a gate of a GaAs • FET with a resistor is known as a low noise amplifier covering a wide band from 10 MHz to 3 GHz, and its application to a CATV main amplifier is known. By optimally designing the amount of negative feedback and the mutual conductance gm of the FET, this amplifier can have an input / output impedance of 50Ω to 75Ω and can be easily connected in multiple stages. For example, input and output impedance
It is known that a GaAs FET negative feedback amplifier designed for 50Ω is cascaded in two stages to obtain a gain of 20 dB in the 10 to 2000 MHz band. (Reference: M.Nishiumo et al., Inst.Phgs.Conf.Se
r.No.63: Chapter9 Paper presented at Int.Symp.Ga As
and Related Compounds, Japan, 1981 pp425〜430 “A Ga
As monolithic.low-noise wideband amplifier ") Problems to be solved by the invention By the way, when this amplifier is used as a main line booster amplifier for CATV, in addition to a good NF of 4 to 6 dB and a gain of about 20 dB, However, the conventional amplifier cannot satisfy the demand for the distortion characteristic, although the conventional amplifier satisfies the NF and the gain.
歪特性を改善するために、従来、後段程、FETのゲート
幅を大きくする試みもなされているが、これは、後段
程、入力幅が大きくなるため、出力も大きくなり、その
結果、消費電力が大きくなること、および熱的なアンバ
ランスを生じることなどの問題がある。In order to improve the distortion characteristics, it has been attempted to increase the gate width of the FET in the latter stage, but this is because the input width increases in the latter stage, resulting in a larger output, resulting in power consumption. Is large and causes thermal imbalance.
本発明は上記問題点を解消した増幅器を提供することを
目的とする。An object of the present invention is to provide an amplifier that solves the above problems.
問題を解決するための手段 上記問題を解決するため、本発明の負帰還増幅回路は、
ゲートを入力端子および第１の電源に、ドレインを第２
の電源および出力端子に、ソースを接地端子に接続した
電界効果トランジスタと、前記電界効果トランジスタの
ドレインとゲート間に負帰還結合をかける帰還用抵抗と
により１段の増幅回路を形成し、初段の前記増幅回路の
出力端子を次段の前記増幅回路の入力端子に接続する形
で２段増幅回路を形成し、前記次段の増幅回路の帰還用
抵抗値を前記初段の増幅回路の帰還用抵抗値より小さく
したものである。Means for Solving the Problems In order to solve the above problems, the negative feedback amplifier circuit of the present invention is
The gate is the input terminal and the first power supply, and the drain is the second
A power amplifier and a power source and an output terminal of the field effect transistor having a source connected to the ground terminal, and a feedback resistor for applying a negative feedback coupling between the drain and the gate of the field effect transistor form a one-stage amplifier circuit. A two-stage amplifier circuit is formed by connecting the output terminal of the amplifier circuit to the input terminal of the amplifier circuit of the next stage, and the feedback resistance value of the amplifier circuit of the next stage is set to the feedback resistor of the amplifier circuit of the first stage. It is smaller than the value.
作用 FET負帰還増幅器は、帰還重を大きくすると、利得は低
下するが、歪特性が改善される。したがって、利得は初
段増幅回路の帰還量を小さくしてバーし、次段増幅回路
で帰還量を大きく設定することにより、低歪特性の広帯
域増幅器を実現することができる。When the feedback weight of the action FET negative feedback amplifier is increased, the gain is reduced, but the distortion characteristic is improved. Therefore, the gain is reduced by reducing the feedback amount of the first-stage amplifier circuit and set to a large feedback amount by the second-stage amplifier circuit, whereby a wide-band amplifier with low distortion characteristics can be realized.
実施例 以下、本発明の一実施例を図面に基づいて説明する。Embodiment An embodiment of the present invention will be described below with reference to the drawings.
図面は本発明の一実施例における増幅器の回路図で、
Q1,Q2はGaAs・FETであり、このGaAs・FET,Q1,Q2は、２
段に縦続接続されており、各段の入力部には抵抗R1,R2
を通じて負バイアス電位VGが印加されている。各段のGa
As・FET,Q1,Q2はドレインから抵抗R3,R4を介して負帰還
結合されている。なお、ダイオードD1,D2は直流遮断用
であり、破線で囲んだ回路部は、GaAs基板上に集積化さ
れ、チョークコイルZ1,Z2はVHF〜UHF帯の負荷インピー
ダンスとして外付けされたものである。１は入力端子、
２は出力端子である。GaAs・FET,Q1,Q2は、ゲート幅100
0μｍ、ゲート長１μｍで、相互コンダクタンスgm＝100
msに設計されたものを用い、バイアス用抵抗を、R1＝R2
＝１〜2kΩ、帰還用抵抗を、R4＝100Ω、R3＝500Ωに設
定した。The drawing is a circuit diagram of an amplifier according to an embodiment of the present invention.
Q 1 and Q 2 are GaAs FETs, and these GaAs FETs, Q 1 and Q 2 are 2
Are connected in cascade, and the resistors R 1 and R 2 are connected to the input of each stage.
A negative bias potential V G is applied through. Ga of each stage
As-FETs, Q 1 and Q 2 are negatively feedback-coupled from the drain via resistors R 3 and R 4 . The diodes D 1 and D 2 are for DC blocking, the circuit part surrounded by the broken line is integrated on the GaAs substrate, and the choke coils Z 1 and Z 2 are externally attached as load impedances in the VHF to UHF band. It is a thing. 1 is an input terminal,
2 is an output terminal. GaAs ・ FET, Q 1 and Q 2 have a gate width of 100
0 μm, gate length 1 μm, mutual conductance gm = 100
Use a resistor designed for ms, and use a bias resistor R 1 = R 2
= 1 to 2 kΩ, and the feedback resistance was set to R 4 = 100Ω and R 3 = 500Ω.
この結果、10〜2000MHz帯で、後段の増幅器利得が5dBで
あり、二次歪（IM2）、三次歪（IM3）とも、5dB程度の
改善効果が確認された。この実施例では、帰還用抵抗
を、R3＝R4＝300Ωに設定したものにくらべて、後段増
幅器利得は5dB程度低下しているが、この利得低下分
は、前段増幅器で負帰還量を小さく設定することにより
補なうことができた。As a result, in the 10 to 2000 MHz band, the amplifier gain in the latter stage was 5 dB, and the improvement effect of about 5 dB was confirmed for both second-order distortion (IM 2 ) and third- order distortion (IM 3 ). In this embodiment, the gain of the post-stage amplifier is reduced by about 5 dB compared to the case where the feedback resistor is set to R 3 = R 4 = 300Ω. It was able to compensate by setting it small.
発明の効果 以上述べたごとく本発明によれば、雑音指数NF及び利得
は従来と変らずに、歪だけ改善された広帯域増幅器を実
現でき、その工業的利用価値は極めて大である。EFFECTS OF THE INVENTION As described above, according to the present invention, it is possible to realize a wide band amplifier in which the noise figure NF and the gain are the same as the conventional ones and the distortion is improved, and its industrial utility value is extremely large.
図面は本発明の一実施例における増幅器の回路図であ
る。 Q1,Q2……GaAs・FET、R1〜R4……抵抗、Z1,Z2……チョ
ークコイル、D1,D2……ダイオードThe drawing is a circuit diagram of an amplifier according to an embodiment of the present invention. Q 1 , Q 2 ...... GaAs ・ FET, R 1 to R 4 ...... Resistance, Z 1 , Z 2 ...... Choke coil, D 1 , D 2 ...... Diode
Claims (1)
レインを第２の電源および出力端子に、ソースを接地端
子に接続した電界効果トランジスタと、前記電界効果ト
ランジスタのドレインとゲート間に接続された負帰還結
合をかける帰還用抵抗とにより１段の増幅回路を形成
し、初段の前記増幅回路の出力端子を次段の前記増幅回
路の入力端子に接続する形で２段増幅回路を形成し、前
記次段の増幅回路の帰還用抵抗値を前記初段の増幅回路
の帰還用抵抗値より小さくしたことを特徴とする負帰還
増幅回路。1. A field effect transistor having a gate connected to an input terminal and a first power supply, a drain connected to a second power supply and an output terminal, and a source connected to a ground terminal, and a field effect transistor connected between the drain and the gate. A two-stage amplifier circuit is formed by forming a one-stage amplifier circuit with the feedback resistor that applies the negative feedback coupling, and connecting the output terminal of the first-stage amplifier circuit to the input terminal of the next-stage amplifier circuit. The negative feedback amplifier circuit is characterized in that the feedback resistance value of the next-stage amplifier circuit is smaller than the feedback resistance value of the first-stage amplifier circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60003473A JPH07114329B2 (en) | 1985-01-11 | 1985-01-11 | Negative feedback amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60003473A JPH07114329B2 (en) | 1985-01-11 | 1985-01-11 | Negative feedback amplifier circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61161811A JPS61161811A (en) | 1986-07-22 |
| JPH07114329B2 true JPH07114329B2 (en) | 1995-12-06 |
Family
ID=11558297
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60003473A Expired - Lifetime JPH07114329B2 (en) | 1985-01-11 | 1985-01-11 | Negative feedback amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07114329B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4669602B2 (en) * | 2000-09-13 | 2011-04-13 | 株式会社エヌエフ回路設計ブロック | Cascaded amplifier |
| EP1603230A1 (en) * | 2004-06-04 | 2005-12-07 | Matsushita Electric Industrial Co., Ltd. | Multistage amplyfying devices, and reception device and transmission device using the same |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59131206A (en) * | 1983-01-17 | 1984-07-28 | Nippon Telegr & Teleph Corp <Ntt> | Wide band amplifier |
-
1985
- 1985-01-11 JP JP60003473A patent/JPH07114329B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61161811A (en) | 1986-07-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |