JPH0685428A - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPH0685428A JPH0685428A JP25419192A JP25419192A JPH0685428A JP H0685428 A JPH0685428 A JP H0685428A JP 25419192 A JP25419192 A JP 25419192A JP 25419192 A JP25419192 A JP 25419192A JP H0685428 A JPH0685428 A JP H0685428A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- window
- circuit board
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、混成集積回路装置に
関し、特に無線機送信段の高周波電力増幅部に使用する
高周波電力増幅用混成集積回路装置に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly to a hybrid integrated circuit device for high frequency power amplification used in a high frequency power amplification section of a transmission stage of a radio.
【０００２】[0002]
【従来の技術】図４は従来より使用されている高周波電
力増幅用混成集積回路の構造図を示す。図４において、
１ｂは該集積回路の放熱および接地を目的とした銅板等
によるフィン、２ｂは該集積回路を構成するために、裏
面全面を上記フィン１ｂに半田付けされたアルミナ等に
よる回路基板、３は上記回路基板２ｂ上の導体パターン
に半田付けされたチップコンデンサ等の回路部品、４は
回路基板２ｂの上面接地パターンと裏面パターンを接続
するためのスルーホール、５は集積回路の能動素子であ
るトランジスタ等の半導体素子、６は集積回路に直流電
力を供給したり、増幅するための高周波電力を入力した
り、増幅された高周波電力を取り出すための端子（リー
ド）、７は集積回路の各部品を外力および湿温度から保
護するためのエポキシ樹脂等によるキャップである。2. Description of the Related Art FIG. 4 shows a structure of a hybrid integrated circuit for high frequency power amplification which has been conventionally used. In FIG.
Reference numeral 1b is a fin made of a copper plate or the like for the purpose of heat dissipation and grounding of the integrated circuit, 2b is a circuit board made of alumina or the like whose entire back surface is soldered to the fin 1b to form the integrated circuit, and 3 is the circuit Circuit parts such as a chip capacitor soldered to the conductor pattern on the board 2b, 4 are through holes for connecting the upper surface ground pattern and the back surface pattern of the circuit board 2b, and 5 are transistors such as active elements of the integrated circuit. A semiconductor element, 6 is a terminal (lead) for supplying DC power to the integrated circuit, inputting high frequency power for amplification, and taking out amplified high frequency power, and 7 is an external force for each component of the integrated circuit. It is a cap made of epoxy resin or the like for protecting it from wet temperature.
【０００３】次に図４に示す構造を有する混成集積回路
の組立方法、手順について説明する。まず、回路基板２
ｂ上に複数の回路部品３、および半導体素子５を半田付
けし、次に部品等を半田付けされた回路基板２ｂの裏面
をフィン１ｂに半田付けし、端子６を回路基板２ｂ上の
各パッドに半田付けして、キャップ７を接着剤等によ
り、フィン１ｂに取り付ける。以上で組立を完了する。Next, a method and procedure for assembling the hybrid integrated circuit having the structure shown in FIG. 4 will be described. First, the circuit board 2
b, a plurality of circuit components 3 and the semiconductor element 5 are soldered, then the back surface of the circuit board 2b on which the components and the like are soldered is soldered to the fin 1b, and the terminals 6 are provided on the circuit board 2b. Then, the cap 7 is attached to the fin 1b with an adhesive or the like. This completes the assembly.
【０００４】[0004]
【発明が解決しようとする課題】従来の高周波電力増幅
用混成集積回路は以上のように構成されていたが、回路
部品および半導体素子が回路基板の上面に構成されるた
め、外力および湿温度より回路部品および半導体素子を
保護しなければならず、キャップ封じをすることが必要
で、また一旦キャッピングを完了すると回路定数を変更
できなくなるという問題があった。The conventional hybrid integrated circuit for high frequency power amplification has been constructed as described above. However, since the circuit components and the semiconductor elements are formed on the upper surface of the circuit board, the external force and the humidity temperature are not used. There is a problem that the circuit component and the semiconductor element must be protected, the cap needs to be sealed, and the circuit constant cannot be changed once the capping is completed.
【０００５】この発明は上記のような問題点を解消する
ためになされたもので、従来と同じ混成集積回路の構
造、組立方法，手順でもって製造でき、かつ混成集積回
路の回路定数を組立完了後に、微調および変更すること
ができる高周波電力増幅用等の混成集積回路装置を得る
ことを目的としている。The present invention has been made to solve the above problems, and can be manufactured by the same structure, assembling method, and procedure of a hybrid integrated circuit as before, and the circuit constants of the hybrid integrated circuit can be completely assembled. It is intended to obtain a hybrid integrated circuit device for high frequency power amplification or the like which can be finely adjusted and changed later.
【０００６】[0006]
【課題を解決するための手段】この発明に係る混成集積
回路装置は、その放熱フィンを、その回路基板の裏面が
装着される部分の必要とする箇所に窓を有するものと
し、該窓に露出する回路基板の裏面に該回路基板の上面
よりスルーホールにより接続されたパッドを設け、これ
に外付部品を取り付けることにより、キャッピング完了
後でもある特定の回路部品の微調もしくは変更を可能に
したものである。In the hybrid integrated circuit device according to the present invention, the heat radiation fin has a window at a required portion of a portion to which the back surface of the circuit board is attached, and the window is exposed. By providing a pad on the back surface of the circuit board that is connected from the top surface of the circuit board by a through hole, and by attaching an external component to this pad, it is possible to finely adjust or change a specific circuit component even after completion of capping. Is.
【０００７】[0007]
【作用】この発明における混成集積回路装置は、組立完
了後でも放熱フィンの窓より回路基板の裏面が一部出る
こととなり、該回路基板の裏面にスルーホールにより上
面パターンと接続したパッドが設けられているので、該
パッドに外部より部品を追加、あるいは変更することが
できる。また放熱フィンの一部に窓をあけただけであ
り、スルーホールを完全に封じすれば、従来通り、湿温
度に対する気密性を保つことができる。In the hybrid integrated circuit device according to the present invention, a part of the back surface of the circuit board is projected from the window of the radiation fin even after the assembly is completed, and the back surface of the circuit board is provided with the pad connected to the upper surface pattern by the through hole. Therefore, it is possible to add or change components to the pad from the outside. Further, only by opening a window in a part of the heat radiation fin, if the through hole is completely sealed, the airtightness against the humidity temperature can be maintained as usual.
【０００８】[0008]
【実施例】以下、この発明の一実施例を図について説明
する。 実施例１．図１はこの発明の一実施例による高周波電力
増幅用の混成集積回路の斜視図、図２はその一部断面斜
視図、図３はその構造を理解しやすくするための分解図
である。図３において、１ａは本発明による放熱フィ
ン、２ａは本発明による回路基板、３は該回路基板２ａ
の表面側に設けられた回路部品、５は同じく半導体素
子、６は同じく表面側に設けられた、キャップ封じ後外
部にリードピンを構成するリード端子、７はキャップ、
８は本発明の特徴であるフィン１ａにあけられた窓、１
１は回路基板裏面に設けられた外付部品の半田付け用パ
ッド、９は該半田付け用パッド１１を回路基板表面のパ
ッドまたはパターンに接続するために設けたスルーホー
ル、１０はチップコンデンサである。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. Example 1. FIG. 1 is a perspective view of a hybrid integrated circuit for high frequency power amplification according to an embodiment of the present invention, FIG. 2 is a partial sectional perspective view thereof, and FIG. 3 is an exploded view for facilitating understanding of the structure. In FIG. 3, 1a is a heat radiation fin according to the present invention, 2a is a circuit board according to the present invention, and 3 is the circuit board 2a.
Circuit components provided on the front surface side of the same, 5 is a semiconductor element, 6 is also provided on the front surface side, lead terminals constituting lead pins outside after cap sealing, 7 is a cap,
8 is a window formed in the fin 1a, which is a feature of the present invention, 1
Reference numeral 1 is a soldering pad for an external component provided on the back surface of the circuit board, 9 is a through hole provided for connecting the soldering pad 11 to a pad or pattern on the surface of the circuit board, and 10 is a chip capacitor. .
【０００９】図２は本実施例の混成集積回路をフィン側
から見た拡大断面図であり、図において、１０は窓部８
に露出した回路基板裏面にパッド１１部にて装着され、
該パッド１１及びスルーホール９を介して、上面パター
ンに半田付けされたチップコンデンサ３に並列接続され
るよう設けられたチップコンデンサである。FIG. 2 is an enlarged sectional view of the hybrid integrated circuit of this embodiment as seen from the fin side. In the figure, 10 is a window portion 8.
It is attached to the back surface of the circuit board exposed at
A chip capacitor provided so as to be connected in parallel to the chip capacitor 3 soldered to the upper surface pattern via the pad 11 and the through hole 9.
【００１０】図１は本実施例のフィンを有する混成集積
回路装置をフィン側から見た外形図を示す。図におい
て、８は本発明の特徴であるフィン１ａにあけた窓であ
る。本発明の混成集積回路装置の組立方法、手順は従来
の混成集積回路装置と同じである。FIG. 1 is an external view of a hybrid integrated circuit device having fins according to this embodiment as viewed from the fin side. In the figure, 8 is a window opened in the fin 1a, which is a feature of the present invention. The method and procedure for assembling the hybrid integrated circuit device of the present invention are the same as those of the conventional hybrid integrated circuit device.
【００１１】次に作用，効果について説明する。本実施
例による混成集積回路装置と従来例の混成集積回路装置
との相違点は、キャップ７封じ後、フィン１ａの窓８に
回路基板裏面が現れるその基板表面側の部品を、パッド
により特性を調整できることにある。Next, the operation and effect will be described. The difference between the hybrid integrated circuit device according to the present embodiment and the hybrid integrated circuit device according to the conventional example is that after the cap 7 is sealed, the characteristic of the component on the front surface side of the circuit board where the back surface of the circuit board appears in the window 8 of the fin 1a is changed by the pad. It can be adjusted.
【００１２】例として、混成集積回路の出力整合回路に
ついて説明する。図５は本実施例における混成集積回路
の出力整合回路を示し、５１は無線機送信段において電
力増幅用に用いられる高周波高出力トランジスタ、５２
は高周波信号伝送線路、５３は該伝送線路５２の途中と
接地間に設けられたインピーダンス整合用（伝送線路５
２のインピーダンスを５０Ωに上げるため）のコンデン
サ、５４は該伝送線路５２の終端間と接地に設けられた
やはりインピーダンス整合用のコンデンサ、５５はＤＣ
カットあるいは直列共振用のコンデンサであり、５０は
上記フィン１ａの窓８内に構成された裏面部品装置部に
て上記上面パターン上のチップコンデンサ３による容量
５４に並列に装着された上記チップコンデンサによる容
量である。As an example, an output matching circuit of a hybrid integrated circuit will be described. FIG. 5 shows an output matching circuit of the hybrid integrated circuit in this embodiment, 51 is a high-frequency high-power transistor used for power amplification in the radio transmitter stage, and 52.
Is a high-frequency signal transmission line, and 53 is an impedance matching (transmission line 5
2) to raise the impedance of 50 to 50Ω), 54 is an impedance matching capacitor provided between the ends of the transmission line 52 and the ground, and 55 is a DC
Reference numeral 50 is a capacitor for cutting or series resonance, and 50 is a chip capacitor mounted in parallel with the capacitor 54 formed by the chip capacitor 3 on the upper surface pattern in the backside component device portion formed in the window 8 of the fin 1a. Capacity.
【００１３】図５(a) ，(b) の等価回路、これらの等価
回路に相当する図５(c) ，(d) の出力電力−周波数特性
に示すように、フィンの窓８内に構成された裏面部品装
置部に表面側のチップコンデンサ３と並列になるようチ
ップコンデンサ１０を半田付けすると、容量５０が容量
５４に並列接続されて全体的な整合回路容量が増加する
ため、この容量の付加により出力電力特性のピ−クは、
図５(d) の矢印に示されるように破線の特性から実線の
特性に周波数の低い方に移動する。また半田付け部品と
してチップコンデンサ１０に変えてコイルを並列に接続
すると、コイルの大きさにもよるが、出力電力特性のピ
ークは上記と逆に周波数の高い方に移動する。As shown in the equivalent circuits of FIGS. 5 (a) and 5 (b), and the output power-frequency characteristics of FIGS. 5 (c) and 5 (d) corresponding to these equivalent circuits, the structure is provided in the window 8 of the fin. When the chip capacitor 10 is soldered in parallel to the chip capacitor 3 on the front surface side to the device unit of the rear surface part thus formed, the capacitor 50 is connected in parallel to the capacitor 54 and the overall matching circuit capacity increases, so that the capacitance of this capacitor is increased. The peak of output power characteristics is
As indicated by the arrow in FIG. 5 (d), the characteristic moves from the broken line to the solid line in the lower frequency direction. Further, when the coils are connected in parallel instead of the chip capacitors 10 as the soldering parts, the peak of the output power characteristic shifts to the higher frequency side contrary to the above though it depends on the size of the coil.
【００１４】このように本実施例によれば、フィンに窓
を設けてこの窓部に露出する回路基板裏面に部品を装着
し、これをスルーホールを介して回路基板表面側の部品
と接続するようにしたので、キャップ封じ後でも調整用
部品を後付けすることができ、装置の特性を製造者側に
おいても使用者側においても後からの部品の追加により
所望とする特性に調整することができる。As described above, according to this embodiment, the fin is provided with the window, the component is mounted on the rear surface of the circuit board exposed in the window, and the component is connected to the component on the front surface side of the circuit board through the through hole. Since the adjustment parts can be attached after the cap is sealed, the characteristics of the device can be adjusted to the desired characteristics by adding the parts later on both the manufacturer side and the user side. .
【００１５】実施例２．なお、上記実施例では、回路基
板の裏面に並列コンデンサ１０を一個付加した場合につ
いて説明したが、フィンの窓８を広くして、複数個の部
品を回路基板１ａの裏面に半田付けできるようにし、こ
れにより複数の回路基板上の部品の各々に回路部品を外
付けできるようにしてもよい。Example 2. In the above embodiment, the case where one parallel capacitor 10 is added to the back surface of the circuit board has been described, but the fin window 8 is widened so that a plurality of components can be soldered to the back surface of the circuit board 1a. Therefore, the circuit component may be externally attached to each of the components on the plurality of circuit boards.
【００１６】実施例３．また回路基板の裏面に外付けす
る部品としては、半田付けした場合にもフィン１ａの厚
みを越えることのない部品であれば、可変コンデンサ等
の素子定数可変部品を装着することもできる。これらの
実施例においても上記実施例１と同様の効果が得られ
る。Embodiment 3. Further, as a component externally attached to the back surface of the circuit board, a component constant variable component such as a variable capacitor may be mounted as long as the component does not exceed the thickness of the fin 1a even when soldered. Also in these embodiments, the same effect as that of the first embodiment can be obtained.
【００１７】[0017]
【発明の効果】以上のように、この発明によれば、フィ
ンに窓を設けて該窓に、スルーホール及びパッドを有す
る裏面部品装置部が現れるようにしたので、キャップ封
じ後でも回路基板裏面に調整用の追加部品を外付けする
ことができ、製造者側においては出荷時に該装置の特性
を所望とする使用周波数に対し最適な特性に調整するこ
とができる。また該混成集積回路を使用する使用者側に
おいても、その使用にあたってこれをその希望する特性
に従って調整することができる効果がある。As described above, according to the present invention, the fin is provided with the window so that the rear surface component device portion having the through hole and the pad appears in the window. Further, an additional component for adjustment can be externally attached, and the manufacturer can adjust the characteristics of the device at the time of shipping to the optimum characteristics for the desired operating frequency. Also, on the side of the user who uses the hybrid integrated circuit, there is an effect that it can be adjusted according to the desired characteristics when using the hybrid integrated circuit.
【図１】本発明の一実施例による混成集積回路装置をフ
ィン側から見た外形図。FIG. 1 is an external view of a hybrid integrated circuit device according to an embodiment of the present invention viewed from a fin side.
【図２】本発明の一実施例による混成集積回路装置をフ
ィン側から見た拡大断面図。FIG. 2 is an enlarged cross-sectional view of a hybrid integrated circuit device according to an embodiment of the present invention viewed from the fin side.
【図３】上記実施例１の混成集積回路装置を理解しやす
くするための分解図。FIG. 3 is an exploded view for facilitating understanding of the hybrid integrated circuit device according to the first embodiment.
【図４】従来の高周波電力増幅用混成集積回路の構造
図。FIG. 4 is a structural diagram of a conventional hybrid integrated circuit for high frequency power amplification.
【図５】上記実施例１の混成集積回路の出力整合回路を
示す図、及びその出力電力−周波数特性を示す図。FIG. 5 is a diagram showing an output matching circuit of the hybrid integrated circuit of the first embodiment and a diagram showing output power-frequency characteristics thereof.
１ａ 本発明によるフィン １ｂ 従来例によるフィン ２ａ 本発明による回路基板 ２ｂ 従来の基板 ３ 回路部品（チップコンデンサ） ４ スルーホール ５ 半導体素子 ６ 端子（リード） ７ キャップ ８ フィンにあけられた窓 ９ 窓部用スルーホール １０ 外付部品であるチップコンデンサ １１ パッド ５４ 表面部品による容量 ５０ 外付部品による容量 1a Fin according to the present invention 1b Fin according to the conventional example 2a Circuit board according to the present invention 2b Conventional substrate 3 Circuit component (chip capacitor) 4 Through hole 5 Semiconductor element 6 Terminal (lead) 7 Cap 8 Window formed in fin 9 Window portion Through hole 10 Chip capacitor which is an external component 11 Pad 54 Capacitance by surface component 50 Capacitance by external component
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【手続補正書】[Procedure amendment]
【提出日】平成５年９月９日[Submission date] September 9, 1993
【手続補正１】[Procedure Amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】００１１[Correction target item name] 0011
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【００１１】次に作用，効果について説明する。本実施
例による混成集積回路装置と従来例の混成集積回路装置
との相違点は、キャップ７封じ後、フィン１ａの窓８に
回路基板裏面が現れるその基板裏面側の部品を取り替え
ることにより特性を調整できることにある。Next, the operation and effect will be described. Difference from the hybrid integrated circuit device of the hybrid integrated circuit device and a conventional example according to this embodiment, after the cap 7 sealing, replace the components of the circuit board rear surface it appears the substrate back surface side window 8 of the fin 1a
It is to adjust the properties by Rukoto.
【手続補正２】[Procedure Amendment 2]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】００１２[Correction target item name] 0012
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【００１２】例として、混成集積回路の出力整合回路に
ついて説明する。図５は本実施例における混成集積回路
の出力整合回路を示し、５１は無線機送信段において電
力増幅用に用いられる高周波高出力トランジスタ、５２
は高周波信号伝送線路、５３は該伝送線路５２の途中と
接地間に設けられたインピーダンス整合用（伝送線路５
２のトランジスタ５１よりコンデンサ５３までの電気長
とコンデンサ５３の並列共振作用により５０Ωに向かっ
てインピーダンスを上げるため）のコンデンサ、５４は
該伝送線路５２の終端間と接地に設けられたやはりイン
ピーダンス整合用のコンデンサ、５５はＤＣカットある
いは直列共振用のコンデンサであり、５０は上記フィン
１ａの窓８内に構成された裏面部品装置部にて上記上面
パターン上のチップコンデンサ３による容量５４に並列
に装着された上記チップコンデンサによる容量である。As an example, an output matching circuit of a hybrid integrated circuit will be described. FIG. 5 shows an output matching circuit of the hybrid integrated circuit in this embodiment, 51 is a high-frequency high-power transistor used for power amplification in the radio transmitter stage, and 52.
Is a high-frequency signal transmission line, and 53 is an impedance matching (transmission line 5
Electrical length from transistor 51 of 2 to capacitor 53
And the parallel resonance action of the capacitor 53 leads to 50Ω.
Capacitor for the upper gel) impedance Te, the capacitor for still impedance matching provided the ground and between the end of the transmission line 52 54, 55 is a DC cut or capacitor for series resonance, it is the fin 50 1a is the capacitance of the chip capacitor mounted in parallel with the capacitance 54 of the chip capacitor 3 on the upper surface pattern in the backside component device portion formed in the window 8a.
Claims (2)
田付けし、上記回路基板の上面を保護するキャップを接
着してなる混成集積回路装置において、 上記フィンは上記回路基板の裏面が装着される部分の一
部に窓を有し、該窓の部分にて外付用の回路部品が、上
記回路基板の裏面にパッドに接続されて装着されてなる
ことを特徴とする混成集積回路装置。1. A hybrid integrated circuit device comprising a radiating fin, the back surface of a circuit board being soldered, and a cap protecting the upper surface of the circuit board being bonded, wherein the fin is mounted on the back surface of the circuit board. A hybrid integrated circuit device, characterized in that it has a window in a part thereof, and an external circuit component is mounted on the back surface of the circuit board by being connected to a pad at the window portion.
て、 上記回路基板の裏面のパッドは、上記回路基板の表面と
該窓部用スルーホールを介して接続されていることを特
徴とする混成集積回路装置。2. The hybrid integrated circuit device according to claim 1, wherein the pad on the back surface of the circuit board is connected to the front surface of the circuit board through the window through hole. Integrated circuit device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25419192A JPH0685428A (en) | 1992-08-28 | 1992-08-28 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25419192A JPH0685428A (en) | 1992-08-28 | 1992-08-28 | Hybrid integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0685428A true JPH0685428A (en) | 1994-03-25 |
Family
ID=17261511
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25419192A Pending JPH0685428A (en) | 1992-08-28 | 1992-08-28 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0685428A (en) |
-
1992
- 1992-08-28 JP JP25419192A patent/JPH0685428A/en active Pending
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