JPH0673598A - Method for producing semiconductor and device therefor - Google Patents
Method for producing semiconductor and device thereforInfo
- Publication number
- JPH0673598A JPH0673598A JP13350291A JP13350291A JPH0673598A JP H0673598 A JPH0673598 A JP H0673598A JP 13350291 A JP13350291 A JP 13350291A JP 13350291 A JP13350291 A JP 13350291A JP H0673598 A JPH0673598 A JP H0673598A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- processing tank
- supply
- plating
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体製造方法並びに
その装置、より詳細には、半導体ウェハーにバンプ電極
や配線を形成したり、化成処理を施す場合に好適する噴
流式のメッキ方法や化成方法並びにそれらに用いる装置
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing method and apparatus, and more particularly to a jet type plating method and chemical conversion method suitable for forming bump electrodes and wirings on a semiconductor wafer and for chemical conversion treatment. The present invention relates to a method and an apparatus used therefor.
【０００２】[0002]
【従来の技術】半導体装置を製造する場合、半導体ウェ
ハーに対し、メッキ処理を施したり、化成処理を施すこ
とがある。例えば、ＤＨＤ（Double Heatsink Diode)型
ダイオードを製造する場合や、ＴＡＢ（Tape Automated
Bounding ）型半導体装置を製造する場合、半導体ウェ
ハーに対し、Ａｇ、Ａｕ、Ｃｕ、半田等よりなる50〜60
μｍ程度のバンプ電極を形成している。また、Ａｕその
他の金属により、配線を形成している。そして、このよ
うなバンプ電極や配線を形成する場合、一般に噴流式の
メッキ装置が用いられている。具体的には、メッキ液を
底面の中央から導入し上方からオーバーフローさせる噴
流式のメッキ槽と；このメッキ槽内に配設された下部電
極と；メッキ槽の上部にメッキ槽の上端から若干突出す
るように配設され、半導体ウェハーをその被処理面を下
にして保持する複数の上部電極とを有し；半導体ウェハ
ーの被処理面にメッキ液を噴流させながら上下電極間に
電流を流して半導体ウェハーにメッキ処理を施すものが
ある。2. Description of the Related Art When manufacturing a semiconductor device, a semiconductor wafer may be subjected to a plating treatment or a chemical conversion treatment. For example, when a DHD (Double Heatsink Diode) type diode is manufactured, or when a TAB (Tape Automated Diode) is manufactured.
When manufacturing a Bounding) type semiconductor device, a semiconductor wafer is made of Ag, Au, Cu, solder, etc.
A bump electrode of about μm is formed. The wiring is formed of Au or other metal. When forming such bump electrodes and wirings, a jet type plating apparatus is generally used. Specifically, a jet-type plating tank that introduces the plating solution from the center of the bottom surface and overflows it from above; a lower electrode that is disposed in this plating tank; and a portion above the plating tank that slightly projects from the upper end of the plating tank. And a plurality of upper electrodes for holding the semiconductor wafer with the surface to be processed facing down; and applying a current between the upper and lower electrodes while jetting a plating solution onto the surface to be processed of the semiconductor wafer. Some semiconductor wafers are plated.
【０００３】[0003]
【発明が解決しようとする課題】しかし、従来のメッキ
装置にあっては、図10の如くメッキ液ａをメッキ槽ｂに
おける底面ｃの中央から導入し上方からオーバーフロー
させるため、この噴出口ｄと対面している半導体ウェハ
ーＷの中央部にメッキ液ａが当たって放射状に流れるの
で、半導体ウェハー中央部のメッキ層の成長が早くな
り、メッキ層の厚みが中央部と周辺では20％程度も異な
り、不均一になるという問題点がある。また、底面ｃの
中央から導入した場合にメッキ液ａが放射状に流れず
に、一方向に偏った流れを生じることがあり、その場合
には、メッキ処理の前半と後半で半導体ウエハーの向き
を反転させて、メッキ層の厚みの均一化を図って前述の
問題に対処していたが、これでもメッキ層の厚みが半導
体ウェハーＷの中央部と周辺では10％程度も異なり完全
に厚みを均一にすることが不可能であるとともに、その
作業に手間がかかるといった問題点がある。However, in the conventional plating apparatus, since the plating solution a is introduced from the center of the bottom surface c of the plating tank b and overflows from above as shown in FIG. Since the plating solution a hits the central part of the facing semiconductor wafer W and flows radially, the growth of the plating layer in the central part of the semiconductor wafer is accelerated, and the thickness of the plating layer is different by about 20% between the central part and the periphery. However, there is a problem that it becomes uneven. In addition, when introduced from the center of the bottom surface c, the plating solution a may not flow radially but may have a biased flow in one direction. In that case, the orientation of the semiconductor wafer may be changed in the first half and the second half of the plating process. The above problem was addressed by reversing the thickness of the plating layer to make the thickness uniform, but the thickness of the plating layer in the central part and the periphery of the semiconductor wafer W was about 10% different and the thickness was completely uniform. There is a problem in that it is impossible to do so and it takes time and labor for the work.
【０００４】そこで、本発明は、半導体ウェハーを均一
な厚みでメッキ処理を施したり、同様に化成処理等を行
うことができる半導体製造方法並びにその装置を提供す
ることを目的としている。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor manufacturing method and an apparatus therefor, which can perform a plating process on a semiconductor wafer with a uniform thickness, and can similarly perform a chemical conversion process.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
に、本発明の半導体製造方法は、上方を開放した処理槽
の上方に半導体ウェハーをその被処理面を下にして保持
し、処理槽内の複数箇所より処理液を供給することによ
り処理槽の上方からオーバーフローさせながら、処理槽
内に配設された下部電極と上部電極間に電流を流して半
導体ウェハーにメッキ、化成等の処理を施すものであ
る。In order to achieve the above object, a semiconductor manufacturing method according to the present invention is a semiconductor manufacturing method in which a semiconductor wafer is held above a processing tank having an open upper side with its surface to be processed facing down. While supplying the processing liquid from multiple locations inside the processing tank, it overflows from above the processing tank and a current is passed between the lower electrode and the upper electrode arranged in the processing tank to perform plating, chemical conversion, etc. processing on the semiconductor wafer. It is something to give.
【０００６】また、同じく上記目的を達成するために、
本発明の半導体製造装置は、上方を開放した処理槽の上
方に半導体ウェハーをその被処理面を下にして保持し、
半導体ウェハーの被処理面に処理液を噴流させながら上
下電極間に電流を流して半導体ウェハーにメッキ、化成
等の処理を施す半導体製造装置において、処理槽内の複
数箇所に処理液を供給する供給口を設けたことを特徴と
するものである。Also, in order to achieve the above-mentioned object,
The semiconductor manufacturing apparatus of the present invention holds a semiconductor wafer with the surface to be processed facing down above a processing tank having an open top,
Supplying the processing solution to multiple points in the processing tank in a semiconductor manufacturing device that applies a current between the upper and lower electrodes while jetting the processing solution onto the surface to be processed of the semiconductor wafer to perform processing such as plating and chemical conversion on the semiconductor wafer. It is characterized by having a mouth.
【０００７】更に、後述する効果により、複数箇所より
供給される処理液の流量や供給時間を調整しうる制御手
段を設けるのが望ましく、特に処理槽の底面に等間隔に
複数の供給口を設け、制御手段としてそれぞれの供給口
への供給の途中に流量調整弁を設けることにより流量を
調整可能とするとともにそれぞれの供給口より間欠的に
処理液を供給するのが好ましい。Further, it is desirable to provide a control means capable of adjusting the flow rate and the supply time of the processing liquid supplied from a plurality of locations in order to achieve the effects described later, and in particular, a plurality of supply ports are provided at equal intervals on the bottom surface of the processing tank. It is preferable that the flow rate can be adjusted by providing a flow rate adjusting valve as a control means in the middle of supply to each supply port, and the processing liquid is intermittently supplied from each supply port.
【０００８】[0008]
【作用】以上の如く本発明の半導体製造装置によれば、
上方を開放した処理槽の上方に半導体ウェハーをその被
処理面を下にして保持し、例えば流量調整弁の一つを開
いて処理槽の底面又は側面に設けた供給口から一定時間
処理液を供給し、次に開いた流量調整弁を閉じて他の流
量調整弁を開いて供給口から一定時間処理液を供給し、
また同様に他の供給口から一定時間処理液を供給するこ
とにより、間欠的に半導体ウェハーの被処理面に処理液
が送りこまれ、処理槽の上端からオーバーフローするこ
とにより、処理液により半導体ウェハーの被処理面をメ
ッキ処理又は化成処理される。そして、オーバーフロー
した処理液は容器で受け、ポンプ及びフィルターを介し
て、再び処理槽内の供給口から導入されるのである。As described above, according to the semiconductor manufacturing apparatus of the present invention,
The semiconductor wafer is held above the processing tank with the upper side open with the surface to be processed facing down.For example, one of the flow rate adjusting valves is opened to supply the processing liquid for a certain period of time from the supply port provided on the bottom or side surface of the processing tank. Supply, then close the opened flow rate adjustment valve and open the other flow rate adjustment valves to supply the processing liquid from the supply port for a certain time,
Similarly, by supplying the processing liquid from another supply port for a certain period of time, the processing liquid is intermittently fed to the surface to be processed of the semiconductor wafer and overflows from the upper end of the processing tank, so that the processing liquid of the semiconductor wafer The surface to be treated is subjected to plating treatment or chemical conversion treatment. Then, the overflowed processing liquid is received by the container, and again introduced from the supply port in the processing tank via the pump and the filter.
【０００９】[0009]
【実施例】本発明の詳細を更に図示した実施例により説
明する。図１から図３に示す半導体製造装置は、本発明
の代表的実施例である。半導体製造装置Ａは、処理槽
１、下部電極２、上部電極３、包囲手段４、制御手段５
で構成されている。特に、半導体製造装置Ａの大きな特
徴は、処理槽１内の複数箇所より処理液を供給する点に
ある。The details of the present invention will be described with reference to the embodiments shown in the drawings. The semiconductor manufacturing apparatus shown in FIGS. 1 to 3 is a typical embodiment of the present invention. The semiconductor manufacturing apparatus A includes a processing tank 1, a lower electrode 2, an upper electrode 3, an enclosing means 4, and a control means 5.
It is composed of. In particular, a major feature of the semiconductor manufacturing apparatus A is that the processing liquid is supplied from a plurality of locations in the processing tank 1.
【００１０】まず、処理槽１は、図３の如くポリプロピ
レン等の樹脂よりなる上方を開放したものである。下部
電極２は、図３の如く前記処理槽１内に配設されている
メッシュ状のものであり、即ち陽極である。上部電極３
は、図３の如く処理槽１の上部に処理槽１の上端より数
mm程度突出するように配設され、半導体ウェハーＷをそ
の被処理面を下にして保持する陰極ピンである。尚、特
に図示しないが、図示した上部電極３の代わりに、半導
体ウェハーＷの被処理面の背面より電流を流す離面電極
を採用することもできる。First, as shown in FIG. 3, the processing tank 1 is made of a resin such as polypropylene and has an open upper part. The lower electrode 2 is a mesh-shaped one disposed in the processing tank 1 as shown in FIG. 3, that is, an anode. Upper electrode 3
Is a number on the upper part of the processing tank 1 from the upper end of the processing tank 1 as shown in FIG.
The cathode pins are arranged so as to protrude by about mm and hold the semiconductor wafer W with the surface to be processed facing down. Although not shown in particular, instead of the illustrated upper electrode 3, it is also possible to employ a separation surface electrode for passing a current from the rear surface of the surface to be processed of the semiconductor wafer W.
【００１１】包囲手段４は、図２に示す如く処理槽１の
上端に等間隔に設けており、前記上部電極である陰極ピ
ン３の周囲を絶縁性の流体で包囲するものである。この
包囲手段４は、図４に示す如く陰極ピン３を貫通させた
セラミック等よりなるブッシング６の穴６ａの径を、陰
極ピン３より若干大きく形成するとともに、陰極ピン３
の中途部に、図５に示すように、ブッシンク６の内径と
ほぼ等しい外径の偏平部７ａ、７ｂを設け、下端に雄ネ
ジ７ｃを有する。このため、陰極ピン３をブッシング６
の中心に保持することができるとともに、図７に示すよ
うに、陰極ピン３とブッシング６との間に隙間、即ち流
体流出路８が形成されている。また、陰極ピン３への給
電導体９、10に沿って、流体導入路11ａ、11ｂを有す
る。この流体導入路11ａ、11ｂは、例えば断面が円形の
縦孔12、横孔13の中に、これとほぼ同一径を有し、一部
に切削加工による小断面積部９ａ、10ａを有するステン
レス等よりなる給電導体９、10を挿通することによって
形成することができる。給電導体９及び陰極ピン３は、
それぞれ下端に形成された雄ネジを、給電導体10の上面
両端に形成した雌ネジに螺合し、電気的及び機械的に接
続固定されている。図４中、14ａ〜14ｄはそれぞれＯリ
ングである。尚、この包囲手段４に用いる絶縁性の流体
は、特に窒素ガスが好ましいが、他にも空気等の気体、
純水等の液体を用いることもできる。また、図２及び図
３に示す15は、処理槽１の上面に設け、陰極ピン３より
も外方位置に突出する半導体ウェハーＷの位置決めピン
である。As shown in FIG. 2, the enclosing means 4 is provided at the upper end of the processing tank 1 at equal intervals and encloses the cathode pin 3 which is the upper electrode with an insulating fluid. As shown in FIG. 4, this enclosing means 4 has a hole 6a of a bushing 6 made of ceramic or the like that penetrates the cathode pin 3 and has a diameter slightly larger than the diameter of the cathode pin 3, and the cathode pin 3 is also formed.
As shown in FIG. 5, flat portions 7a and 7b having an outer diameter substantially equal to the inner diameter of the bushing 6 are provided in the middle portion, and a male screw 7c is provided at the lower end. Therefore, the cathode pin 3 is attached to the bushing 6
In addition to being able to be held at the center, a gap, that is, a fluid outflow passage 8 is formed between the cathode pin 3 and the bushing 6, as shown in FIG. Further, fluid supply paths 11a and 11b are provided along the power supply conductors 9 and 10 to the cathode pin 3. The fluid introduction paths 11a and 11b are, for example, vertical holes 12 and horizontal holes 13 having a circular cross section, and have substantially the same diameter as those of the vertical holes 12 and horizontal holes 13. It can be formed by inserting the feeding conductors 9 and 10 made of, for example. The power supply conductor 9 and the cathode pin 3 are
Male screws formed at the lower ends are screwed into female screws formed at both ends of the upper surface of the power supply conductor 10, and are electrically and mechanically connected and fixed. In FIG. 4, 14a to 14d are O-rings. The insulating fluid used for the surrounding means 4 is particularly preferably nitrogen gas, but other gas such as air,
A liquid such as pure water can also be used. Further, reference numeral 15 shown in FIGS. 2 and 3 is a positioning pin for the semiconductor wafer W which is provided on the upper surface of the processing tank 1 and projects outward from the cathode pin 3.
【００１２】制御手段５は、処理槽１内の複数箇所より
供給されるメッキ液等の処理液16の流量や供給時間を調
整するものである。即ち、図例の制御手段５は、図２及
び図３に示すように処理槽１の底面に、等間隔に複数の
供給口17・・を設け、この供給口17との取合管18を設
け、図１の如くそれぞれの供給口17・・への供給の途中
に流量調整弁19・・を設け、この流量調整弁19・・によ
り処理槽１内に供給される処理液16の流量や供給時間を
調整するようにしたものである。尚、処理槽１に設ける
供給口17は、２個以上であればよく、また供給口17を設
ける場所も処理槽１の底面又は側面であってもよい。特
に、処理槽１の側面に供給口17を設ける場合には、処理
液が処理槽１内の斜め上方に供給されるように供給口17
を位置させ、処理液を渦流で供給することもできる。ま
た、特に図示しないが、処理槽１に供給口17を設ける代
わり、処理槽１内に供給管を配管し、この供給管口より
処理液を供給することにより、処理槽１内の複数箇所よ
り供給することも可能である。The control means 5 is for adjusting the flow rate and the supply time of the processing liquid 16 such as a plating liquid supplied from a plurality of locations in the processing tank 1. That is, as shown in FIGS. 2 and 3, the control means 5 in the illustrated example has a plurality of supply ports 17, ... At equal intervals on the bottom surface of the processing tank 1 and a connecting pipe 18 with the supply port 17. 1. As shown in FIG. 1, a flow rate adjusting valve 19 ... Is provided in the middle of the supply to each supply port 17 ..., and the flow rate of the processing liquid 16 supplied into the processing tank 1 by the flow rate adjusting valve 19 ... The supply time is adjusted. The number of the supply ports 17 provided in the processing tank 1 may be two or more, and the place where the supply ports 17 are provided may be the bottom surface or the side surface of the processing tank 1. Particularly, when the supply port 17 is provided on the side surface of the processing tank 1, the supply port 17 is provided so that the processing liquid is supplied obliquely upward in the processing tank 1.
Can be positioned and the processing liquid can be supplied in a vortex flow. Further, although not particularly shown, instead of providing the supply port 17 in the processing tank 1, a supply pipe is piped in the processing tank 1 and the processing liquid is supplied from this supply pipe opening, so that the processing liquid is supplied from a plurality of locations in the processing tank 1. It is also possible to supply.
【００１３】次に、流量調整弁19は、バタフライ弁、ボ
ール弁等のさまざまな公知の弁を用いることができるの
であるが、特に図例の流量調整弁19は、図８に示すよう
に計装空気によって作動するいわゆるピンチバルブを用
いている。即ち、処理槽１の取合管18に接続するテフロ
ンチューブ20の途中にこの流量調整弁19を設け、図８の
如く導入管21より1.5 〜2.0kg/ｃｍ2 の計装空気22を供
給することにより弁本体23内を加圧して、この弁本体23
内に設けられたシリコンチューブ23ａを圧縮することに
より、処理液の流量を調整したり、閉じることができる
のである。Next, various known valves such as a butterfly valve and a ball valve can be used as the flow rate adjusting valve 19, and in particular, the flow rate adjusting valve 19 in the example shown in FIG. A so-called pinch valve that operates by air is used. That is, this flow rate adjusting valve 19 is provided in the middle of the Teflon tube 20 connected to the joining pipe 18 of the processing tank 1, and the instrument air 22 of 1.5 to 2.0 kg / cm 2 is supplied from the introduction pipe 21 as shown in FIG. By pressurizing the inside of the valve body 23,
The flow rate of the processing liquid can be adjusted or closed by compressing the silicon tube 23a provided inside.
【００１４】そして、半導体製造装置Ａ全体は、図１に
示すように処理槽１の上方に設けた上部電極３に半導体
ウェハーＷをその被処理面を下にして保持し、処理槽１
の下方の複数箇所から処理液が導入され、処理槽１の上
端からオーバーフローさせることにより、半導体ウェハ
ーＷの被処理面をメッキ処理又は化成処理し、オーバー
フローした処理液は容器24で受け、ポンプ25及びフィル
ター26を介して、再び処理槽１の供給口17・・から導入
されるのである。As shown in FIG. 1, the semiconductor manufacturing apparatus A as a whole holds the semiconductor wafer W on the upper electrode 3 provided above the processing tank 1 with the surface to be processed facing down.
The treatment liquid is introduced from a plurality of locations below the upper surface of the treatment tank 1 and overflows from the upper end of the treatment tank 1 so that the surface of the semiconductor wafer W to be treated is subjected to a plating treatment or a chemical conversion treatment. Then, it is again introduced from the supply port 17 of the processing tank 1 via the filter 26.
【００１５】而して、本発明の代表的実施例の半導体製
造装置Ａによれば、図１に示すように処理槽１の上方に
設けた上部電極３に半導体ウェハーＷをその被処理面を
下にして保持し、流体導入口27から、流体例えば窒素ガ
ス28を導入すると、窒素ガス28は、流体導入路11ａ、11
ｂ及び陰極ピン３とブッシング６との間の流体流出路８
を通って、陰極ピン３の周囲から流出される。そして、
図１及び図９のように流量調整弁19ａを開いて処理槽１
の底面に設けた供給口17ａから一定時間処理液を供給
し、次に流量調整弁19ａを閉じて流量調整弁19ｂを開い
て処理槽１の底面に設けた供給口17ｂから一定時間処理
液を供給し、また同様に供給口17ｃ、供給口17ｄから一
定時間処理液を供給することにより、間欠的に半導体ウ
ェハーＷの被処理面に処理液が送りこまれ、処理槽１の
上端からオーバーフローすることにより、処理液16によ
り半導体ウェハーＷの被処理面をメッキ処理又は化成処
理される。そして、オーバーフローした処理液は容器24
で受け、ポンプ25及びフィルター26を介して、再び処理
槽１内の供給口17・・から導入されるのである。Thus, according to the semiconductor manufacturing apparatus A of the representative embodiment of the present invention, as shown in FIG. 1, the semiconductor wafer W is placed on the upper electrode 3 provided above the processing bath 1 and the surface to be processed is placed on the upper surface of the upper electrode 3. When the fluid is held down and a fluid such as nitrogen gas 28 is introduced from the fluid introduction port 27, the nitrogen gas 28 becomes the fluid introduction paths 11a, 11
b and the fluid outflow passage 8 between the cathode pin 3 and the bushing 6
And flows out from around the cathode pin 3. And
As shown in FIGS. 1 and 9, the flow control valve 19a is opened and the processing tank 1 is opened.
The processing solution is supplied from the supply port 17a provided on the bottom surface of the processing tank for a certain period of time, then the flow rate adjusting valve 19a is closed and the flow rate adjusting valve 19b is opened to supply the processing solution from the supply port 17b provided on the bottom surface of the processing tank 1 for a certain period of time. The processing liquid is supplied to the surface to be processed of the semiconductor wafer W intermittently by supplying the processing liquid from the supply port 17c and the supply port 17d for a certain time, and overflows from the upper end of the processing tank 1. Thus, the surface to be processed of the semiconductor wafer W is subjected to plating treatment or chemical conversion treatment with the treatment liquid 16. Then, the overflowed processing liquid is stored in the container 24.
And is introduced again from the supply port 17 in the processing tank 1 through the pump 25 and the filter 26.
【００１６】更に、実験結果に基づいて詳しく説明す
る。Further, a detailed description will be given based on experimental results.
【実験例】図１から図９に示す本発明の代表的実施であ
る半導体製造装置Ａを用いて、処理液16であるメッキ液
により半導体ウェハーＷをメッキ処理し、従来の半導体
製造装置を用いた場合に比べて、半導体ウェハーＷのメ
ッキの状態を比較する。 （条件） 処理槽１の寸法：内径120mm 、深さ60mm 取合管18の寸法：内径10mm メッキ液：Ａｕ（金） 電流波形：直流 電流密度：５ mA/cm2 電流：27.4 mA 流量：3.5 l/min メッキ時間：75分 処理液の温度：65℃ 半導体ウェハーＷの寸法：外径150mm 、Ｌ1 ＝25mm、Ｌ
2 ＝105mm （図９及び図10おける寸法） 目標のメッキの厚み：22μｍ[Experimental Example] Using a semiconductor manufacturing apparatus A which is a typical embodiment of the present invention shown in FIGS. 1 to 9, a semiconductor wafer W is plated with a plating solution which is a processing solution 16, and a conventional semiconductor manufacturing apparatus is used. The state of plating of the semiconductor wafer W will be compared with that in the case where there is. (Conditions) Dimension of processing tank 1 ： 120mm inside diameter, 60mm depth Depth of connecting pipe 18 ： 10mm inside diameter Plating liquid ： Au (gold) Current waveform ： DC Current density ： 5mA / cm 2 Current ： 27.4mA Flow rate ： 3.5 l / min Plating time: 75 minutes Treatment liquid temperature: 65 ° C Dimensions of semiconductor wafer W: Outer diameter 150 mm, L 1 = 25 mm, L
2 = 105mm (dimensions in Fig. 9 and Fig. 10) Target plating thickness: 22μm
【００１７】（方法）図９のように流量調整弁19ａを開
いて処理槽１の底面に設けた供給口17ａから２分間メッ
キ液16を供給し、次に流量調整弁19ａを閉じて流量調整
弁19ｂを開いて処理槽１の底面に設けた供給口17ｂから
２分間メッキ液16を供給し、また同様に供給口17ｃ、供
給口17ｄから２分間メッキ液16を供給することにより、
半導体ウェハーＷの被処理面にメッキ液16が送りこま
れ、処理槽１の上端からオーバーフローすることによ
り、メッキ液16により半導体ウェハーＷの被処理面をメ
ッキ処理する。同様に、２分間ごとに間欠的に供給口17
ａ、17ｂ 17ｃ 17ｄを順に繰り返して開放してメッキ
液16を供給し、最後に１分間づつ同様に供給を行うこと
により、半導体ウェハーＷの被処理面をメッキ処理し
て、半導体ウェハーＷのそれぞれの箇所のメッキ層を厚
みを測定する。また、参考のため同様に半導体製造装置
Ａを用い、供給口17ｄのみを開放し、この供給口17ｄよ
り、メッキ液16を導入し、半導体ウェハーＷの被処理面
をメッキ処理して、半導体ウェハーＷのそれぞれの箇所
のメッキ層を厚みを測定する。従来の半導体製造装置を
用いた場合には、同じ条件で図10のように処理槽１の中
央に設けた１個の供給口17よりメッキ液ａを導入し、半
導体ウェハーＷの被処理面をメッキ処理して、半導体ウ
ェハーＷのそれぞれの箇所のメッキ層を厚みを測定す
る。(Method) As shown in FIG. 9, the flow rate adjusting valve 19a is opened, the plating solution 16 is supplied from the supply port 17a provided at the bottom of the processing tank 1 for 2 minutes, and then the flow rate adjusting valve 19a is closed to adjust the flow rate. By opening the valve 19b and supplying the plating solution 16 from the supply port 17b provided on the bottom surface of the processing tank 2 for 2 minutes, and similarly supplying the plating solution 16 from the supply port 17c and the supply port 17d for 2 minutes,
The plating solution 16 is fed to the surface to be processed of the semiconductor wafer W and overflows from the upper end of the processing tank 1, so that the surface of the semiconductor wafer W to be processed is plated. Similarly, the supply port 17 is intermittently supplied every 2 minutes.
a, 17b, 17c, and 17d are sequentially opened to supply the plating solution 16 and, finally, the supply is performed for 1 minute in the same manner. Measure the thickness of the plating layer at the point. Also, for reference, similarly, using the semiconductor manufacturing apparatus A, only the supply port 17d is opened, the plating solution 16 is introduced from the supply port 17d, and the surface to be processed of the semiconductor wafer W is subjected to plating treatment to obtain a semiconductor wafer. The thickness of the plating layer at each location of W is measured. When a conventional semiconductor manufacturing apparatus is used, the plating solution a is introduced under the same conditions from one supply port 17 provided at the center of the processing tank 1 as shown in FIG. After the plating process, the thickness of the plating layer at each position of the semiconductor wafer W is measured.
【００１８】（結果）本発明の代表的実施である半導体
製造装置Ａを用いた場合の、半導体ウェハーＷにおける
それぞれの箇所のメッキ層の厚み（単位：μｍ）をまと
めたのが、表１である。(Results) Table 1 summarizes the thickness (unit: μm) of the plating layer at each position in the semiconductor wafer W when the semiconductor manufacturing apparatus A, which is a typical embodiment of the present invention, is used. is there.
【００１９】[0019]
【表１】 [Table 1]
【００２０】また、参考のため半導体製造装置Ａを用
い、供給口17ｄのみを開放し、この供給口17ｄより、メ
ッキ液16を導入し、半導体ウェハーＷの被処理面をメッ
キ処理した場合の半導体ウェハーＷにおけるそれぞれの
箇所のメッキ層の厚み（単位：μｍ）をまとめたのが、
表２である。Also, for reference, the semiconductor manufacturing apparatus A is used, only the supply port 17d is opened, the plating solution 16 is introduced from this supply port 17d, and the surface to be processed of the semiconductor wafer W is plated. The thickness (unit: μm) of the plating layer at each position on the wafer W is summarized as follows.
It is Table 2.
【００２１】[0021]
【表２】 [Table 2]
【００２２】従来のメッキ装置を用いた場合の半導体ウ
ェハーＷにおけるそれぞれの箇所のメッキ層の厚み（単
位：μｍ）をまとめたのが、表３である。Table 3 summarizes the thickness (unit: μm) of the plating layer at each location in the semiconductor wafer W when the conventional plating apparatus is used.
【００２３】[0023]
【表３】 [Table 3]
【００２４】このように、従来のメッキ装置を用いた場
合には、表３に示すように半導体ウェハーＷの中央部
（Ｗ３、Ｗ２、Ｗ７、Ｗ８）のメッキ層が厚くなり、特
に噴出口ｄと対面するＷ３の箇所においては、メッキの
厚みが30.1μｍとなって最大となり、また目標のメッキ
の厚み22μｍに対してメッキ層の平均厚みは24.8μｍと
なる。そして、各測定点での厚みのバラツキの目安とな
る標準偏差の値は2.78となりメッキ層の厚みに大きなバ
ラツキが生じる。これに対して、半導体製造装置Ａを用
いれば、表１に示すように半導体ウェハーＷのメッキ層
の厚みのバラツキが少なくなり、特にバラツキの大きな
箇所（Ｗ４）でも、メッキの厚みが20.2μｍ程度であ
り、また目標のメッキの厚み22μｍに対してメッキ層の
平均厚みは21.9μｍとなる。そして、標準偏差の値も0.
86となり非常にメッキ層の厚みのバラツキが少なくな
る。また、参考のため供給口17ｄのみを開放し、この供
給口17ｄより、メッキ液を導入した場合には、表２に示
すように半導体ウェハーＷの外周部である特にＷ６の箇
所がメッキ層の厚みが厚くなり、また目標のメッキの厚
み22μｍに対して平均のメッキの厚みは23.1μｍとな
る。そして、標準偏差の値は3.03となり、従来のメッキ
装置を用いた場合よりもメッキ層の厚みのバラツキがよ
り大きくなる。このように、半導体製造装置Ａによれ
ば、非常に効果的に半導体ウェハーＷを均一な厚みでメ
ッキ処理を施すことができる。Thus, when the conventional plating apparatus is used, as shown in Table 3, the plating layer at the central portion (W3, W2, W7, W8) of the semiconductor wafer W becomes thicker, and in particular, the ejection port d. In the portion of W3 facing with, the plating thickness becomes 30.1 μm, which is the maximum, and the average thickness of the plating layer is 24.8 μm with respect to the target plating thickness of 22 μm. The value of the standard deviation, which serves as a guide for the variation in the thickness at each measurement point, is 2.78, and the variation in the thickness of the plating layer is large. On the other hand, when the semiconductor manufacturing apparatus A is used, the variation in the thickness of the plating layer of the semiconductor wafer W is reduced as shown in Table 1, and the thickness of the plating is about 20.2 μm even at a particularly large variation (W4). In addition, the average thickness of the plating layer is 21.9 μm with respect to the target plating thickness of 22 μm. And the standard deviation value is also 0.
As a result, the variation in the thickness of the plating layer is extremely reduced to 86. For reference, when only the supply port 17d is opened and the plating solution is introduced from this supply port 17d, as shown in Table 2, the outer peripheral portion of the semiconductor wafer W, particularly W6, is the plating layer. The thickness is increased, and the average plating thickness is 23.1 μm with respect to the target plating thickness of 22 μm. The value of the standard deviation is 3.03, and the variation in the thickness of the plating layer becomes larger than that when using the conventional plating apparatus. As described above, according to the semiconductor manufacturing apparatus A, it is possible to very effectively perform the plating process on the semiconductor wafer W with a uniform thickness.
【００２５】更に、半導体製造装置Ａによれば、図１に
示すように処理槽１の上方に設けた上部電極３に半導体
ウェハーＷをその被処理面を下にして保持し、流体導入
口27から、流体例えば窒素ガス28を導入すると、窒素ガ
ス28は、流体導入路11ａ、11ｂ及び陰極ピン３とブッシ
ング６との間との間の流体流出路８を通って、陰極ピン
３の周囲から流出される。このため、陰極ピン３の周囲
は窒素ガス28に包囲されるため、陰極ピン３が処理液16
に接触しなくなり、応じて陰極ピン３に半導体ウェハー
Ｗをバイパスする電流が流れなくなり、この結果、陰極
ピン３に不所望の金属が析出付着することがなく、陰極
ピン３と半導体ウェハーＷが析出金属によって接続一体
化することがなくなり、陰極ピン３から半導体ウェハー
Ｗが取れなくなるといったことがなくなる。また、陰極
ピン３にバイパス電流が流れなくなるので、メッキ条件
の設定が、非常に容易になる。更に、陰極ピン３に不所
望の金属が析出しないので、その除去作業も不要であ
り、装置の稼働率が向上する。更にまた、陰極ピン３の
先端を半導体ウェハーＷに食い込ませる必要がないの
で、半導体ウェハーＷを破損することもない。尚、窒素
ガス28は、必ずしも常に流し続ける必要はなく、その表
面張力よって、陰極ピン３の周囲に、単に泡状に付着し
ていてもよい。Further, according to the semiconductor manufacturing apparatus A, as shown in FIG. 1, the semiconductor wafer W is held on the upper electrode 3 provided above the processing tank 1 with the surface to be processed facing down, and the fluid introduction port 27 is provided. When a fluid such as nitrogen gas 28 is introduced, the nitrogen gas 28 passes through the fluid introduction passages 11a and 11b and the fluid outflow passage 8 between the cathode pin 3 and the bushing 6 and from around the cathode pin 3. To be leaked. Therefore, the periphery of the cathode pin 3 is surrounded by the nitrogen gas 28, so that the cathode pin 3 is treated with the treatment liquid 16
Therefore, a current that bypasses the semiconductor wafer W does not flow to the cathode pin 3 in response, and as a result, no unwanted metal deposits and adheres to the cathode pin 3 and the cathode pin 3 and the semiconductor wafer W deposit. The metal does not cause connection and integration, and the semiconductor wafer W cannot be removed from the cathode pin 3. Further, since the bypass current does not flow to the cathode pin 3, it becomes very easy to set the plating condition. Furthermore, since the undesired metal does not deposit on the cathode pin 3, the work of removing the undesired metal is unnecessary, and the operating rate of the device is improved. Furthermore, since it is not necessary to make the tip of the cathode pin 3 bite into the semiconductor wafer W, the semiconductor wafer W is not damaged. The nitrogen gas 28 does not always have to flow continuously, and may simply adhere to the periphery of the cathode pin 3 in the form of bubbles due to its surface tension.
【００２６】[0026]
【発明の効果】本発明の半導体製造方法並びにその方法
によれば、半導体ウェハーをその被処理面を下にして処
理槽の上方に保持し、処理槽内の複数箇所より処理液を
供給して半導体ウェハーの被処理面に処理液が送りこま
れ、処理槽の上端からオーバーフローすることにより、
処理液により半導体ウェハーの被処理面をメッキ処理又
は化成処理されるので、半導体ウェハーの一箇所に、処
理液が集中的に送り込まれることなく、半導体ウェハー
全体が均一なメッキ処理或いは化成処理が施される。具
体的には、半導体ウェハーにメッキ処理を施した場合、
半導体ウェハーの中央部と周辺でのメッキ層の厚みのバ
ラツキを５％以内にすることができる。また、複数箇所
より供給される処理液の流量や供給時間を調整しうる制
御手段を用いた場合には、処理槽内の複数箇所より供給
される処理液の流量や供給時間をさまざまな条件に応じ
て調整することができるので、より半導体ウェハー全体
を均一なメッキ処理或いは化成処理を施することができ
る。更に、処理槽の底面に等間隔に複数の供給口を設
け、制御手段としてそれぞれの供給口への供給の途中に
流量調整弁を設けることにより流量を調整可能とすると
ともにそれぞれの供給口より間欠的に処理液を供給する
ようにすれば、処理槽の底面に設けた供給口より処理液
を半導体ウェハーの被処理面に直接供給することがで
き、またそれぞれの供給口より間欠的に処理液を供給す
るため、すべての供給口より一度に処理液を供給する場
合に比べて処理液の流れの乱れ、方向、偏りを制御する
ことができるので、より半導体ウェハー全体を均一なメ
ッキ処理或いは化成処理を施することができる。According to the semiconductor manufacturing method and the method of the present invention, the semiconductor wafer is held above the processing tank with the surface to be processed facing down, and the processing liquid is supplied from a plurality of locations in the processing tank. The processing liquid is sent to the surface to be processed of the semiconductor wafer and overflows from the upper end of the processing tank,
Since the surface to be processed of the semiconductor wafer is plated or chemically treated with the treatment liquid, the treatment liquid is not concentratedly fed to one location of the semiconductor wafer, and the entire semiconductor wafer is uniformly plated or chemically treated. To be done. Specifically, when a semiconductor wafer is plated,
The variation in the thickness of the plating layer between the central portion and the periphery of the semiconductor wafer can be kept within 5%. Further, when a control means capable of adjusting the flow rate and the supply time of the processing liquid supplied from a plurality of points is used, the flow rate and the supply time of the processing solution supplied from a plurality of points in the processing tank can be adjusted to various conditions. Since it can be adjusted accordingly, the entire semiconductor wafer can be subjected to more uniform plating treatment or chemical conversion treatment. Further, a plurality of supply ports are provided at equal intervals on the bottom surface of the processing tank, and a flow rate adjusting valve is provided as a control means in the middle of the supply to each supply port so that the flow rate can be adjusted and the supply port is intermittently supplied from each supply port. If the processing solution is supplied to the semiconductor wafer directly, the processing solution can be directly supplied to the surface to be processed of the semiconductor wafer through the supply port provided on the bottom surface of the processing tank. Since it is possible to control the turbulence, the direction, and the deviation of the flow of the processing liquid as compared with the case where the processing liquid is supplied from all the supply ports at once, it is possible to perform uniform plating treatment or chemical conversion on the entire semiconductor wafer. It can be treated.
【図１】本発明の代表的実施例の半導体製造方法の原理
図FIG. 1 is a principle diagram of a semiconductor manufacturing method according to a typical embodiment of the present invention.
【図２】本発明の代表的実施例の半導体製造装置の平面
図FIG. 2 is a plan view of a semiconductor manufacturing apparatus according to a typical embodiment of the present invention.
【図３】同じく一部を断面で示した正面図FIG. 3 is a front view showing a part of the same in section.
【図４】流体導入路の断面図FIG. 4 is a sectional view of a fluid introduction path.
【図５】上部電極の一例の斜視図FIG. 5 is a perspective view of an example of an upper electrode.
【図６】上部電極を絶縁性の流体で包囲する手段を示す
断面図FIG. 6 is a sectional view showing a means for surrounding the upper electrode with an insulating fluid.
【図７】同じく包囲手段の平面図FIG. 7 is a plan view of the surrounding means.
【図８】流量調整弁の一例を示す一部断面図FIG. 8 is a partial sectional view showing an example of a flow rate adjusting valve.
【図９】本発明の代表的実施例の半導体製造装置を用い
た場合の半導体ウェハーへの処理液の供給状態を示す説
明図FIG. 9 is an explanatory diagram showing a supply state of a processing liquid to a semiconductor wafer when a semiconductor manufacturing apparatus according to a typical embodiment of the present invention is used.
【図10】従来の半導体製造装置を用いた場合の半導体ウ
ェハーへの処理液の供給状態を示す説明図FIG. 10 is an explanatory diagram showing a supply state of a processing liquid to a semiconductor wafer when a conventional semiconductor manufacturing apparatus is used.
Ａ 半導体製造装置 Ｗ 半導体ウェハー １ 処理槽 ２ 下部電極 ３ 上部電極 ４ 包囲手段 ５ 制御手段 ６ ブッシング ７ 偏平部 ８ 流体流出路 ９ 給電導体 10 給電導体 11 流体導入路 12 縦孔 13 横孔 14 Ｏリング 15 位置決めピン 16 処理液 17 供給口 18 取合管 19 流量調整弁 20 テフロンチューブ 21 導入管 22 弁本体 23 シリコンチューブ 24 容器 25 ポンプ 26 フィルター 27 流体導入口 28 窒素ガス A Semiconductor Manufacturing Equipment W Semiconductor Wafer 1 Processing Tank 2 Lower Electrode 3 Upper Electrode 4 Enclosing Means 5 Control Means 6 Bushing 7 Flats 8 Fluid Outflow Paths 9 Power Feeding Conductors 10 Power Feeding Conductors 11 Fluid Introducing Paths 12 Vertical Holes 13 Horizontal Holes 14 O-rings 15 Positioning pin 16 Treatment liquid 17 Supply port 18 Coupling pipe 19 Flow rate control valve 20 Teflon tube 21 Inlet pipe 22 Valve body 23 Silicon tube 24 Container 25 Pump 26 Filter 27 Fluid inlet port 28 Nitrogen gas
Claims (6)
ェハーをその被処理面を下にして保持し、処理槽内の複
数箇所より処理液を供給することにより処理槽の上方か
らオーバーフローさせながら、処理槽内に配設された下
部電極と上部電極間に電流を流して半導体ウェハーにメ
ッキ、化成等の処理を施す半導体製造方法。1. A semiconductor wafer is held with a surface to be processed facing down above an open processing tank, and processing liquid is supplied from a plurality of locations in the processing tank while overflowing from above the processing tank. A method for manufacturing a semiconductor, in which an electric current is applied between a lower electrode and an upper electrode arranged in a processing tank to perform a process such as plating and chemical conversion on a semiconductor wafer.
供給時間を調整しうる制御手段を設けてなる請求項１記
載の半導体製造方法。2. The semiconductor manufacturing method according to claim 1, further comprising control means for adjusting the flow rate and the supply time of the processing liquid supplied from a plurality of locations.
設け、制御手段としてそれぞれの供給口への供給の途中
に流量調整弁を設けることにより流量を調整可能とする
とともにそれぞれの供給口より間欠的に処理液を供給す
る請求項２記載の半導体製造方法。3. A plurality of supply ports are provided at equal intervals on the bottom surface of the processing tank, and a flow rate adjusting valve is provided as a control means in the middle of supply to each supply port, thereby making it possible to adjust the flow rate and each supply. The semiconductor manufacturing method according to claim 2, wherein the processing liquid is intermittently supplied from the mouth.
ェハーをその被処理面を下にして保持し、半導体ウェハ
ーの被処理面に処理液を噴流させながら上下電極間に電
流を流して半導体ウェハーにメッキ、化成等の処理を施
す半導体製造装置において、処理槽内の複数箇所に処理
液を供給する供給口を設けたことを特徴とする半導体製
造装置。4. A semiconductor wafer is held with a surface to be processed facing down above a processing tank having an open upper side, and a current is passed between upper and lower electrodes while jetting a processing liquid onto the surface to be processed of the semiconductor wafer. A semiconductor manufacturing apparatus for performing processing such as plating and chemical conversion on a wafer, characterized in that supply ports for supplying a processing liquid are provided at a plurality of locations in a processing tank.
供給時間を調整しうる制御手段を設けてなる請求項４記
載の半導体製造装置。5. The semiconductor manufacturing apparatus according to claim 4, further comprising control means for adjusting the flow rate and the supply time of the processing liquid supplied from a plurality of locations.
設け、制御手段としてそれぞれの供給口への供給の途中
に流量調整弁を設けることにより流量を調整可能とする
とともにそれぞれの供給口より間欠的に処理液を供給す
る請求項５記載の半導体製造装置。6. A plurality of supply ports are provided at equal intervals on the bottom surface of the processing tank, and a flow rate adjusting valve is provided as a control means in the middle of supply to each supply port so that the flow rate can be adjusted and each supply can be performed. The semiconductor manufacturing apparatus according to claim 5, wherein the processing liquid is intermittently supplied from the mouth.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03133502A JP3112700B2 (en) | 1991-05-08 | 1991-05-08 | Semiconductor manufacturing method and apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03133502A JP3112700B2 (en) | 1991-05-08 | 1991-05-08 | Semiconductor manufacturing method and apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0673598A true JPH0673598A (en) | 1994-03-15 |
| JP3112700B2 JP3112700B2 (en) | 2000-11-27 |
Family
ID=15106271
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03133502A Expired - Lifetime JP3112700B2 (en) | 1991-05-08 | 1991-05-08 | Semiconductor manufacturing method and apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3112700B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11219920A (en) * | 1998-01-30 | 1999-08-10 | Ebara Corp | Plating device |
| DE19859466A1 (en) * | 1998-12-22 | 2000-07-06 | Steag Micro Tech Gmbh | Device and method for treating substrates |
| JP2002503766A (en) * | 1998-02-12 | 2002-02-05 | エーシーエム リサーチ，インコーポレイティド | Plating equipment and method |
| JP2007335473A (en) * | 2006-06-12 | 2007-12-27 | Nissan Motor Co Ltd | Method of bonding semiconductor element and semiconductor device |
| JP2022118256A (en) * | 2021-01-08 | 2022-08-12 | 株式会社荏原製作所 | Substrate holder, plating device, plating method, and memory medium |
-
1991
- 1991-05-08 JP JP03133502A patent/JP3112700B2/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11219920A (en) * | 1998-01-30 | 1999-08-10 | Ebara Corp | Plating device |
| JP2002503766A (en) * | 1998-02-12 | 2002-02-05 | エーシーエム リサーチ，インコーポレイティド | Plating equipment and method |
| DE19859466A1 (en) * | 1998-12-22 | 2000-07-06 | Steag Micro Tech Gmbh | Device and method for treating substrates |
| DE19859466C2 (en) * | 1998-12-22 | 2002-04-25 | Steag Micro Tech Gmbh | Device and method for treating substrates |
| US6805754B1 (en) | 1998-12-22 | 2004-10-19 | Steag Micro Tech Gmbh | Device and method for processing substrates |
| JP2007335473A (en) * | 2006-06-12 | 2007-12-27 | Nissan Motor Co Ltd | Method of bonding semiconductor element and semiconductor device |
| JP2022118256A (en) * | 2021-01-08 | 2022-08-12 | 株式会社荏原製作所 | Substrate holder, plating device, plating method, and memory medium |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3112700B2 (en) | 2000-11-27 |
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