JPH0666304B2 - Wafer-surface flattening method - Google Patents
Wafer-surface flattening methodInfo
- Publication number
- JPH0666304B2 JPH0666304B2 JP27114086A JP27114086A JPH0666304B2 JP H0666304 B2 JPH0666304 B2 JP H0666304B2 JP 27114086 A JP27114086 A JP 27114086A JP 27114086 A JP27114086 A JP 27114086A JP H0666304 B2 JPH0666304 B2 JP H0666304B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- photoresist film
- photoresist
- convex portion
- polysilicon film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造工程において、ウェハーの
表面を平坦化する方法に関する。The present invention relates to a method for flattening the surface of a wafer in a semiconductor device manufacturing process.
半導体装置の製造方法において、素子表面に１μｍ程度
の微細パターンを形成するにもかわらず、素子の深さ方
向の断面構造は微細パターン形成に充分な構造になって
いない為、微細パターン形成が困難な状況となり、ウェ
ハー表面の凹凸を減らし平坦化することが重要な問題と
なっている。In the method of manufacturing a semiconductor device, although the fine pattern of about 1 μm is formed on the surface of the element, the cross-sectional structure of the element in the depth direction is not a structure sufficient for forming the fine pattern, which makes it difficult to form the fine pattern. Therefore, it is an important problem to reduce the unevenness of the wafer surface and flatten it.
従来のウェハー表面の平坦化方法を第２図（ａ）〜
（ｃ）に示す。第２図（ａ）に示すように基板１上にシ
リコン酸化膜２を形成し、パターニングした後、不純物
（例えばひ素又はボロン等）をドープしたポリシリコン
膜３を形成し、パターニングする。次にフォトレジスト
膜５を塗布した後ベークしてフォトレジストを重合させ
る。次に、第２図（ｂ）および（ｃ）に示すようにフレ
オンガス及び酸素ガスのプラズマ装置を用いてフォトレ
ジスト膜５及びポリシリコン膜３をエッチング及び除去
してポリシリコン膜３の段差を減少させ、シリコン基板
１の表面の平坦化を行なう。A conventional wafer surface flattening method is shown in FIG.
It shows in (c). As shown in FIG. 2A, a silicon oxide film 2 is formed on a substrate 1 and patterned, and then a polysilicon film 3 doped with an impurity (for example, arsenic or boron) is formed and patterned. Next, the photoresist film 5 is applied and then baked to polymerize the photoresist. Next, as shown in FIGS. 2B and 2C, the photoresist film 5 and the polysilicon film 3 are etched and removed by using a plasma device of freon gas and oxygen gas to reduce the step of the polysilicon film 3. Then, the surface of the silicon substrate 1 is flattened.
上述した従来のウェハー表面の平坦化方法では、処理後
にポリシリコン膜３が塗布時のフォトレジスト膜５の表
面と同じ形状で残る為、ポリシリコン膜３は中央が凹状
になり、平坦性が悪く、平坦化処理後の膜厚の均一性が
悪い為、ポリシリコン膜３の強度が一定でなく、また平
坦性がポリシリ膜３上で悪い為、ポリシリ膜３の表面の
微細パターニングの形成加工性が悪いと言う欠点があ
る。In the above-described conventional wafer surface flattening method, since the polysilicon film 3 remains in the same shape as the surface of the photoresist film 5 at the time of coating after the treatment, the polysilicon film 3 has a concave shape at the center, resulting in poor flatness. Since the uniformity of the film thickness after the flattening process is poor, the strength of the polysilicon film 3 is not constant, and the flatness is poor on the polysilicon film 3, so that the workability of fine patterning of the surface of the polysilicon film 3 is improved. It has the drawback of being bad.
本発明のウェハー表面の平坦化方法は、表面に凸部を有
するポリシリコン膜が形成されたウェハー表面に前記凸
部を覆う膜厚で光分解型のフォトレジスト膜を塗布する
工程と、そのフォトレジスト膜に前記凸部の表面までが
分解される光量の紫外線を照射する工程と、この工程後
に前記フォトレジスト膜を前記凸部の表面が露出するま
で現像液で除去し前記フォトレジスト膜の表面を平坦化
する工程と、前記ポリシリコン膜と前記フォトレジスト
膜のエッチング速度を一定にする為に前記フォトレジス
ト膜をベークする工程と、ドライエッチングにより前記
ポリシリコン膜及び前記フォトレジスト膜をエッチング
する工程とを含んで構成される。The wafer surface flattening method of the present invention comprises a step of applying a photodecomposable photoresist film to a wafer surface on which a polysilicon film having convex portions is formed, with a film thickness that covers the convex portions, and The step of irradiating the resist film with an amount of ultraviolet rays that decomposes up to the surface of the convex portion, and after this step, the photoresist film is removed with a developing solution until the surface of the convex portion is exposed, and the surface of the photoresist film And a step of baking the photoresist film to keep the etching rate of the polysilicon film and the photoresist film constant, and etching the polysilicon film and the photoresist film by dry etching And a process.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図（ａ）〜（ｄ）は本発明の一実施例を工程順に示
すウェハーの部分縦断面図である。第１図（ａ）におい
てシリコン基板１上にシリコン酸化膜２を形成し、フォ
トリソグラフィ技術を用いて所望のパターンを形成す
る。第１図（ｂ）において不純物（例えばひ素又はボロ
ン等）をドープしたポリシリコン膜３を約3000Å膜厚で
形成し、フォトリソグラフィ技術を用いてパターニング
し、シリコン酸化膜２上に突出したポリシリコン膜３を
形成する。このポリシリコン膜３はシリコン酸化膜２の
開口部に対応する中央に凹部が形成され、この凹部の周
囲のシリコン酸化膜２に重なる部分が凸部となってい
る。次に熱処理を行ない不純物を含んだポリシリ内の不
純物をシリコン基板１中に拡散し、拡散層４を形成す
る。1 (a) to 1 (d) are partial vertical cross-sectional views of a wafer showing an embodiment of the present invention in the order of steps. In FIG. 1A, a silicon oxide film 2 is formed on a silicon substrate 1 and a desired pattern is formed by using a photolithography technique. In FIG. 1 (b), a polysilicon film 3 doped with impurities (eg, arsenic or boron) is formed to a thickness of about 3000 Å and patterned by photolithography to form a polysilicon film protruding on the silicon oxide film 2. The film 3 is formed. A recess is formed in the center of the polysilicon film 3 corresponding to the opening of the silicon oxide film 2, and a portion around the recess which overlaps the silicon oxide film 2 is a protrusion. Next, heat treatment is performed to diffuse the impurities in the polysilicon containing the impurities into the silicon substrate 1 to form the diffusion layer 4.
第１図（ｃ）において、パターン形成された不純物をド
ープしたポリシリコン膜３を充分に覆う様なフォトレジ
スト膜５を5000Å〜6000Åの膜厚で塗布する。この時、
フォトレジスト膜５の表面は下地シリコン酸化膜２及び
ポリシリコン膜３の重なり部分である凸部の上部におい
てなだらかに盛り上がる様な形状を示す。一例を挙げれ
ば、フォトレジスト膜５の膜厚がシリコン酸化膜２上で
5000Åの時、シリコン酸化膜２及びポリシリコン膜３の
重なり部分である凸部の上部で2000Å、ポリシリコン膜
３の凹部の上で4000Åとなる。フォトレジスト膜５は第
１図（ｃ）に示すように紫外線６を照射されると、紫外
線６を透過するとともに一部を徐々に減衰し、下地層表
面７で反射する為、膜厚が薄く透過性の良いフォトレジ
スト膜はエネルギーを多く与えられる。従って、フォト
レジスト膜５に光分解型フォトレジスト（ポジレジス
ト）を用いれば膜厚の薄い部分でより多くの分解（第１
図（ｄ）のフォトレジスト膜５中に分解を点８で概念的
に示す）が起こり、膜厚が厚い部分になる程分解は少な
い。フォトレジスト５に照射する紫外線６の光量はフォ
トレジスト５のポリシリコン膜３の凸部の表面までが分
解される程度のものとする。In FIG. 1 (c), a photoresist film 5 is applied to a thickness of 5000Å to 6000Å so as to sufficiently cover the patterned impurity-doped polysilicon film 3. At this time,
The surface of the photoresist film 5 has a shape such that it gently swells above the convex portion, which is the overlapping portion of the underlying silicon oxide film 2 and the polysilicon film 3. As an example, the thickness of the photoresist film 5 on the silicon oxide film 2 is
When it is 5000 Å, it becomes 2000 Å above the convex portion which is the overlapping portion of the silicon oxide film 2 and the polysilicon film 3, and 4000 Å above the concave portion of the polysilicon film 3. When the photoresist film 5 is irradiated with ultraviolet rays 6 as shown in FIG. 1 (c), the ultraviolet rays 6 are transmitted and at the same time, a part of the photoresist film 5 is gradually attenuated and reflected on the surface 7 of the underlying layer, so that the film thickness is thin. A photoresist film having good transparency is given a lot of energy. Therefore, if a photo-decomposable photoresist (positive resist) is used for the photoresist film 5, more decomposition (first
Decomposition occurs conceptually in the photoresist film 5 in FIG. 5D at point 8), and the decomposition is less as the film thickness increases. The amount of ultraviolet rays 6 with which the photoresist 5 is irradiated is such that the surface of the convex portion of the polysilicon film 3 of the photoresist 5 is decomposed.
次に、２％前後のテトラメチルアンモニウムハイドロオ
キサイド等を主成分とする水溶液である現像液につけ、
ポリシリコン膜３の凸部の表面が露出するまでフォトレ
ジスト膜５を現象すると第１図（ｅ）に示す様な平坦な
レジスト膜表面が形成される。次にポリシリコン膜３と
フォトレジスト膜５がほぼ同一のエッチング速度となる
ように、フォトレジスト膜５を約200℃でベーキングす
る。次にフレオンガス及び酸素ガスの混合ガスをプラズ
マ化し、ポリシリコン膜３及びフォトレジスト膜５をエ
ッチングし、シリコン酸化膜２上のポリシリコン膜３が
1000Å程度残る様にすると、第１図（ｆ）の様なポリシ
リコン膜３の平坦化を行なうことができる。Next, it is immersed in a developing solution which is an aqueous solution containing about 2% of tetramethylammonium hydroxide as a main component,
When the photoresist film 5 is developed until the surface of the convex portion of the polysilicon film 3 is exposed, a flat resist film surface as shown in FIG. 1 (e) is formed. Next, the photoresist film 5 is baked at about 200 ° C. so that the polysilicon film 3 and the photoresist film 5 have substantially the same etching rate. Next, the mixed gas of freon gas and oxygen gas is turned into plasma, the polysilicon film 3 and the photoresist film 5 are etched, and the polysilicon film 3 on the silicon oxide film 2 is removed.
By leaving about 1000 Å, the polysilicon film 3 can be flattened as shown in FIG. 1 (f).
次に第１図（ｇ）に示すように、フォトレジスト膜５を
酸素プラズマ中で処理するとフォトレジスト膜５は除去
される。Next, as shown in FIG. 1G, the photoresist film 5 is removed by treating the photoresist film 5 in oxygen plasma.
以上説明したように、本発明は、下記凸部上のフォトレ
ジスト膜に軽く紫外線を当て、軽く現象することにより
フォトレジスト膜の表面を平坦化し、次いで均一になっ
たフォトレジストおよび凸部の表面をドライエッチング
することにより、凸部を、中央部のみ特にくぼまない様
平坦化することができる効果がある。また後の工程でウ
ェハー表面にパターン形成を行なう時により均一な寸法
の微細パターンを形成できる効果がある。As described above, according to the present invention, the surface of the photoresist film is flattened by lightly irradiating the photoresist film on the convex portion below with ultraviolet rays, and then the photoresist film on the convex portion and the surface of the convex portion are made uniform. Dry-etching has an effect that the convex portion can be flattened so that only the central portion is not depressed. Further, there is an effect that a fine pattern having a more uniform size can be formed when a pattern is formed on the surface of the wafer in a later step.
第１図（ａ）〜（ｇ）は本発明の一実施例を工程順に示
す模式的な縦断面図，第２図（ａ）〜（ｃ）は従来のウ
ェハー表面の平坦化法を工程順に示す模式的な縦断面図
である。 １……シリコン基板、２……シリコン酸化膜、３……不
純物をドープしたポリシリコン膜、４……拡散層、５…
…フォトレジスト膜、６……紫外線、７……下地層表
面、８……フォトレジストの分解。1 (a) to 1 (g) are schematic vertical cross-sectional views showing an embodiment of the present invention in the order of steps, and FIGS. 2 (a) to 2 (c) are related to a conventional wafer surface flattening method in the order of steps. It is a typical longitudinal cross section shown. 1 ... Silicon substrate, 2 ... Silicon oxide film, 3 ... Impurity-doped polysilicon film, 4 ... Diffusion layer, 5 ...
… Photoresist film, 6 …… UV light, 7 …… Underlayer surface, 8 …… Disassembly of photoresist.
Claims (1)
されたウェハー表面に前記凸部を覆う膜厚で光分解型の
フォトレジスト膜を塗布する工程と、そのフォトレジス
ト膜に前記凸部の表面までが分解される光量の紫外線を
照射する工程と、この工程後に前記フォトレジスト膜を
前記凸部の表面が露出するまで現象液で除去し前記フォ
トレジスト膜の表面を平坦化する工程と、前記ポリシリ
コン膜と前記フォトレジスト膜のエッチング速度を一定
にする為に前記フォトレジスト膜をベークする工程と、
ドライエッチングにより前記ポリシリコン膜及び前記フ
ォトレジスト膜をエッチングする工程とを含むことを特
徴とするウェハー表面の平坦化方法。1. A step of applying a photodegradable photoresist film to a surface of a wafer on which a polysilicon film having a convex portion is formed so as to cover the convex portion, and the convex portion on the photoresist film. A step of irradiating the surface with a light amount of ultraviolet rays that is decomposed, and a step of flattening the surface of the photoresist film by removing the photoresist film with a phenomenon liquid until the surface of the convex portion is exposed after this step; A step of baking the photoresist film to keep the etching rate of the polysilicon film and the photoresist film constant,
And a step of etching the polysilicon film and the photoresist film by dry etching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27114086A JPH0666304B2 (en) | 1986-11-14 | 1986-11-14 | Wafer-surface flattening method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27114086A JPH0666304B2 (en) | 1986-11-14 | 1986-11-14 | Wafer-surface flattening method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63124525A JPS63124525A (en) | 1988-05-28 |
| JPH0666304B2 true JPH0666304B2 (en) | 1994-08-24 |
Family
ID=17495876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27114086A Expired - Lifetime JPH0666304B2 (en) | 1986-11-14 | 1986-11-14 | Wafer-surface flattening method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0666304B2 (en) |
-
1986
- 1986-11-14 JP JP27114086A patent/JPH0666304B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63124525A (en) | 1988-05-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0599539B1 (en) | Method for forming a pattern by silylation | |
| US5922516A (en) | Bi-layer silylation process | |
| US4774164A (en) | Chrome mask etch | |
| JPH07219237A (en) | Formation method of minute resist pattern | |
| JPH0729846A (en) | Formation of electrode in semiconductor device | |
| JPH0666304B2 (en) | Wafer-surface flattening method | |
| JPH04348030A (en) | Inclined etching method | |
| KR950004910B1 (en) | Photoetching method using multilayerresist | |
| JPS61113062A (en) | Photomask | |
| KR960000180B1 (en) | Resist pattern forming method by silylation response | |
| JPH0531819B2 (en) | ||
| JP2712407B2 (en) | Method of forming fine pattern using two-layer photoresist | |
| JPH02181910A (en) | Formation of resist pattern | |
| JPS63258020A (en) | Formation of element isolation pattern | |
| JPS5984529A (en) | Forming method of pattern | |
| JPH0697024A (en) | Formation of resist pattern | |
| JPS6054439A (en) | Flattening method for surface | |
| KR930006133B1 (en) | M.o.s. contact hole forming method | |
| JPS6327848B2 (en) | ||
| JPH09106938A (en) | Manufacture of semiconductor device | |
| JPS61184828A (en) | Manufacture of semiconductor device | |
| JPS6154629A (en) | Forming process of photoresist pattern | |
| JPS62234333A (en) | Formation of mask for processing fine groove | |
| JPS6354726A (en) | Method of etching resist film | |
| JPH04364726A (en) | Pattern formation |