JPH065780B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JPH065780B2
JPH065780B2 JP59216329A JP21632984A JPH065780B2 JP H065780 B2 JPH065780 B2 JP H065780B2 JP 59216329 A JP59216329 A JP 59216329A JP 21632984 A JP21632984 A JP 21632984A JP H065780 B2 JPH065780 B2 JP H065780B2
Authority
JP
Japan
Prior art keywords
layer
junction
laser
semiconductor device
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59216329A
Other languages
Japanese (ja)
Other versions
JPS6196773A (en
Inventor
直 松原
忠 斉藤
寿一 嶋田
信一 村松
晴夫 伊藤
信夫 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP59216329A priority Critical patent/JPH065780B2/en
Publication of JPS6196773A publication Critical patent/JPS6196773A/en
Publication of JPH065780B2 publication Critical patent/JPH065780B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、半導体装置の製造方法に関し、詳しくは、オ
ーミック性が良いp層とn層から成る接合層(以下本明
細書においては、pn接合又はnp接合という)を有す
る半導体部を含有する半導体装置の製造方法に関する。
Description: FIELD OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to a bonding layer composed of a p-layer and an n-layer having good ohmic properties (hereinafter, a pn-junction in the present specification). Alternatively, the present invention relates to a method for manufacturing a semiconductor device including a semiconductor portion having an np junction).

〔発明の背景〕[Background of the Invention]

オーミック性が良いpn接合又はnp接合が要求されるもの
の例として、いわゆるタンデム型のアモルファスシリコ
ン太陽電池がある(特開昭55−125680および同58−1167
79参照)。この太陽電池の構造は、通常、ガラス基板/
透明電極/pin/pin/……/金属電極から構成され、pi
nの光電変換素子が二段以上に積層され電気的に直列接
続となっている。このため、p及びn層の低抵抗化とと
もに、pn接合部のオーミック性の向上が重要である。従
来用いられているp層の抵抗率は約103Ω・cm、n層の抵
抗率は10〜1Ω・cmと高く、直列抵抗やオーミック性不良
の為、太陽電池の出力特性の性能に問題があった。
A so-called tandem type amorphous silicon solar cell is an example of the one requiring a pn junction or an np junction having good ohmic properties (Japanese Patent Laid-Open Nos. 55-125680 and 58-1167).
79). The structure of this solar cell is usually glass substrate /
It is composed of transparent electrodes / pin / pin /.../ metal electrodes, and pi
The photoelectric conversion elements of n are stacked in two or more stages and electrically connected in series. Therefore, it is important to reduce the resistance of the p and n layers and improve the ohmic property of the pn junction. Conventional p-layer has a high resistivity of about 10 3 Ω · cm and n-layer has a high resistivity of 10 to 1 Ω · cm. Due to poor series resistance and ohmic resistance, there is a problem with the output characteristics of solar cells. was there.

〔発明の目的〕[Object of the Invention]

本発明の目的は、かかる従来の問題点を解決し、pn接合
層の低抵抗化とpn接合部のオーミック性向上を達成でき
る半導体装置の製造方法を提供することにある。
It is an object of the present invention to provide a method for manufacturing a semiconductor device which solves the above-mentioned conventional problems and can achieve a low resistance of a pn junction layer and an improvement in ohmic property of a pn junction.

〔発明の概要〕[Outline of Invention]

従来、半導体膜の低抵抗化を実現し、かつpn接合部のオ
ーミック性を向上させる方法として熱処理法がある。し
かし、アモルファス膜の場合、通常の電気炉を用いる長
時間熱処理では、活性層であるノンドープ層が変質し、
太陽電池性能が劣化してしまう。この点を解決するた
め、本発明では、熱処理時間が1秒以下のレーザを用い
た短時間熱処理法を用いる。レーザとして、パルスレー
ザとCWレーザがあり、CWの場合、走査速度を早くす
れば実質的に短時間の熱処理が可能である。
Conventionally, there is a heat treatment method as a method for realizing a low resistance of a semiconductor film and improving the ohmic property of a pn junction. However, in the case of an amorphous film, the long-time heat treatment using an ordinary electric furnace changes the quality of the non-doped layer that is the active layer,
The solar cell performance deteriorates. In order to solve this point, in the present invention, a short-time heat treatment method using a laser having a heat treatment time of 1 second or less is used. There are pulse lasers and CW lasers as lasers. In the case of CW, heat treatment can be performed in a substantially short time if the scanning speed is increased.

かかるレーザの例として次のものがある。パルスレーザ
として、エキシマレーザ(波長157〜351nm)、ルビーレ
ーザ(694nm)、ネオジウム YAG(266、532、1064n
m)、ガラスレーザ(531nm)やアレキサンドライトレーザ
(700〜818nm)などがある。CWレーザとして、Arイオン
レーザ(257nm)やHeNeレーザ(633nm)などがある。今迄、
アモルファスシリコンのレーザアニールとしてQスイッ
チのNd:YAGレーザ(1064nm)が用いられた例は知られ
ていたが、このような長波長光では、アモルファスシリ
コン膜の吸収係数が小さく、膜全体に光が吸収されるた
め、極めて薄いp、n膜のみを処理することは出来なか
った。従って、良好な太陽電池性能は得られていない。
Examples of such lasers are: Excimer laser (wavelength 157-351nm), ruby laser (694nm), neodymium YAG (266, 532, 1064n)
m), glass laser (531 nm) and alexandrite laser
(700-818nm) etc. CW lasers include Ar ion lasers (257 nm) and HeNe lasers (633 nm). Until now,
It was known that a Q-switched Nd: YAG laser (1064 nm) was used for laser annealing of amorphous silicon. However, with such long-wavelength light, the absorption coefficient of the amorphous silicon film is small, and light is spread over the entire film. Since it is absorbed, it was not possible to process only the extremely thin p and n films. Therefore, good solar cell performance has not been obtained.

アモルファスシリコン太陽電池において、レーザアニー
ルするpn接合部を含めたp層とn層の全膜厚は20〜40nm
である。このため、上記各種レーザ光の中で、波長400n
m以下のレーザ光を用いれば吸収係数106cm-1となり光の
吸収深さは約10nmで、縦方向の上部半導体層のみ熱処理
できるなどの利点を有する。これに適したレーザとし
て、エキシマレーザ(波長二重型で266nm)がある。特
に、エキシマレーザは励起ガスの種類を変えて、発振波
長を変えることが可能である。例えば、F(157nm)、A
F(193nm)、KrCl(222nm)、KrF(248nm)、XeBr(282nm)、Xe
Cl(308nm)とXeF(351nm)で出力も数十W迄の大出力で大
口径のレーザが得られる。
In amorphous silicon solar cells, the total film thickness of the p and n layers including the pn junction that is laser annealed is 20-40 nm.
Is. Therefore, the wavelength of 400n
When a laser beam of m or less is used, the absorption coefficient is 10 6 cm -1 , and the light absorption depth is about 10 nm, which is advantageous in that only the vertical upper semiconductor layer can be heat-treated. A suitable laser for this is an excimer laser (266 nm wavelength double type). In particular, the excimer laser can change the oscillation wavelength by changing the kind of excitation gas. For example, F 2 (157nm), A
F (193nm), KrCl (222nm), KrF (248nm), XeBr (282nm), Xe
With Cl (308 nm) and XeF (351 nm), a large output laser with a large output up to several tens of W can be obtained.

本発明は、かかる波長が400nm以下の短波長のレーザを
用い、pn接合部分のみを熱処理することにより、pn接合
の電気抵抗を下げ、オーミックな特性を与えることを特
徴としている。半導体膜として、B又はAlなどのp形不
純物、P又はAsなどのn形不純物を含有するアモルファ
スSi:H膜、微結晶化Si:H膜、SiGe:H膜、SiN:H
膜やSiC:H膜などがある。不純物を該Si膜中に含有さ
せる工程として、プラズマCVDなどの膜形成中にガス
から導入する方法とノンドープ又は低濃度ドープ層中に
イオン打込み法で導入する方法などがある。
The present invention is characterized in that the laser having a short wavelength of 400 nm or less is used and only the pn junction portion is heat-treated to lower the electrical resistance of the pn junction and provide ohmic characteristics. As a semiconductor film, an amorphous Si: H film containing p-type impurities such as B or Al and an n-type impurity such as P or As, microcrystallized Si: H film, SiGe: H film, SiN: H
There are films and SiC: H films. As a step of incorporating impurities into the Si film, there are a method of introducing from a gas during film formation such as plasma CVD and a method of introducing into a non-doped or low-concentration doped layer by an ion implantation method.

〔発明の実施例〕Example of Invention

以下、本発明の実施例を説明する。 Examples of the present invention will be described below.

実施例1 第1図に示したように、ガラス板1に透明電極2が形成
されたものを基板として用い、該基板上にグロー放電を
用いるプラズマCVD法によりn形層3、n形層4を形
成した。第1図に(b)は、その後、波長350nmのエキシマ
レーザでpn接合を含むp層とn層の二層を同時に照射
し、p層7とn層6の低抵抗化とpn接合のオーミック性
の向上を図った。最後に、第1図(a)及び第1図(b)の両
方にAl電極5を蒸着した。第2図は、第1図のレーザ照
射が無(第1図(a))及び有(第1図(b))の時のpn形ダ
イオードの直列抵抗及びオーミック性を調べた電流−電
圧特性である。第2図(2)の曲線は、レーザ照射が無い
時の曲線で、第2図(b)の曲線は、レーザ照射が有る時
の曲線である。レーザ照射した結果、オーミック性が向
上した。これにより、pn形ダイオードの直列抵抗が低下
し、pn接合部のオーミック性が改善された。
Example 1 As shown in FIG. 1, a glass plate 1 having a transparent electrode 2 formed thereon was used as a substrate, and an n-type layer 3 and an n-type layer 4 were formed on the substrate by a plasma CVD method using glow discharge. Was formed. In Fig. 1 (b), after that, two layers of the p layer and the n layer including the pn junction are simultaneously irradiated with an excimer laser having a wavelength of 350 nm to reduce the resistance of the p layer 7 and the n layer 6 and ohmic contact of the pn junction. We aimed to improve the sex. Finally, the Al electrode 5 was vapor-deposited on both FIG. 1 (a) and FIG. 1 (b). FIG. 2 is a current-voltage characteristic obtained by examining the series resistance and ohmic characteristics of the pn-type diode when the laser irradiation of FIG. 1 is absent (FIG. 1 (a)) and with laser irradiation (FIG. 1 (b)). Is. The curve in FIG. 2 (2) is a curve without laser irradiation, and the curve in FIG. 2 (b) is a curve with laser irradiation. As a result of laser irradiation, ohmic characteristics were improved. This reduced the series resistance of the pn diode and improved the ohmic properties of the pn junction.

実施例2 タンデム型のアモルファスシリコン太陽電池の製造方法
を示す。第3図(c)は、ガラス板11に透明電極12が
形成されたものを基板として用い、該基板上にプラズマ
CVD法によりp形層13、i形層14、n形層15、
p形層16、i形層17、そしてn形層18を順次積層
し、最後にAl電極19を蒸着し、光電変換素子pin層が
二段になったタンデム型太陽電池である。第3図(d)
は、第3図(c)のn層15及びp層16のpn接合部を含
有するpn層の二層をエキシマレーザで照射し、その後、
i層17、n層18を順次積層し、最後にAl電極19を
蒸着したタンデム型太陽電池である。第4図は、第3図
(c)及び第3図(d)のタンデム型太陽電池の電流−電圧特
性を示した。第4図(c)は、pn接合部をレーザアニール
していない太陽電池曲線で、第4図(d)はレーザアニー
ルをした太陽電池曲線である。レーザアニールした(d)
の曲線が、太陽電池のシリーズ抵抗が減少し、かつオー
ミック性が改善された。このため、太陽電池の曲線因子
が0.45から0.57と大幅に改善し、光電変換効率も5.6%
から6.8%と向上した。
Example 2 A method for manufacturing a tandem type amorphous silicon solar cell will be described. FIG. 3 (c) shows that a glass plate 11 having a transparent electrode 12 formed thereon is used as a substrate, and a p-type layer 13, an i-type layer 14, an n-type layer 15,
This is a tandem solar cell in which a p-type layer 16, an i-type layer 17, and an n-type layer 18 are sequentially laminated, and finally an Al electrode 19 is vapor-deposited to form a photoelectric conversion element pin layer in two stages. Figure 3 (d)
Irradiates the two layers of the pn layer containing the pn junction part of the n layer 15 and the p layer 16 of FIG. 3 (c) with an excimer laser, and then,
This is a tandem solar cell in which an i layer 17 and an n layer 18 are sequentially laminated, and finally an Al electrode 19 is vapor-deposited. Figure 4 is Figure 3
The current-voltage characteristics of the tandem solar cell of (c) and FIG. 3 (d) are shown. FIG. 4 (c) is a solar cell curve in which the pn junction is not laser annealed, and FIG. 4 (d) is a solar cell curve in which laser annealing is performed. Laser annealed (d)
The curve shows that the series resistance of the solar cell is reduced and the ohmic property is improved. Therefore, the fill factor of the solar cell is greatly improved from 0.45 to 0.57, and the photoelectric conversion efficiency is 5.6%.
From 6.8%.

〔発明の効果〕〔The invention's effect〕

本発明によれば、pn接合(又はnp接合)を有するp層及
びn層の二層をレーザアニール処理で、同時に低抵抗な
p層及びn層を作製でき、かつpn接合(又はnp接合)部
のオーミック性を改善できる。そして極めて薄い上層部
半導体層のみを処理できるため、活性層であるノンドー
プ層が変質することがない。
According to the present invention, a p-layer and an n-layer having a pn junction (or an np junction) can be simultaneously laser-annealed to form a low-resistance p-layer and an n-layer, and a pn junction (or an np junction) can be formed. The ohmic property of the part can be improved. Since only the extremely thin upper semiconductor layer can be processed, the non-doped layer which is the active layer is not deteriorated.

【図面の簡単な説明】[Brief description of drawings]

第1図及び第3図は本発明の異なる実施例を示す工程図
であり、第2図及び第4図は本発明の効果を説明するた
めの図である。 1,11…ガラス板、2,12…透明電極、3,6…n
形層、4,7…p形層、5,19…Al電極、13,16
…p形層、14,17…i形層、15,18…n形層。
1 and 3 are process drawings showing different embodiments of the present invention, and FIGS. 2 and 4 are views for explaining the effect of the present invention. 1, 11 ... Glass plate, 2, 12 ... Transparent electrode, 3, 6 ... n
Shape layer, 4, 7 ... P-type layer, 5, 19 ... Al electrode, 13, 16
... p-type layer, 14, 17 ... i-type layer, 15, 18 ... n-type layer.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 伊藤 晴夫 東京都国分寺市東恋ヶ窪1丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 中村 信夫 東京都国分寺市東恋ヶ窪1丁目280番地 株式会社日立製作所中央研究所内 審査官 真鍋 潔 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Haruo Ito 1-280 Higashi Koigakubo, Kokubunji City, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Nobuo Nakamura 1-280 Higashi Koigakubo, Kokubunji, Tokyo Hitachi Ltd. Central Research Institute Examiner Kiyoshi Manabe

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】シリコンを主体とする非単結晶相で構成さ
れたpin構造の光電変換素子が2段以上積層され電気
的に直列接続している半導体装置の製造方法において、
上記光電変換素子の一素子の上に該一素子の最上層とは
逆導電型の次段の素子の最下層を形成する工程と、該工
程により形成された上記一素子と次段の素子との隣接部
のp層とn層から成る接合層に、上記次段の素子側から
波長400nm以下の光を照射して、該接合層の接合部の
オーミック性を向上させる工程と、該光照射工程後に上
記次段の素子のi層を形成する工程を有することを特徴
とする半導体装置の製造方法。
1. A method of manufacturing a semiconductor device, wherein two or more layers of pin-structure photoelectric conversion elements mainly composed of silicon and composed of a non-single-crystal phase are stacked and electrically connected in series,
A step of forming a lowermost layer of a next-stage element having a conductivity type opposite to the uppermost layer of the photoelectric conversion element on the one element, and the one-element and the next-stage element formed by the step Irradiating light having a wavelength of 400 nm or less from the element side of the next stage to the junction layer composed of the p-layer and the n-layer adjacent to each other to improve ohmic property of the junction of the junction layer, A method of manufacturing a semiconductor device, comprising a step of forming an i layer of the element in the next stage after the step.
JP59216329A 1984-10-17 1984-10-17 Method for manufacturing semiconductor device Expired - Lifetime JPH065780B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59216329A JPH065780B2 (en) 1984-10-17 1984-10-17 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59216329A JPH065780B2 (en) 1984-10-17 1984-10-17 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6196773A JPS6196773A (en) 1986-05-15
JPH065780B2 true JPH065780B2 (en) 1994-01-19

Family

ID=16686824

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59216329A Expired - Lifetime JPH065780B2 (en) 1984-10-17 1984-10-17 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH065780B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63133578A (en) * 1986-11-25 1988-06-06 Semiconductor Energy Lab Co Ltd Semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5681981A (en) * 1979-09-21 1981-07-04 Messerschmitt Boelkow Blohm Semiconductor forming element for converting light to electric energy
JPS5745980A (en) * 1980-09-02 1982-03-16 Mitsubishi Electric Corp Amorphous solar battery and manufacture thereof
JPS5799729A (en) * 1981-10-20 1982-06-21 Shunpei Yamazaki Manufacture of semi-amorphous semiconductor
JPS58122783A (en) * 1982-01-14 1983-07-21 Sanyo Electric Co Ltd Photovoltaic device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5681981A (en) * 1979-09-21 1981-07-04 Messerschmitt Boelkow Blohm Semiconductor forming element for converting light to electric energy
JPS5745980A (en) * 1980-09-02 1982-03-16 Mitsubishi Electric Corp Amorphous solar battery and manufacture thereof
JPS5799729A (en) * 1981-10-20 1982-06-21 Shunpei Yamazaki Manufacture of semi-amorphous semiconductor
JPS58122783A (en) * 1982-01-14 1983-07-21 Sanyo Electric Co Ltd Photovoltaic device

Also Published As

Publication number Publication date
JPS6196773A (en) 1986-05-15

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