JPH06338492A - Method of forming insulation film and method of manufacturing gate insulation film for thin film transistor - Google Patents
Method of forming insulation film and method of manufacturing gate insulation film for thin film transistorInfo
- Publication number
- JPH06338492A JPH06338492A JP12885993A JP12885993A JPH06338492A JP H06338492 A JPH06338492 A JP H06338492A JP 12885993 A JP12885993 A JP 12885993A JP 12885993 A JP12885993 A JP 12885993A JP H06338492 A JPH06338492 A JP H06338492A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- insulating film
- high frequency
- thin film
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体デバイスの構成
材料に用いる絶縁膜の形成方法に関するもので、特に導
体表面を酸化膜もしくは窒化膜により絶縁膜化する絶縁
膜の形成方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming an insulating film used as a constituent material of a semiconductor device, and more particularly to a method of forming an insulating film by converting a conductor surface into an insulating film with an oxide film or a nitride film.
【０００２】[0002]
【従来の技術】平行平板型の高周波放電装置を用いた絶
縁膜の形成方法としては、特開平５−１９２９６号公報
に示されたものがある。2. Description of the Related Art As a method of forming an insulating film using a parallel plate type high frequency discharge device, there is one disclosed in Japanese Patent Laid-Open No. 19296/1993.
【０００３】この方法は、高周波電力を印加した電極側
に発生する負電圧の自己バイアスを加速エネルギーとし
て、基板にプラズマ中の酸素イオンまたは窒素イオンを
注入し、基板の表面を酸化または窒化することによって
絶縁膜を形成するものである。この方法には、基板を加
熱することなく低温で、極めて均一な膜厚の絶縁膜を形
成できるという特徴がある。In this method, oxygen ions or nitrogen ions in plasma are injected into a substrate to oxidize or nitride the surface of the substrate by using self-bias of a negative voltage generated on the electrode side to which high frequency power is applied as acceleration energy. To form an insulating film. This method is characterized in that an insulating film having an extremely uniform thickness can be formed at low temperature without heating the substrate.
【０００４】一方、薄膜トランジスタのゲート絶縁膜の
製造方法には、ゲート電極の表面を酸化する方法があ
る。具体的には、ゲート電極材料にタンタルを用い、こ
のタンタルをクエン酸水溶液中で陽極酸化してタンタル
酸化物を形成するものである。On the other hand, as a method of manufacturing the gate insulating film of the thin film transistor, there is a method of oxidizing the surface of the gate electrode. Specifically, tantalum is used as the gate electrode material, and this tantalum is anodized in an aqueous citric acid solution to form tantalum oxide.
【０００５】[0005]
【発明が解決しようとする課題】しかし、上記従来の高
周波放電を用いた絶縁膜の形成方法では、形成できる絶
縁膜の膜厚が数ｎｍ程度であり、それより厚い膜厚の絶
縁膜を形成することができないという課題があった。そ
の理由は、酸素イオンは負電圧の自己バイアスによって
基板の表面に照射されるが、その自己バイアスによる照
射エネルギーが数百ｅＶ程度であり、この程度のエネル
ギーで照射されたイオンはスパッタリング率が高いた
め、形成された絶縁膜をスパッタリングしてしまうため
である。However, in the above-described conventional method of forming an insulating film using high-frequency discharge, the thickness of the insulating film that can be formed is about several nm, and an insulating film having a larger film thickness is formed. There was a problem that I could not do it. The reason is that oxygen ions are irradiated to the surface of the substrate by a self-bias of negative voltage, but the irradiation energy by the self-bias is about several hundred eV, and the ions irradiated with this energy have a high sputtering rate. Therefore, the formed insulating film is sputtered.
【０００６】また、上記湿式の陽極酸化法では、酸化の
メカニズムが電気化学反応であるため、酸化し得る配線
材料が限定されてしまうという課題があった。本発明は
上記従来の課題を解決するもので、厚さ数十ｎｍから数
百ｎｍの充分な厚さの絶縁膜を材料の制約を受けること
なく形成できる絶縁膜の形成方法を提供することを目的
とする。Further, in the above-mentioned wet anodic oxidation method, since the mechanism of the oxidation is an electrochemical reaction, there is a problem that the wiring material which can be oxidized is limited. The present invention solves the above-mentioned conventional problems, and provides a method for forming an insulating film, which can form an insulating film having a sufficient thickness of several tens nm to several hundreds nm without being restricted by materials. To aim.
【０００７】[0007]
【課題を解決するための手段】上記課題を解決するため
に請求項１記載の発明は、真空容器内に設置した接地電
極と、高周波電力を印加する高周波電極からなる対向電
極とを有し、表面を絶縁膜化する導体薄膜を形成した基
板を前記高周波電力を印加する高周波電極に配置し、前
記対向電極間に酸素または窒素を含むガスを供給し、前
記導体薄膜に負電圧印加手段により負電圧を印加し、前
記対向電極間に高周波電力を印加してプラズマを発生す
ることによって前記導体薄膜の表面に絶縁膜を形成する
ものである。In order to solve the above-mentioned problems, the invention according to claim 1 has a ground electrode installed in a vacuum container, and a counter electrode composed of a high-frequency electrode for applying high-frequency power, A substrate on which a conductor thin film whose surface is an insulating film is formed is arranged on the high frequency electrode for applying the high frequency power, a gas containing oxygen or nitrogen is supplied between the counter electrodes, and a negative voltage is applied to the conductor thin film by a negative voltage applying means. An insulating film is formed on the surface of the conductor thin film by applying a voltage and applying high-frequency power between the opposing electrodes to generate plasma.
【０００８】また、請求項２記載の発明は、真空容器内
に設置した接地電極と高周波電力を印加する高周波電極
からなる対向電極と、該対向電極間に酸素または窒素を
含むガスを供給する手段を有し、前記高周波電極にゲー
ト電極を形成したガラス基板を配置し、高周波電力によ
りプラズマを発生すると共に、前記ゲート電極に負電圧
を印加することにより前記ゲート電極の表面に絶縁膜を
形成する薄膜トランジスタ用ゲート絶縁膜の製造方法で
ある。According to a second aspect of the invention, a counter electrode composed of a ground electrode installed in a vacuum container and a high frequency electrode for applying high frequency power, and means for supplying a gas containing oxygen or nitrogen between the counter electrodes. A glass substrate having a gate electrode formed on the high-frequency electrode is disposed, plasma is generated by high-frequency power, and a negative voltage is applied to the gate electrode to form an insulating film on the surface of the gate electrode. It is a method of manufacturing a gate insulating film for a thin film transistor.
【０００９】[0009]
【作用】上記方法により、基板上に形成した導体薄膜に
は高周波放電の自己バイアスによる負電圧とともに負電
圧印加手段により、印加した負電圧をかけると、放電で
発生した酸素イオンまたは窒素イオンはこの両負電圧に
よって加速され、導体薄膜内に深く注入される。注入さ
れたイオンは導体と反応し、数十ｎｍから数百ｎｍの充
分な膜厚の酸化物または窒化物の絶縁膜を形成すること
ができる。When a negative voltage applied by the negative voltage applying means is applied to the conductive thin film formed on the substrate by the above method by the self bias of the high frequency discharge, the oxygen ions or the nitrogen ions generated by the discharge are It is accelerated by both negative voltages and deeply injected into the conductor thin film. The implanted ions react with the conductor and can form an oxide or nitride insulating film with a sufficient thickness of several tens to several hundreds of nm.
【００１０】また、ゲート電極には物理的に酸素イオン
または窒素イオンが注入されるため、ゲート電極の材料
によらず絶縁膜を形成することができる。Since oxygen ions or nitrogen ions are physically implanted into the gate electrode, an insulating film can be formed regardless of the material of the gate electrode.
【００１１】[0011]
【実施例】以下、本発明の一実施例の絶縁膜の形成方法
について、薄膜トランジスタのゲート絶縁膜の形成方法
を例にして、図面を参照しながら説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for forming an insulating film according to an embodiment of the present invention will be described below with reference to the drawings by taking a method for forming a gate insulating film of a thin film transistor as an example.
【００１２】図３は液晶ディスプレーに用いられる薄膜
トランジスタの構成図である。図３において、ガラス基
板１上に薄膜トランジスタ２が構成されている。薄膜ト
ランジスタ２は、アルミニウムからなるゲート電極３
と、このゲート電極３の表面を酸化して形成された第１
のゲート絶縁膜４、ＣＶＤ法により形成された第２のゲ
ート絶縁膜５、アモルファスシリコン膜６、ｎ型アモル
ファスシリコン膜７、入出力配線８、透明電極からなる
画素電極９、および入出力配線８とｎ型アモルファスシ
リコン膜７をエッチングする際のエッチングストッパー
に用いる絶縁膜１０から構成されている。FIG. 3 is a block diagram of a thin film transistor used in a liquid crystal display. In FIG. 3, the thin film transistor 2 is formed on the glass substrate 1. The thin film transistor 2 has a gate electrode 3 made of aluminum.
And a first electrode formed by oxidizing the surface of the gate electrode 3.
Gate insulating film 4, second gate insulating film 5 formed by the CVD method, amorphous silicon film 6, n-type amorphous silicon film 7, input / output wiring 8, pixel electrode 9 made of a transparent electrode, and input / output wiring 8 And an insulating film 10 used as an etching stopper when the n-type amorphous silicon film 7 is etched.
【００１３】ここで、第１のゲート絶縁膜４は第２のゲ
ート絶縁膜５にピンホールなどの欠陥が発生しても、そ
れによる薄膜トランジスタ２の欠陥発生を抑制するため
の重要な絶縁膜である。この第１のゲート絶縁膜４の形
成に本実施例の絶縁膜の形成方法を用いる。Here, the first gate insulating film 4 is an important insulating film for suppressing the occurrence of defects in the thin film transistor 2 due to the occurrence of defects such as pinholes in the second gate insulating film 5. is there. The insulating film forming method of this embodiment is used for forming the first gate insulating film 4.
【００１４】図１の本実施例の絶縁膜の形成方法に用い
る絶縁膜形成装置は、真空容器１１内に対向して配置し
た接地電極１２と、高周波電源１３に接続された高周波
電極１４からなる対向電極と、酸素ガス供給管１５、表
面にアルミニウムからなるゲート電極を形成したガラス
基板１６、およびこのゲート電極に接触した電極（負電
圧印加手段）１７、電極１７に接続された負電圧電源１
８から構成されている。電極１７の周囲はガラス管１９
で被っており、電極１７と負電圧電源１８の間には高周
波を遮断するためのローパスフィルター２０を設けてい
る。なお、接地電極１２と高周波電極１４は冷却水２０
により冷却されており、また高周波電極１４の表面は石
英ガラス板２１で被っている。The insulating film forming apparatus used in the method of forming an insulating film of this embodiment shown in FIG. 1 comprises a ground electrode 12 arranged in a vacuum container 11 so as to face each other, and a high frequency electrode 14 connected to a high frequency power supply 13. A counter electrode, an oxygen gas supply pipe 15, a glass substrate 16 on the surface of which a gate electrode made of aluminum is formed, an electrode (negative voltage applying means) 17 in contact with the gate electrode, and a negative voltage power source 1 connected to the electrode 17.
It is composed of 8. A glass tube 19 surrounds the electrode 17.
A low-pass filter 20 for cutting off high frequencies is provided between the electrode 17 and the negative voltage power source 18. In addition, the ground electrode 12 and the high frequency electrode 14 are used for the cooling water 20.
And the surface of the high frequency electrode 14 is covered with a quartz glass plate 21.
【００１５】ガラス基板１６と電極１７の接触の様子を
具体的に図示したものが図２である。図２（ａ）は図１
と同じ方向から見たガラス基板１６の断面図で、図２
（ｂ）は図２（ａ）の平面図である。図２（ｂ）のパタ
ーニングされたゲート電極２２は共通電極部２３により
接続されている。電極１７はこの共通電極部２３に接触
させることによって、各ゲート電極２２に負電圧を印加
している。FIG. 2 specifically shows how the glass substrate 16 and the electrode 17 are in contact with each other. 2 (a) is shown in FIG.
2 is a cross-sectional view of the glass substrate 16 viewed from the same direction as FIG.
FIG. 2B is a plan view of FIG. The patterned gate electrode 22 in FIG. 2B is connected by the common electrode portion 23. The electrode 17 applies a negative voltage to each gate electrode 22 by contacting the common electrode portion 23.
【００１６】次に、このように配置された図１の絶縁膜
形成装置の操作について説明する。真空容器１１内を所
定の高真空度まで真空引きした後、酸素ガスを供給して
数十から数百ｔｏｒｒの真空度に保持する。この状態で
高周波電力を印加して酸素プラズマ２４を発生させ、負
電圧電源１８を用いて各ゲート電極２２に数ｋＶ程度の
負電圧を印加すると、酸素プラズマ２４中の酸素イオン
がゲート電極２２の表面に数ｋｅＶ程度の高エネルギー
で注入される。Next, the operation of the thus-arranged insulating film forming apparatus of FIG. 1 will be described. After the inside of the vacuum container 11 is evacuated to a predetermined high vacuum degree, oxygen gas is supplied to maintain the vacuum degree of several tens to several hundreds of torr. In this state, high frequency power is applied to generate oxygen plasma 24, and when a negative voltage of about several kV is applied to each gate electrode 22 using the negative voltage power source 18, oxygen ions in the oxygen plasma 24 are generated in the gate electrode 22. It is injected into the surface with high energy of about several keV.
【００１７】このように酸素イオンを数ｋｅＶ程度のエ
ネルギーで注入すれば、酸素イオンはゲート電極２２の
内部に深く注入され、しかもこのような高エネルギーで
はイオンが照射されることによるスパッタリング率は大
幅に低下するため、厚い膜厚の酸化アルミニウムを形成
することができる。形成される酸化アルミニウムの膜厚
は、高周波電力と印加する負電圧によって数十ｎｍから
数百ｎｍまで制御することができる。この方法で形成し
た酸化アルミニウムはピンホールのない良質な絶縁膜で
ある。Thus, if the oxygen ions are implanted with an energy of about several keV, the oxygen ions are deeply implanted inside the gate electrode 22, and the sputtering rate due to the irradiation of the ions at such high energy is large. Therefore, it is possible to form a thick aluminum oxide film. The film thickness of the formed aluminum oxide can be controlled from several tens nm to several hundreds nm by the high frequency power and the negative voltage applied. Aluminum oxide formed by this method is a good quality insulating film without pinholes.
【００１８】このように、本発明では酸素イオンをゲー
ト電極２２に物理的に注入して酸化膜を形成するため、
従来例で記載した陽極酸化法のように酸化し得るゲート
電極の材料が制限されるという問題はない。たとえば、
ゲート電極に用いる材料をクロムとすれば、酸化クロム
を形成することができる。また酸化膜に限らず、プラズ
マの発生に用いる放電ガスに窒素ガスを用いれば窒化膜
を形成することができる。As described above, according to the present invention, oxygen ions are physically injected into the gate electrode 22 to form an oxide film.
Unlike the anodizing method described in the conventional example, there is no problem that the material of the gate electrode that can be oxidized is limited. For example,
If the material used for the gate electrode is chromium, chromium oxide can be formed. Further, not only an oxide film but also a nitride film can be formed by using nitrogen gas as a discharge gas used for generating plasma.
【００１９】当然、放電ガスに亜酸化窒素ガスなどの酸
素と窒素を含んだガスを用いれば、酸化窒化膜を形成す
ることができる。Of course, if a gas containing oxygen and nitrogen such as nitrous oxide gas is used as the discharge gas, the oxynitride film can be formed.
【００２０】[0020]
【発明の効果】以上の説明により明らかなように本発明
によれば、厚さ数十ｎｍから数百ｎｍの充分な膜厚の絶
縁膜を形成することができる。As is apparent from the above description, according to the present invention, it is possible to form an insulating film having a sufficient film thickness of several tens nm to several hundreds nm.
【００２１】また、本発明は導体の表面に酸素イオンま
たは窒素イオンを物理的に注入することによって形成す
るものであり、絶縁膜を形成する材料の制約を受けない
という特徴がある。Further, the present invention is formed by physically implanting oxygen ions or nitrogen ions into the surface of the conductor, and is characterized in that it is not restricted by the material forming the insulating film.
【図１】本発明の一実施例の絶縁膜の形成方法に用いる
絶縁膜形成装置の対向電極部の断面図FIG. 1 is a sectional view of a counter electrode portion of an insulating film forming apparatus used in an insulating film forming method according to an embodiment of the present invention.
【図２】（ａ）は図１のガラス基板と電極の接触部の断
面図 （ｂ）は（ａ）の平面図2A is a cross-sectional view of the contact portion between the glass substrate and the electrode of FIG. 1, and FIG. 2B is a plan view of FIG.
【図３】薄膜トランジスタの概略構成を示す断面図FIG. 3 is a cross-sectional view showing a schematic configuration of a thin film transistor.
１１ 真空容器 １２ 接地電極 １４ 高周波電極 １６ 基板 １７ 電極（負電圧印加手段） １８ 負電圧電源 ２２ ゲート電極（導体薄膜） ２４ 酸素プラズマ 11 Vacuum Container 12 Ground Electrode 14 High Frequency Electrode 16 Substrate 17 Electrode (Negative Voltage Applying Means) 18 Negative Voltage Power Supply 22 Gate Electrode (Conductor Thin Film) 24 Oxygen Plasma
Claims (2)
電力を印加する高周波電極からなる対向電極とを有し、
表面を絶縁膜化する導体薄膜を形成した基板を前記高周
波電力を印加する高周波電極に配置し、前記対向電極間
に酸素または窒素を含むガスを供給し、前記導体薄膜に
負電圧印加手段により負電圧を印加し、前記対向電極間
に高周波電力を印加してプラズマを発生することにより
前記導体薄膜の表面に絶縁膜を形成する絶縁膜の形成方
法。1. A ground electrode installed in a vacuum container, and a counter electrode composed of a high-frequency electrode for applying high-frequency power,
A substrate on which a conductor thin film whose surface is an insulating film is formed is arranged on the high frequency electrode for applying the high frequency power, a gas containing oxygen or nitrogen is supplied between the counter electrodes, and a negative voltage is applied to the conductor thin film by a negative voltage applying means. A method for forming an insulating film, comprising forming a insulating film on the surface of the conductive thin film by applying a voltage and applying high frequency power between the opposed electrodes to generate plasma.
電力を印加する高周波電極からなる対向電極と、該対向
電極間に酸素または窒素を含むガスを供給する手段を有
し、前記高周波電極にゲート電極を形成したガラス基板
を配置し、高周波電力によりプラズマを発生すると共
に、前記ゲート電極に負電圧を印加することにより前記
ゲート電極の表面に絶縁膜を形成する薄膜トランジスタ
用ゲート絶縁膜の製造方法。2. A high-frequency electrode having a ground electrode installed in a vacuum container, a counter electrode composed of a high-frequency electrode for applying high-frequency power, and means for supplying a gas containing oxygen or nitrogen between the counter electrodes. Manufacturing a gate insulating film for a thin film transistor, in which a glass substrate having a gate electrode formed thereon is disposed, plasma is generated by high frequency power, and an insulating film is formed on the surface of the gate electrode by applying a negative voltage to the gate electrode. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12885993A JPH06338492A (en) | 1993-05-31 | 1993-05-31 | Method of forming insulation film and method of manufacturing gate insulation film for thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12885993A JPH06338492A (en) | 1993-05-31 | 1993-05-31 | Method of forming insulation film and method of manufacturing gate insulation film for thin film transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06338492A true JPH06338492A (en) | 1994-12-06 |
Family
ID=14995138
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12885993A Pending JPH06338492A (en) | 1993-05-31 | 1993-05-31 | Method of forming insulation film and method of manufacturing gate insulation film for thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06338492A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006332614A (en) * | 2005-04-25 | 2006-12-07 | Semiconductor Energy Lab Co Ltd | Semiconductor device, organic transistor and manufacturing method thereof |
| JP2006332606A (en) * | 2005-04-28 | 2006-12-07 | Semiconductor Energy Lab Co Ltd | Method for manufacturing thin-film transistor, display device using the thin-film transistor, electronic apparatus incorporating the display device |
| JP2007273747A (en) * | 2006-03-31 | 2007-10-18 | Tokyo Electron Ltd | Substrate processor and processing gas discharging mechanism |
| JP2012064957A (en) * | 2005-04-28 | 2012-03-29 | Semiconductor Energy Lab Co Ltd | Manufacturing method for semiconductor device |
| US8343816B2 (en) | 2005-04-25 | 2013-01-01 | Semiconductor Energy Laboratory Co., Ltd. | Organic transistor, manufacturing method of semiconductor device and organic transistor |
-
1993
- 1993-05-31 JP JP12885993A patent/JPH06338492A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006332614A (en) * | 2005-04-25 | 2006-12-07 | Semiconductor Energy Lab Co Ltd | Semiconductor device, organic transistor and manufacturing method thereof |
| US8343816B2 (en) | 2005-04-25 | 2013-01-01 | Semiconductor Energy Laboratory Co., Ltd. | Organic transistor, manufacturing method of semiconductor device and organic transistor |
| US8785259B2 (en) | 2005-04-25 | 2014-07-22 | Semiconductor Energy Laboratory Co., Ltd. | Organic transistor, manufacturing method of semiconductor device and organic transistor |
| JP2006332606A (en) * | 2005-04-28 | 2006-12-07 | Semiconductor Energy Lab Co Ltd | Method for manufacturing thin-film transistor, display device using the thin-film transistor, electronic apparatus incorporating the display device |
| JP2012064957A (en) * | 2005-04-28 | 2012-03-29 | Semiconductor Energy Lab Co Ltd | Manufacturing method for semiconductor device |
| US8318554B2 (en) | 2005-04-28 | 2012-11-27 | Semiconductor Energy Laboratory Co., Ltd. | Method of forming gate insulating film for thin film transistors using plasma oxidation |
| JP2007273747A (en) * | 2006-03-31 | 2007-10-18 | Tokyo Electron Ltd | Substrate processor and processing gas discharging mechanism |
| WO2007119612A1 (en) * | 2006-03-31 | 2007-10-25 | Tokyo Electron Limited | Substrate treating apparatus and treating gas emitting mechanism |
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