JPH06326236A - Resin sealed semiconductor device - Google Patents
Resin sealed semiconductor deviceInfo
- Publication number
- JPH06326236A JPH06326236A JP10912393A JP10912393A JPH06326236A JP H06326236 A JPH06326236 A JP H06326236A JP 10912393 A JP10912393 A JP 10912393A JP 10912393 A JP10912393 A JP 10912393A JP H06326236 A JPH06326236 A JP H06326236A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- good thermal
- polyimide film
- thermal conductor
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は樹脂封止型半導体装置に
関し、特に放熱特性が求められるタイプの半導体装置に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a semiconductor device of a type requiring heat dissipation characteristics.
【０００２】[0002]
【従来の技術】近年、半導体チップ内の多数の回路素子
が微細化及び高集積化されるに伴い、消費電力も増大
し、発熱量が増加する。そのため、発生する熱放散の問
題が半導体パッケ−ジの設計において重要となってい
る。2. Description of the Related Art In recent years, as many circuit elements in a semiconductor chip have been miniaturized and highly integrated, power consumption also increases and heat generation amount increases. Therefore, the problem of heat dissipation that occurs is important in the design of semiconductor packages.
【０００３】以下、従来の技術による熱放散を目的とす
る半導体パッケ−ジを説明する。先ず、図２（ａ）はヒ
−トシンクタイプを示したものである。半導体チップ２
１はヒ−トシンク２１上にマウントされ、半導体チップ
２２に設けられたパッド電極（図示せず）とリ−ド２３
とは金属細線２４を介して接続され、樹脂２５により封
止されている。半導体チップ２２から発生する熱は、外
部に露出するヒ−トシンク２１を介して放散されるため
放熱効果は大きい。さらに放熱性を高めるにはヒ−トシ
ンク２１を拡大することにより可能である。しかし、半
導体パッケ−ジの大部分をヒ−トシンク２１が占める
為、ヒ−トシンク２１を拡大することは半導体パッケ−
ジの大型化となる。従って、半導体パッケ−ジの設計に
際し、放熱特性の向上を図ることと同時に、小型・薄型
化をすすめることは難しい。A conventional semiconductor package for heat dissipation will be described below. First, FIG. 2 (a) shows a heat sink type. Semiconductor chip 2
1 is mounted on the heat sink 21, and a pad electrode (not shown) provided on the semiconductor chip 22 and a lead 23.
Are connected via a thin metal wire 24 and are sealed with a resin 25. Since the heat generated from the semiconductor chip 22 is dissipated through the heat sink 21 exposed to the outside, the heat dissipation effect is large. It is possible to further increase heat dissipation by enlarging the heat sink 21. However, since the heat sink 21 occupies most of the semiconductor package, it is not possible to expand the heat sink 21.
It will be larger. Therefore, when designing a semiconductor package, it is difficult to improve the heat dissipation characteristics and at the same time reduce the size and thickness of the package.
【０００４】次に、同図（ｂ）はヒ−トスプレッダタイ
プを示したものである。ヒ−トスプレッダ２６はリ−ド
２３と接着フィルム２７を介して接合される。ヒ−トス
プレッダ２６上にマウントされた半導体チップ２２から
発生する熱は、ヒ−トスプレッダ２６を介しリ−ドより
放散される。このタイプはヒ−トシンクタイプより、半
導体パッケ−ジの小型・薄型化を図ることができる反
面、放熱特性が劣っている。Next, FIG. 1B shows a heat spreader type. The heat spreader 26 is joined to the lead 23 via the adhesive film 27. The heat generated from the semiconductor chip 22 mounted on the heat spreader 26 is dissipated from the lead via the heat spreader 26. Although this type can achieve a smaller and thinner semiconductor package than the heat sink type, it has inferior heat dissipation characteristics.
【０００５】また、同図（ｃ）はベッド外出しタイプを
示したものである。リ−ド２３と一体に形成されたアイ
ランド２８を半導体パッケ−ジ外に露出させるため、半
導体チップ２２から発生する熱はアイランド２８裏面か
ら放散する。このタイプはコスト的に非常に有効である
が、アイランド２８等と樹脂２５との界面から水分が侵
入しやすく耐湿性に劣っている。Further, FIG. 3C shows the out-of-bed type. Since the island 28 formed integrally with the lead 23 is exposed to the outside of the semiconductor package, the heat generated from the semiconductor chip 22 is dissipated from the back surface of the island 28. Although this type is very effective in terms of cost, moisture easily penetrates from the interface between the island 28 and the resin 25 and is inferior in moisture resistance.
【０００６】[0006]
【発明が解決しようとする課題】上述のようないずれの
タイプにおいても、半導体パッケ−ジのより小型・薄型
化を図りつつも高い放熱性と信頼性を兼ね備えることは
困難である。それ故に、本発明は、高い放熱性と同時に
高い信頼性を有する樹脂封止型半導体装置を提供するこ
とを目的とする。In any of the types described above, it is difficult to achieve high heat dissipation and reliability while achieving a smaller and thinner semiconductor package. Therefore, an object of the present invention is to provide a resin-sealed semiconductor device having high heat dissipation and high reliability.
【０００７】[0007]
【課題を解決するための手段】本発明は、熱良導体が埋
め込まれたポリイミドフィルム表面に半導体チップが載
置され、上記半導体チップ上に設けられたパッド電極と
リ−ドとは電気的に接続され、上記ポリイミドフィルム
の裏面がパッケ−ジ外部に露出するように樹脂封止され
た樹脂封止型半導体装置である。上記熱良導体は、少な
くとも上記ポリイミドフィルムの上記半導体チップの載
置予定位置に一つ以上埋め込まれる。また、上記ポリイ
ミドフィルム上に配線パタ−ンを形成し、上記配線パタ
−ンを介して上記パッド電極と上記リ−ドとを電気的に
接続することもできる。According to the present invention, a semiconductor chip is placed on the surface of a polyimide film in which a good thermal conductor is embedded, and a pad electrode and a lead provided on the semiconductor chip are electrically connected. The resin-sealed semiconductor device is resin-sealed such that the back surface of the polyimide film is exposed to the outside of the package. One or more thermal conductors are embedded in at least the expected placement position of the semiconductor chip on the polyimide film. It is also possible to form a wiring pattern on the polyimide film and electrically connect the pad electrode and the lead via the wiring pattern.
【０００８】[0008]
【作用】上記熱良導体は上記半導体チップ裏面に配置さ
れており、上記半導体チップから発生する熱は上記熱良
導体を介して直接外部に放散する。また、上記ポリイミ
ドフィルムと封止樹脂とは密着性がよいため耐湿性も向
上され、樹脂封止型半導体装置の信頼性も高まる。The good conductor of heat is arranged on the back surface of the semiconductor chip, and the heat generated from the semiconductor chip is directly radiated to the outside through the good conductor of heat. Further, since the polyimide film and the sealing resin have good adhesion, the moisture resistance is also improved, and the reliability of the resin-sealed semiconductor device is also increased.
【０００９】[0009]
【実施例】以下、本発明による樹脂封止型半導体装置の
一実施例を図１を参照して説明する。図１（ａ）に示す
ように、半導体チップ１１はダイパッドとなる絶縁性の
ポリイミドフィルム１２上にマウントされ、半導体チッ
プ１１上のバンプ電極（図示せず）とリ−ド１３とは金
属細線１４により電気的に接続されて、ポリイミドフィ
ルム１２の裏面が露出するように樹脂１５により封止さ
れる。ここで、ポリイミドフィルム１２には熱良導体
（例えば銅またはセラミックス）１６が一ヶ所以上、ポ
リミドフィルムを貫通するように埋め込まれている。ま
た、熱良導体１６は少なくともポリイミドフィルム１２
の半導体チップ１１が載置される部分に埋め込まれてい
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the resin-sealed semiconductor device according to the present invention will be described below with reference to FIG. As shown in FIG. 1A, the semiconductor chip 11 is mounted on an insulative polyimide film 12 that serves as a die pad, and the bump electrodes (not shown) on the semiconductor chip 11 and the leads 13 are metal thin wires 14. Are electrically connected to each other and are sealed with a resin 15 so that the back surface of the polyimide film 12 is exposed. Here, a good thermal conductor (for example, copper or ceramics) 16 is embedded in the polyimide film 12 at one or more places so as to penetrate the polyimide film. Further, the good thermal conductor 16 is at least the polyimide film 12.
Embedded in the portion where the semiconductor chip 11 is mounted.
【００１０】このような構造であると、半導体チップ１
１から発生する熱は熱良導体１６を介して外部に直接放
散される。半導体チップ１１下に均一に熱良導体１６が
配置されるようにすることにより、より放熱性を向上す
ることができる。また、ポリイミドフィルム１２は樹脂
１５と密着性が良いため、ポリイミドフイルムと樹脂１
５との界面からの水分の侵入を防止することができる。
更に、ポリイミドフィルム１２は柔軟性を有するため、
パッケ−ジの反りをも防止できる。With such a structure, the semiconductor chip 1
The heat generated from No. 1 is directly radiated to the outside through the good thermal conductor 16. By disposing the good thermal conductors 16 evenly under the semiconductor chip 11, the heat dissipation can be further improved. Further, since the polyimide film 12 has good adhesion to the resin 15, the polyimide film and the resin 1
Water can be prevented from entering from the interface with 5.
Furthermore, since the polyimide film 12 has flexibility,
Warpage of the package can also be prevented.
【００１１】同図（ｂ）に示される他の実施例では、ポ
リイミドフィルム１２上に導電物からなる配線パタ−ン
１７が形成され、パッド電極は配線パタ−ン１７を介し
てリ−ド１３と接続される。それにより、パッド電極と
リ−ド１３とが離れた位置にある場合でも接続すること
ができると共に、リ−ドフレ−ムの汎用性を高めること
も可能である。In another embodiment shown in FIG. 2B, a wiring pattern 17 made of a conductive material is formed on the polyimide film 12, and the pad electrode is connected to the lead 13 via the wiring pattern 17. Connected with. As a result, the pad electrode and the lead 13 can be connected to each other even if they are separated from each other, and the versatility of the lead frame can be enhanced.
【００１２】同図（ａ），（ｂ）に示されるいずれの実
施例の場合においても、同図（ｃ）中の丸印部分１８に
示されるように、ポリイミドフィルム１２の端部をパッ
ケ−ジ内に伸ばすことにより、耐湿性を向上させること
ができる。In any of the embodiments shown in FIGS. 2A and 2B, the end portion of the polyimide film 12 is packaged as shown by the circled portion 18 in FIG. Moisture resistance can be improved by stretching it in the groove.
【００１３】[0013]
【発明の効果】本発明によれば、半導体チップから発生
する熱は、半導体チップ裏面に配置された熱良導体を介
して放散する。従って、直接外部に放熱することがで
き、放熱特性の向上を図ることができる。また、封止樹
脂と密着性のよいポリイミドフィルムを用いるため、耐
湿性を高め、樹脂封止型半導体装置の信頼性を高めるこ
とができる。According to the present invention, the heat generated from the semiconductor chip is dissipated through the good thermal conductor arranged on the back surface of the semiconductor chip. Therefore, the heat can be radiated directly to the outside, and the heat radiation characteristics can be improved. In addition, since a polyimide film having good adhesion to the sealing resin is used, it is possible to improve moisture resistance and reliability of the resin-sealed semiconductor device.
【図１】本発明による一実施例（ａ）、ポリイミドフィ
ル上に配線パタ−ンを設けた例（ｂ）、ポリイミドフィ
ルム端部の変形例（ｃ）を示す断面図である。FIG. 1 is a cross-sectional view showing an embodiment (a) according to the present invention, an example (b) in which a wiring pattern is provided on a polyimide film, and a modification (c) of an end portion of a polyimide film.
【図２】ヒ−トシンクタイプ（ａ）、ヒ−トスプレッダ
タイプ（ｂ）、ベッド外出しタイプ（ｃ）の樹脂封止型
半導体装置を示す断面図である。FIG. 2 is a cross-sectional view showing a heat sink type (a), a heat spreader type (b), and a bed out type (c) resin-sealed semiconductor device.
１１…半導体チップ、１２…ポリイミドフィルム、１３
…リ−ド １４…金属細線、１５…樹脂、１６…熱良導体、１７…
配線パタ−ン １８…丸印部分11 ... Semiconductor chip, 12 ... Polyimide film, 13
... Lead 14 ... Thin metal wire, 15 ... Resin, 16 ... Good thermal conductor, 17 ...
Wiring pattern 18 ... Circled part
フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 23/28 Ａ 8617−4Ｍ Ｂ 8617−4Ｍ 23/29 23/373 Continuation of front page (51) Int.Cl. 5 Identification number Office reference number FI technical display location H01L 23/28 A 8617-4M B 8617-4M 23/29 23/373
Claims (3)
ッドと、上記半導体チップ上に設けられたパッド電極と
電気的に接続するリ−ドとを具備する樹脂封止型半導体
装置において、 上記ダイパッドは、埋め込まれた熱良導体を少なくとも
一つ以上有し、 上記熱良導体を含む上記ダイパッドの裏面は、外部に露
出するように封止されていることを特徴とする樹脂封止
型半導体装置。1. A resin-sealed semiconductor device comprising: an insulating die pad on which a semiconductor chip is mounted; and a lead electrically connected to a pad electrode provided on the semiconductor chip. Is at least one embedded good thermal conductor, and the back surface of the die pad containing the good thermal conductor is sealed so as to be exposed to the outside.
設けられた導電物からなる配線パタ−ンを介して上記リ
−ドと電気的に接続することを特徴とする請求項１記載
の樹脂封止型半導体装置。2. The resin seal according to claim 1, wherein the pad electrode is electrically connected to the lead via a wiring pattern made of a conductive material provided on the die pad. Static semiconductor device.
ことを特徴とする請求項１または請求項２記載の樹脂封
止型半導体装置。3. The resin-sealed semiconductor device according to claim 1, wherein the die pad is made of polyimide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10912393A JPH06326236A (en) | 1993-05-11 | 1993-05-11 | Resin sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10912393A JPH06326236A (en) | 1993-05-11 | 1993-05-11 | Resin sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06326236A true JPH06326236A (en) | 1994-11-25 |
Family
ID=14502147
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10912393A Pending JPH06326236A (en) | 1993-05-11 | 1993-05-11 | Resin sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06326236A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08288428A (en) * | 1995-04-20 | 1996-11-01 | Nec Corp | Resin-sealed semiconductor device |
| WO2012023236A1 (en) * | 2010-08-20 | 2012-02-23 | パナソニック株式会社 | Semiconductor device and method for manufacturing same |
| JP2012235089A (en) * | 2011-05-03 | 2012-11-29 | Kyokutoku Kagi Kofun Yugenkoshi | Package carrier and manufacturing method therefor |
| WO2016126890A1 (en) * | 2015-02-03 | 2016-08-11 | Cellink Corporation | Systems and methods for combined thermal and electrical energy transfer |
-
1993
- 1993-05-11 JP JP10912393A patent/JPH06326236A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08288428A (en) * | 1995-04-20 | 1996-11-01 | Nec Corp | Resin-sealed semiconductor device |
| WO2012023236A1 (en) * | 2010-08-20 | 2012-02-23 | パナソニック株式会社 | Semiconductor device and method for manufacturing same |
| JP5412532B2 (en) * | 2010-08-20 | 2014-02-12 | パナソニック株式会社 | Semiconductor device and manufacturing method thereof |
| US8686545B2 (en) | 2010-08-20 | 2014-04-01 | Panasonic Corporation | Semiconductor device and method for manufacturing the same |
| JP2012235089A (en) * | 2011-05-03 | 2012-11-29 | Kyokutoku Kagi Kofun Yugenkoshi | Package carrier and manufacturing method therefor |
| WO2016126890A1 (en) * | 2015-02-03 | 2016-08-11 | Cellink Corporation | Systems and methods for combined thermal and electrical energy transfer |
| US10172229B2 (en) | 2015-02-03 | 2019-01-01 | Cellink Corporation | Systems and methods for combined thermal and electrical energy transfer |
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