JPH06310425A - Method for forming quantum wire - Google Patents

Method for forming quantum wire

Info

Publication number
JPH06310425A
JPH06310425A JP9303193A JP9303193A JPH06310425A JP H06310425 A JPH06310425 A JP H06310425A JP 9303193 A JP9303193 A JP 9303193A JP 9303193 A JP9303193 A JP 9303193A JP H06310425 A JPH06310425 A JP H06310425A
Authority
JP
Japan
Prior art keywords
quantum wire
etching
plane
hydrogen peroxide
citric acid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9303193A
Other languages
Japanese (ja)
Inventor
Koji Matsumura
浩二 松村
Hisaaki Tominaga
久昭 冨永
Yasoo Harada
八十雄 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP9303193A priority Critical patent/JPH06310425A/en
Publication of JPH06310425A publication Critical patent/JPH06310425A/en
Pending legal-status Critical Current

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Recrystallisation Techniques (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To form easily a one-dimensional quantum wire having a short confinement dimension, without receiving such a damage as a crystal defect. CONSTITUTION:After by a mask pattern 3 an N-AlGaAs layer 2 is patterned (b), etching is so performed using a citric acid-hydrogen peroxide based etchant that the (111) plane of a GaAs layer 1 is exposed to the outside. Thereby, a quantum wire 4 wherein electrons are confined by the N-AlGaAs layer 2 and a (111) B plane and have their freedoms only in the <0-11> direction is formed (c).

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、超高速性,低消費電力
性に優れた、多機能論理素子のチャネルとして使用され
る1次元半導体量子細線の形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a one-dimensional semiconductor quantum wire used as a channel of a multifunctional logic device, which is excellent in ultra-high speed and low power consumption.

【0002】[0002]

【従来の技術】キャリアが2方向にわたってド・ブロイ
波長程度の大きさ(GaAsの場合には数百Å程度)に
閉じ込められており、1方向のみにキャリアの自由度が
存するようなチャネルを1次元量子細線と言い、このよ
うな1次元量子細線は、理論的な解析結果により、以下
に示すような優れた特徴を有することが考えられてい
る。
2. Description of the Prior Art Carriers are confined in two directions in a size of about de Broglie's wavelength (several hundred Å in the case of GaAs), and a channel having carrier freedom in only one direction is used as a channel. A one-dimensional quantum wire is called a one-dimensional quantum wire, and it is considered that such a one-dimensional quantum wire has the following excellent characteristics based on theoretical analysis results.

【0003】(1)キャリアの超高速性が得られる。例
えば、その電子移動度が、2次元,3次元の量子細線に
比べて、室温では約10倍、低温では10倍以上である。 (2)キャリアの移動関数の大きな位相干渉長が得られ
る。例えば、理想的な場合には1μm以上の位相干渉長
が得られる。 (3)キャリア分布が、1次元量子細線ではエネルギの
平方根に反比例し、3次元系ではエネルギの平方根に比
例するので、急峻に分布する状態密度が得られる。
(1) The ultra high speed property of the carrier can be obtained. For example, the electron mobility thereof is about 10 times higher at room temperature and 10 times higher at low temperature than that of the two-dimensional and three-dimensional quantum wires. (2) A phase interference length having a large carrier transfer function can be obtained. For example, in an ideal case, a phase interference length of 1 μm or more can be obtained. (3) Since the carrier distribution is inversely proportional to the square root of energy in a one-dimensional quantum wire and proportional to the square root of energy in a three-dimensional system, a steeply distributed state density can be obtained.

【0004】従って、このような優れた特性を有する1
次元量子細線は、キャリアの高速性を利用した論理素
子、電子波の干渉を利用した量子効果素子、及び低閾値
電圧をもつレーザ等の発光素子などへの応用が検討され
ている。
Therefore, 1 having such excellent characteristics
Dimensional quantum wires are being studied for application to logic elements that utilize the high-speed properties of carriers, quantum effect elements that utilize the interference of electron waves, and light-emitting elements such as lasers having a low threshold voltage.

【0005】1次元量子細線はキャリアとして主に電子
を用いており、例えば、ポテンシャル障壁となるN型に
ドーピングした広禁止幅半導体(例えばN−AlGaA
s)にて、チャネルとなる狭禁止幅半導体(例えばGa
As,InGaAs)を取り囲み、更に、エッチングな
どにてチャネル幅を狭くして、電子の移動方向を1方向
のみに制限する構成として作成されている。この際、チ
ャネル幅を狭くする方法としては、以下に述べるような
方法が知られている。
The one-dimensional quantum wire mainly uses electrons as carriers. For example, a wide bandgap semiconductor (eg, N-AlGaA) doped with N-type as a potential barrier is used.
s), a narrow bandgap semiconductor (for example, Ga)
(As, InGaAs), and the channel width is narrowed by etching or the like to limit the electron movement direction to only one direction. At this time, the following method is known as a method of narrowing the channel width.

【0006】 レーザ光による多重干渉露光法、電子
ビームによる電子ビーム露光法などを用いて微細なパタ
ーンを形成し、そのパターンをマスクとしてエッチング
を行う方法。 集束イオンビームを用いて不純物原子を試料に選択
的に打ち込んで、チャネル以外の部分を高抵抗化する方
法。 異方性成長、選択成長などの結晶成長を利用する方
法。
A method in which a fine pattern is formed using a multiple interference exposure method using a laser beam, an electron beam exposure method using an electron beam, and the like, and etching is performed using the pattern as a mask. A method in which a focused ion beam is used to selectively implant impurity atoms into a sample to increase the resistance of parts other than the channel. Methods that utilize crystal growth such as anisotropic growth and selective growth.

【0007】[0007]

【発明が解決しようとする課題】上述したような細線を
形成する従来の方法では以下に示すような問題点があっ
て、良好な形成方法とは言いがたい。 に示すエッチングを用いる方法では、ドライエッチン
グを採用すると、加工による結晶欠陥がチャネルに生じ
て、キャリアの電気伝導特性が劣化する。また、レーザ
光のゆらぎ、レジスト分子の大きさ(通常100 Å程
度)、及びエッチング速度のばらつきなどに影響され
て、1000Å以下の幅の細線を精度良く作製することは困
難である。 に示す不純物を打ち込む方法では、チャネル部分に結
晶欠陥などのダメージが入りやすい。 に示す結晶成長を利用する方法では、不純物, 結晶欠
陥などが少ない良質のチャネルを形成することは困難で
ある。
The conventional method for forming the above-described fine line has the following problems, and cannot be said to be a good forming method. When dry etching is adopted in the method using the etching shown in (1), crystal defects are generated in the channel due to processing, and the electric conduction characteristics of the carrier deteriorate. Further, it is difficult to accurately manufacture a fine line having a width of 1000 Å or less due to fluctuations in laser light, size of resist molecule (usually about 100 Å), and variations in etching rate. In the method of implanting the impurities shown in (3), damage such as crystal defects is likely to occur in the channel portion. It is difficult to form a high-quality channel with few impurities and crystal defects by the method utilizing crystal growth shown in (3).

【0008】本発明は斯かる事情に鑑みてなされたもの
であり、結晶欠陥などのダメージを受けることなく、し
かも閉じ込め寸法が短い1次元量子細線を容易に形成す
ることができる量子細線の形成方法を提供することを目
的とする。
The present invention has been made in view of the above circumstances, and is a method of forming a quantum wire which can easily form a one-dimensional quantum wire having a short confinement dimension without being damaged by crystal defects or the like. The purpose is to provide.

【0009】[0009]

【課題を解決するための手段】本願の第1発明に係る量
子細線の形成方法は、化合物半導体を用いて1次元量子
細線を形成する方法において、クエン酸・過酸化水素系
のエッチャントを用いて、前記化合物半導体の結晶の
(111)面が現れる条件でエッチングを行い、(11
1)面及び(100)面によってキャリアを閉じ込めて
1次元量子細線を形成することを特徴とする。
A method for forming a quantum wire according to a first aspect of the present invention is a method for forming a one-dimensional quantum wire using a compound semiconductor, wherein a citric acid / hydrogen peroxide-based etchant is used. , Etching under the condition that the (111) plane of the crystal of the compound semiconductor appears,
It is characterized in that carriers are confined by the 1) plane and the (100) plane to form a one-dimensional quantum wire.

【0010】本願の第2発明に係る量子細線の形成方法
は、第1発明において、前記クエン酸・過酸化水素系の
エッチャントとして、クエン酸:過酸化水素=3:1程
度のエッチャントを用いることを特徴とする。
In the method for forming a quantum wire according to the second invention of the present application, in the first invention, an etchant of citric acid: hydrogen peroxide = about 3: 1 is used as the citric acid / hydrogen peroxide-based etchant. Is characterized by.

【0011】[0011]

【作用】第1発明では、クエン酸・過酸化水素系エッチ
ャントを用いたウェットエッチングであるので、チャネ
ル部分にダメージが入りにくい。また、エッチングの進
行に伴って選択的に(111)面が現れて、他の面は現
れなくなるので、例えばマスク寸法にゆらぎがあって
も、エッチングの進行につれて細線の幅のゆらぎは減少
する。
In the first aspect of the invention, since the wet etching uses the citric acid / hydrogen peroxide type etchant, the channel portion is less likely to be damaged. Further, as the etching progresses, the (111) plane selectively appears and the other surfaces do not appear. Therefore, for example, even if there is a fluctuation in the mask size, the fluctuation in the width of the fine line decreases as the etching progresses.

【0012】第2発明では、クエン酸:過酸化水素=
3:1程度のエッチャントを用いるので、より確実に
(111)面のみが現れる。
In the second invention, citric acid: hydrogen peroxide =
Since an etchant of about 3: 1 is used, only the (111) plane appears more reliably.

【0013】[0013]

【実施例】以下、本発明をその実施例を示す図面に基づ
いて具体的に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to the drawings showing the embodiments.

【0014】図1は、本発明の形成方法の手順を細線断
面((0−11)面)方向から見た断面図であり、〈0
−11〉方向に伸びる、つまり〈0−11〉方向にのみ
電子の自由度がある1次元量子細線を形成する場合につ
いて説明する。
FIG. 1 is a cross-sectional view of the procedure of the forming method of the present invention as seen from the direction of the fine line cross section ((0-11) plane).
The case of forming a one-dimensional quantum thin wire that extends in the −11> direction, that is, has a degree of electron freedom only in the <0-11> direction will be described.

【0015】まず、GaAs(100)基板(図示せ
ず)上に、MBE法などのエピタキシャル成長法を用い
て、GaAs層1,N−AlGaAs層2をこの順に積
層形成し、さらに、電子ビーム露光法などを用いて、幅
1000Å程度, 長さは任意のマスクパターン3をN−Al
GaAs層2上に形成する(図1(a))。ここでマス
クパターン3としては、レジスト,SiO2 薄膜などを
用いる。次に、ウェットエッチングなどを利用して、N
−AlGaAs層2をマスクパターン3と同じ幅にエッ
チングする(図1(b))。
First, a GaAs layer 1 and an N-AlGaAs layer 2 are formed in this order on a GaAs (100) substrate (not shown) by an epitaxial growth method such as MBE, and then an electron beam exposure method is used. Width using
About 1000 Å, length is arbitrary mask pattern 3 N-Al
It is formed on the GaAs layer 2 (FIG. 1A). Here, as the mask pattern 3, a resist, a SiO 2 thin film, or the like is used. Next, using wet etching or the like, N
-AlGaAs layer 2 is etched to have the same width as mask pattern 3 (FIG. 1 (b)).

【0016】次に、クエン酸・過酸化水素系エッチャン
ト(クエン酸:過酸化水素=3:1)を用い、エッチン
グ温度20℃にて、〈100〉方向に2000Å程度だけGa
As層1をエッチングする(図1(c))。このエッチ
ング条件では、〈100〉方向に対して約70Å/秒のエ
ッチング速度となり、表面側には(111)B面(As
面)が現れ、基板側には(111)A面が現れる。そし
て、N−AlGaAs層2と(111)B面とにより囲
まれて電子が1次元に閉じ込められる細線4が得られ
る。
Next, using a citric acid / hydrogen peroxide type etchant (citric acid: hydrogen peroxide = 3: 1), at an etching temperature of 20 ° C., Ga of about 2000 Å in the <100> direction.
The As layer 1 is etched (FIG. 1C). Under this etching condition, the etching rate is about 70Å / sec in the <100> direction, and the (111) B plane (As
Surface) and the (111) A surface appears on the substrate side. Then, a thin wire 4 surrounded by the N-AlGaAs layer 2 and the (111) B plane and confining electrons one-dimensionally is obtained.

【0017】この場合の細線4の実効的な閉じ込め寸法
は、マスクパターン3の幅寸法が1000Åであるので、約
500 Åとなる。この理由について図2を参照して説明す
る。図2に示すように、キャリア(電子)が閉じ込めら
れる寸法は、閉じ込めポテンシャル(実線にて示す領
域)に内接する円程度の大きさ(破線にて示す領域)で
ある。本実施例のように、断面形状が3角形のチャネル
の場合は、断面形状が4角形のチャネルの場合と比較し
て、その1辺の大きさが約2倍(図2でLw=2L
w′)のときに同程度の閉じ込め寸法となる。キャリア
(電子)が(100)面と(111)面とで閉じ込めら
れる場合、本実施例のようにマスクパターン3の加工幅
(図2の上辺の長さ)を1000Åとしたときと等価の閉じ
込め寸法を断面が4角形のチャネルで得るためにはその
マスク幅は500 Å程度としなければならない。
In this case, the effective confinement dimension of the thin wire 4 is approximately because the width dimension of the mask pattern 3 is 1000Å.
It will be 500 Å. The reason for this will be described with reference to FIG. As shown in FIG. 2, the size in which carriers (electrons) are confined is about the size of a circle (region indicated by broken line) inscribed in the confinement potential (region indicated by solid line). In the case of a channel having a triangular cross-sectional shape as in this embodiment, the size of one side thereof is about twice as large as that of a channel having a rectangular cross-sectional shape (Lw = 2L in FIG. 2).
In the case of w '), the confined size is about the same. When carriers (electrons) are confined in the (100) plane and the (111) plane, the confinement equivalent to that when the processing width (the length of the upper side of FIG. 2) of the mask pattern 3 is 1000Å as in the present embodiment. The mask width must be about 500Å in order to obtain dimensions in a channel with a square cross section.

【0018】本実施例のエッチング条件では、GaAs
のAlGaAsに対するエッチング速度比は 160:1で
あり、N−AlGaAs層2はほとんどエッチングされ
ない。また、GaAs層1の(111)A面, (11
1)B面, (100)面においてエッチング速度が異な
るので、図1(c)に示すような形状が現れ、(11
1)A面, (111)B面の厚さLA ,LB に差異が見
られる。上述のエッチング条件では、LA :LB =2:
1となり、また断面3角形の底角θはθ=54.7°とな
る。
Under the etching conditions of this embodiment, GaAs is used.
The etching rate ratio of Al to AlGaAs is 160: 1, and the N-AlGaAs layer 2 is hardly etched. In addition, the (111) A plane of the GaAs layer 1, (11
1) Since the etching rates are different between the B surface and the (100) surface, the shape shown in FIG.
1) A plane, (111) the thickness L A of the B side, the difference in L B seen. Under the above etching conditions, L A : L B = 2:
1, and the base angle θ of the triangular cross section is θ = 54.7 °.

【0019】ところで、図3に示すようにマスクパター
ン3の幅寸法にゆらぎがあった場合でも、エッチングの
進行につれて、エッチング面として(111)面が現
れ、それ以外の面は現れなくなるので、マスクパターン
3の幅寸法のゆらぎが修正されて、線幅のゆらぎが少な
い細線4を形成できる。
Even if the width of the mask pattern 3 fluctuates as shown in FIG. 3, as the etching progresses, the (111) plane appears as the etching surface and the other surfaces do not appear. The fluctuation of the width dimension of the pattern 3 is corrected, and the thin line 4 with less fluctuation of the line width can be formed.

【0020】図4は、本発明の他の実施例を示す断面図
である。上下のN−AlGaAs層2,2間にGaAs
層1を挟み込んだ構成をなし、上側のN−AlGaAs
層2はパターニングされ、下側のN−AlGaAs層2
はパターニングされていない。このような例では、クエ
ン酸・過酸化水素系エッチャント(クエン酸:過酸化水
素=3:1)を用いてエッチングを施すと、GaAs層
1はN−AlGaAs層2に対してエッチング速度比が
極めて大きいので、図4に示すような2つの並行する細
線4a, 4bを容易に形成することができる。
FIG. 4 is a sectional view showing another embodiment of the present invention. GaAs between the upper and lower N-AlGaAs layers 2 and 2
The layer 1 is sandwiched between the upper N-AlGaAs
Layer 2 is patterned to form the lower N-AlGaAs layer 2
Are not patterned. In such an example, when etching is performed using a citric acid / hydrogen peroxide type etchant (citric acid: hydrogen peroxide = 3: 1), the GaAs layer 1 has an etching rate ratio with respect to the N-AlGaAs layer 2. Since it is extremely large, it is possible to easily form two parallel thin wires 4a and 4b as shown in FIG.

【0021】この実施例において、GaAs層1の厚さ
Ltと上側のN−AlGaAs層2のパターン幅Lwと
の比を、Lt:Lw=3:21/2 とすると、閉じ込め寸
法比が2:1である2つの並行する細線4a, 4bを精度良
く形成できる。このような2つの並行細線のチャネル構
成は、2つのチャネル間をキャリアが移動することによ
って動作する方向性結合器のチャネルとして利用でき
る。
In this embodiment, if the ratio of the thickness Lt of the GaAs layer 1 to the pattern width Lw of the upper N-AlGaAs layer 2 is Lt: Lw = 3: 2 1/2 , the confinement dimension ratio is 2. It is possible to accurately form the two parallel thin lines 4a and 4b of 1: 1. Such a channel configuration of two parallel thin lines can be used as a channel of a directional coupler that operates by moving a carrier between two channels.

【0022】以上のように、図4に示す実施例では、G
aAsとAlGaAsとのエッチング速度の差を利用
し、下側のN−AlGaAs層2をエッチングストッパ
層として作用させ、GaAs層1の膜厚と上側のN−A
lGaAs層2のパターン幅とを適当な寸法に設定する
ことにより、極めて精度が高い閉じ込め寸法を有する並
行量子細線を形成できる。
As described above, in the embodiment shown in FIG.
Utilizing the difference in etching rate between aAs and AlGaAs, the lower N-AlGaAs layer 2 is made to act as an etching stopper layer, and the film thickness of the GaAs layer 1 and the upper N-A
By setting the pattern width of the 1GaAs layer 2 to an appropriate dimension, a parallel quantum wire having a confinement dimension with extremely high precision can be formed.

【0023】[0023]

【発明の効果】以上のように、本発明の量子細線の形成
方法では、ウェットエッチングを利用するので、形成す
る細線に欠陥などのダメージが入りにくく、良質な1次
元量子細線を形成できる。また、閉じ込め断面形状が3
角形であるので、実効的な閉じ込め寸法がマスク寸法の
半分程度になり、より幅が狭い量子細線を形成できる。
また、選択的に(111)面が現れるので、エッチング
の進行に従って、マスクのゆらぎに影響された細線の凹
凸が直線状に修正されて、線幅のゆらぎが少ない量子細
線を形成できる。
As described above, since the method for forming a quantum wire of the present invention uses wet etching, it is possible to form a high-quality one-dimensional quantum wire without causing damage such as defects in the thin wire to be formed. Also, the confinement cross-sectional shape is 3
Since it is rectangular, the effective confinement dimension is about half the mask dimension, and a narrower quantum wire can be formed.
Further, since the (111) plane appears selectively, the unevenness of the fine line affected by the fluctuation of the mask is corrected into a linear shape as the etching progresses, so that the quantum thin line with less fluctuation of the line width can be formed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の量子細線の形成方法の手順を示す断面
図である。
FIG. 1 is a cross-sectional view showing a procedure of a method for forming a quantum wire according to the present invention.

【図2】量子細線における閉じ込め形状と閉じ込め寸法
との関係を示す概念図である。
FIG. 2 is a conceptual diagram showing a relationship between a confinement shape and a confinement dimension in a quantum wire.

【図3】量子細線の幅ゆらぎが修正される状態を示す概
念図である。
FIG. 3 is a conceptual diagram showing a state in which the width fluctuation of a quantum wire is corrected.

【図4】本発明の他の実施例を示す断面図である。FIG. 4 is a sectional view showing another embodiment of the present invention.

【符号の説明】 1 GaAs層 2 N−AlGaAs層 3 マスクパターン 4,4a, 4b 細線[Explanation of symbols] 1 GaAs layer 2 N-AlGaAs layer 3 Mask pattern 4, 4a, 4b Fine line

フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/338 29/812 29/804 Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI technical display location H01L 21/338 29/812 29/804

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 化合物半導体を用いて1次元量子細線を
形成する方法において、クエン酸・過酸化水素系のエッ
チャントを用いて、前記化合物半導体の結晶の(11
1)面が現れる条件でエッチングを行い、(111)面
及び(100)面によってキャリアを閉じ込めて1次元
量子細線を形成することを特徴とする量子細線の形成方
法。
1. A method for forming a one-dimensional quantum wire using a compound semiconductor, wherein a (11) crystal of the compound semiconductor is formed using a citric acid / hydrogen peroxide-based etchant.
1) A method for forming a quantum thin line, characterized in that etching is performed under the condition that a plane appears, and carriers are confined by the (111) plane and the (100) plane to form a one-dimensional quantum thin line.
【請求項2】 前記クエン酸・過酸化水素系のエッチャ
ントとして、クエン酸:過酸化水素=3:1程度のエッ
チャントを用いることを特徴とする請求項1記載の量子
細線の形成方法。
2. The method for forming a quantum wire according to claim 1, wherein an etchant of citric acid: hydrogen peroxide = about 3: 1 is used as the citric acid / hydrogen peroxide-based etchant.
JP9303193A 1993-04-20 1993-04-20 Method for forming quantum wire Pending JPH06310425A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9303193A JPH06310425A (en) 1993-04-20 1993-04-20 Method for forming quantum wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9303193A JPH06310425A (en) 1993-04-20 1993-04-20 Method for forming quantum wire

Publications (1)

Publication Number Publication Date
JPH06310425A true JPH06310425A (en) 1994-11-04

Family

ID=14071133

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9303193A Pending JPH06310425A (en) 1993-04-20 1993-04-20 Method for forming quantum wire

Country Status (1)

Country Link
JP (1) JPH06310425A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6093657A (en) * 1996-05-20 2000-07-25 Nec Corporation Fabrication process of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6093657A (en) * 1996-05-20 2000-07-25 Nec Corporation Fabrication process of semiconductor device
KR100288173B1 (en) * 1996-05-20 2001-06-01 가네꼬 히사시 Semiconductor device manufacturing method

Similar Documents

Publication Publication Date Title
JP3060973B2 (en) Manufacturing method of gallium nitride based semiconductor laser using selective growth method and gallium nitride based semiconductor laser
Meier et al. Problems related to the formation of lateral p–n junctions on channeled substrate (100) GaAs for lasers
JPH05136173A (en) Manufacture of compound semiconductor quantum device and product manufactured by method thereof
JPS6310517A (en) Manufacture of semiconductor construction
JP3188728B2 (en) Method for producing quantum wires by photoinduced evaporation enhancement during in situ epitaxial growth
Dzurko et al. Temperature engineered growth of low‐threshold quantum well lasers by metalorganic chemical vapor deposition
JPS63316484A (en) Quantum effect semiconductor device
US4974036A (en) Semiconductor superlattice heterostructures on nonplanar substrates
Lee et al. Photoluminescence studies of selective‐area molecular beam epitaxy of GaAs film on Si substrate
JPH06310425A (en) Method for forming quantum wire
JPS6289383A (en) Semiconductor laser
JPS60145687A (en) Semiconductor laser
JPH04111487A (en) Manufacture of semiconductor layer
JPH04280629A (en) Manufacturing method of film stepwise structure and semiconductor device using the same
Richard et al. Native‐oxide coupled‐stripe Al y Ga1− y As‐GaAs‐In x Ga1− x As quantum well heterostructure lasers
JPH0233972A (en) Semiconductor quantum wire structure
JP2924699B2 (en) Single electronic device and method of manufacturing the same
JPH0555141A (en) Creation of semiconductor quantum microline
JPS62108592A (en) Manufacture of semiconductor
JPH06196819A (en) Semiconductor optical amplifying element and manufacturethereof thereof
JPH0817241B2 (en) Thin wire field effect transistor and method of manufacturing the same
JP2717125B2 (en) Method for manufacturing semiconductor quantum well structure
KR100349662B1 (en) Current blocking structure using oxide layer and method for fabrication of quantum dot laser diode using the same
GB2109155A (en) Semiconductor laser manufacture
JPS63136590A (en) Semiconductor superlattice