JPH06289413A - Liquid crystal display device - Google Patents
Liquid crystal display deviceInfo
- Publication number
- JPH06289413A JPH06289413A JP7986593A JP7986593A JPH06289413A JP H06289413 A JPH06289413 A JP H06289413A JP 7986593 A JP7986593 A JP 7986593A JP 7986593 A JP7986593 A JP 7986593A JP H06289413 A JPH06289413 A JP H06289413A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- driver circuit
- display device
- crystal display
- element substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Liquid Crystal (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は２枚の基板間に封入され
た液晶を用いて表示を行う、ドライバー回路一体形成の
アクティブマトリクス型液晶表示装置の構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of an active matrix type liquid crystal display device integrally formed with a driver circuit for displaying by using liquid crystal sealed between two substrates.
【０００２】[0002]
【従来の技術】従来のドライバー回路内蔵アクティブマ
トリクス型液晶表示装置（以下、単に液晶表示装置とす
る）の一例を図１を用いて説明する。図１（ａ）は従来
の液晶表示装置の概略の外観図であり、図１（ｂ）は図
１（ａ）のＡ−Ａにおける縦断面図、図１（ｃ）は図１
（ａ）のＢ−Ｂ縦断面図である。素子基板１０１上には
表示領域１０２、走査線及び信号線のドライバー回路１
０３及び１０４、外部接続端子１０５が形成され、対向
基板１０６がシール１０７で素子基板１０１に接合さ
れ、素子基板１０１と対向基板１０６の間に液晶１０８
が封入されている。対向基板１０６上には共通電極１０
９が設けられ、この共通電極１０９は素子基板１０１上
のコモン端子１１０に導通剤１１１で接続されている。
また、対向基板１０６上には遮光層１１２が設けられて
いる。素子基板１０１の表示領域１０２には、画素駆動
トランジスタ１１３が設けられ、画素電極１１４が画素
駆動トランジスタ１１３に接続されている。画素駆動ト
ランジスタ１１３及びドライバー回路１０３（１０４）
のゲート電極と走査線を含む第１の配線層１１５は層間
絶縁膜１１６で第２の配線層１１７と隔てられ、必要な
箇所で第２の配線層１１７と接続されている。第２の配
線層１１７は表示領域の信号線を含み、画素電極１１４
と同層に設けられている。第２の配線層１１７の上層は
液晶保護絶縁膜１１８で第２の配線層１１７の信号が液
晶に直接漏れるのを防ぐために設けられる。液晶保護絶
縁膜１１８は画素電極１１４上は通常取り除いておく。
素子基板１０１上と対向基板１０６上には更に配向膜１
１９がある。2. Description of the Related Art An example of a conventional active matrix type liquid crystal display device with a built-in driver circuit (hereinafter, simply referred to as a liquid crystal display device) will be described with reference to FIG. 1A is a schematic external view of a conventional liquid crystal display device, FIG. 1B is a vertical sectional view taken along the line AA of FIG. 1A, and FIG.
It is a BB vertical cross-sectional view of (a). The driver circuit 1 for the display region 102, the scanning lines and the signal lines is provided on the element substrate 101.
03 and 104, the external connection terminal 105 is formed, the counter substrate 106 is bonded to the element substrate 101 by the seal 107, and the liquid crystal 108 is provided between the element substrate 101 and the counter substrate 106.
Is enclosed. The common electrode 10 is provided on the counter substrate 106.
9 is provided, and the common electrode 109 is connected to the common terminal 110 on the element substrate 101 by the conducting agent 111.
Further, a light shielding layer 112 is provided on the counter substrate 106. A pixel drive transistor 113 is provided in the display region 102 of the element substrate 101, and a pixel electrode 114 is connected to the pixel drive transistor 113. Pixel driving transistor 113 and driver circuit 103 (104)
The first wiring layer 115 including the gate electrode and the scanning line is separated from the second wiring layer 117 by the interlayer insulating film 116, and is connected to the second wiring layer 117 at a necessary position. The second wiring layer 117 includes a signal line in the display area, and includes the pixel electrode 114.
It is provided in the same layer as. An upper layer of the second wiring layer 117 is a liquid crystal protective insulating film 118, which is provided to prevent signals of the second wiring layer 117 from directly leaking to the liquid crystal. The liquid crystal protective insulating film 118 is usually removed on the pixel electrode 114.
An alignment film 1 is further formed on the element substrate 101 and the counter substrate 106.
There is 19.
【０００３】図１の液晶表示装置では画素電極１１４と
信号線（第２の配線層１１７）が同層にあり、短絡を避
けるため有る程度の間隔を確保する必要があり、その間
隔の部分は表示に寄与しない。これは液晶表示装置の高
開口率化や高精細化の妨げとなる。この問題を解決する
ため、信号線上に更に層間絶縁膜を設け、この上層に画
素電極を設ける事で画素電極と信号線を絶縁し、画素電
極と信号線の距離を小さくする、あるいは信号線と画素
電極を重ねるといった方法がとられる場合がある。上記
の信号線上の層間絶縁膜はＳｉＯ２あるいはポリイミド
等の有機薄膜が用いられる。信号線上の層間絶縁膜は、
その形成方法の簡便さ、誘電率の小ささ（信号線と画素
電極の結合容量を小さくするため）、ストレスが小さい
事による厚膜化の容易さ（誘電率と同じ理由による）、
さらには膜表面の平坦性をＳｉＯ２よりも良くしやすい
ので表示品質が良い等の観点からポリイミドを用いるの
が有利である。In the liquid crystal display device shown in FIG. 1, the pixel electrode 114 and the signal line (second wiring layer 117) are in the same layer, and it is necessary to secure a certain distance to avoid a short circuit. Does not contribute to the display. This hinders the high aperture ratio and high definition of the liquid crystal display device. In order to solve this problem, an interlayer insulating film is further provided on the signal line, and a pixel electrode is provided on the upper layer to insulate the pixel electrode from the signal line and reduce the distance between the pixel electrode and the signal line. A method of overlapping pixel electrodes may be adopted. As the interlayer insulating film on the signal line, an organic thin film such as SiO2 or polyimide is used. The interlayer insulating film on the signal line is
The formation method is simple, the dielectric constant is small (to reduce the coupling capacitance between the signal line and the pixel electrode), the stress is small, and the film thickness is easy (for the same reason as the dielectric constant).
Further, since the flatness of the film surface is easily made better than that of SiO2, it is advantageous to use polyimide from the viewpoint of good display quality.
【０００４】[0004]
【発明が解決しようとする課題】図１のような従来の液
晶表示装置では、ドライバー回路がシールよりも外側に
あるため装置自体が大きくなってしまい、また、素子基
板と対向基板の接合後の製造途上における取扱い中にド
ライバー回路を傷つけ易く故障を招き易いという問題が
あった。また、ドライバー回路がシールよりも外側にあ
るため、シールを横切る配線（信号線と走査線）が多
く、ドライバー回路から表示領域につながる配線とシー
ルの界面を通じて水分が液晶中に浸入し、液晶を劣化さ
せるという問題があった。In the conventional liquid crystal display device as shown in FIG. 1, since the driver circuit is located outside the seal, the size of the device itself becomes large. Moreover, after the element substrate and the counter substrate are joined, There has been a problem that the driver circuit is easily damaged during handling during manufacturing and is likely to cause a failure. In addition, since the driver circuit is outside the seal, there are many wirings (signal lines and scanning lines) that cross the seal, and moisture enters the liquid crystal through the interface between the driver circuit and the display area and the seal, and There was a problem of deterioration.
【０００５】[0005]
【課題を解決するための手段】本発明の液晶表示装置
は、素子基板上に形成された素子駆動薄膜トランジス
タ、信号線及び走査線を有機膜で覆い、前記有機膜上に
画素電極を設ける事で信号線と画素電極を絶縁し、ドラ
イバー回路を素子基板と対向基板を接合するシールより
画素電極側に形成し、ドライバー回路上には有機膜を設
けず、かつドライバー回路に対向する部分の対向基板上
の共通電極が無いことを特徴とする。In the liquid crystal display device of the present invention, an element driving thin film transistor formed on an element substrate, a signal line and a scanning line are covered with an organic film, and a pixel electrode is provided on the organic film. The signal line is insulated from the pixel electrode, the driver circuit is formed on the pixel electrode side of the seal that joins the element substrate and the counter substrate, the organic film is not provided on the driver circuit, and the counter substrate facing the driver circuit It is characterized in that there is no common electrode above.
【０００６】[0006]
【実施例】以下に、本発明のドライバー回路内蔵アクテ
ィブマトリクス型液晶表示装置とその製造工程について
実施例に基づき詳しく説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The active matrix type liquid crystal display device with a built-in driver circuit of the present invention and the manufacturing process thereof will be described in detail below with reference to embodiments.
【０００７】図２に本実施例の液晶表示装置の構造を示
す。図２（ａ）は本実施例の液晶表示装置の平面図であ
り、図２（ｂ）、図２（ｃ）はそれぞれ図２（ａ）のＡ
−Ａ、Ｂ−Ｂにおける縦断面図である。透明な素子基板
２０１上には表示領域２０２、ドライバー回路２０３、
外部接続端子２０４、コモン端子２０５およびこれらを
接続する配線等が形成されており、シール２０６によっ
て素子基板２０１と対向基板２０７が接合され、両基板
間に液晶２０８が封入されている。ドライバー回路２０
３はシール２０６と表示領域２０２の間に設けてある。
こうすることでドライバー回路２０３が表示領域２０２
より外側にある場合に比べ液晶表示装置を小型にでき
る。表示領域２０２には画素駆動トランジスタ２０９、
画素電極２１０、画素駆動トランジスタ２０９及びドラ
イバー回路２０３のゲート電極と共に第１の配線層２１
１に含まれる走査線、第２の配線層２１２に含まれる信
号線が形成され、第１の配線層２１１と第２の配線層２
１２は第１の層間絶縁膜２１３で、また、第２の配線層
２１２と画素電極２１０は第２の層間絶縁膜２１４で絶
縁されている。第２の層間絶縁膜２１４は、ドライバー
回路２０３上とシール２０６の下の部分を取り除いてお
く。これは、主にポリイミドが用いられる第２の層間絶
縁膜２１４がドライバー回路２０３の配線の電界によっ
て恒常的な分極を起こし、長期的には大きな面積に及ん
で液晶の配向を乱すことによる表示品質の劣化を防ぐこ
とが目的であると共に、ポリイミドを通じて水分や不純
物が液晶中に浸入するのをふせぐ。素子基板２０１上に
は、さらに液晶を配向するための配向膜２１５が形成さ
れている。コモン端子２０５と対向基板２０７上の共通
電極２１６は導通剤２１７で電気的に接続され共通電極
２１６の電位が制御される。対向基板２０７上には共通
電極２１６の他に配向膜２１５と必要に応じて遮光膜２
１８及びカラーフィルターが予め形成されている。（本
実施例ではカラーフィルターは省略してある。）対向基
板２０７上の共通電極２１６は、シール２０６と重なる
部分とドライバー回路２０３に対向する部分を取り除い
ておく。こうすることで素子基板２０１上のコモン端子
２０５以外の配線と共通電極２１６が、シール２０６中
やドライバー回路２０３上のごみ等により短絡すること
を防ぐ。FIG. 2 shows the structure of the liquid crystal display device of this embodiment. FIG. 2A is a plan view of the liquid crystal display device of this embodiment, and FIGS. 2B and 2C are A of FIG. 2A.
It is a longitudinal cross-sectional view in -A, BB. On the transparent element substrate 201, the display area 202, the driver circuit 203,
An external connection terminal 204, a common terminal 205, a wiring connecting these, and the like are formed, the element substrate 201 and the counter substrate 207 are bonded by a seal 206, and a liquid crystal 208 is sealed between both substrates. Driver circuit 20
3 is provided between the seal 206 and the display area 202.
By doing so, the driver circuit 203 is changed to the display area 202.
The liquid crystal display device can be made smaller than the case where the liquid crystal display device is located outside. In the display area 202, the pixel drive transistor 209,
The first wiring layer 21 together with the pixel electrode 210, the pixel drive transistor 209, and the gate electrode of the driver circuit 203.
1 and the signal lines included in the second wiring layer 212 are formed, and the first wiring layer 211 and the second wiring layer 2 are formed.
12 is insulated by the first interlayer insulating film 213, and the second wiring layer 212 and the pixel electrode 210 are insulated by the second interlayer insulating film 214. The second interlayer insulating film 214 is formed by removing the portion above the driver circuit 203 and below the seal 206. This is because the second interlayer insulating film 214, which is mainly made of polyimide, causes constant polarization due to the electric field of the wiring of the driver circuit 203, and in the long term, the liquid crystal orientation is disturbed over a large area and the display quality is disturbed. The purpose is to prevent the deterioration of the liquid crystal and prevent moisture and impurities from entering the liquid crystal through the polyimide. An alignment film 215 for further aligning the liquid crystal is formed on the element substrate 201. The common terminal 205 and the common electrode 216 on the counter substrate 207 are electrically connected by the conducting agent 217, and the potential of the common electrode 216 is controlled. On the counter substrate 207, in addition to the common electrode 216, an alignment film 215 and a light-shielding film 2 if necessary.
18 and a color filter are formed in advance. (The color filter is omitted in this embodiment.) The common electrode 216 on the counter substrate 207 has the part overlapping the seal 206 and the part facing the driver circuit 203 removed. By doing so, it is possible to prevent the wiring other than the common terminal 205 on the element substrate 201 and the common electrode 216 from being short-circuited by dust in the seal 206 or the driver circuit 203.
【０００８】次に、本実施例の液晶表示装置の製造工程
を図３を用いて説明する。図３は本実施例の液晶表示装
置の構造を説明した図２（ｂ）に相当する部分の縦断面
で製造工程を説明する図である。Next, the manufacturing process of the liquid crystal display device of this embodiment will be described with reference to FIG. FIG. 3 is a diagram illustrating a manufacturing process with a vertical cross section of a portion corresponding to FIG. 2B for explaining the structure of the liquid crystal display device of the present embodiment.
【０００９】まず、素子基板３０１上に画素駆動トラン
ジスタ３０２、ドライバー回路３０３を形成する。走査
線及び画素駆動トランジスタ３０２とドライバー回路３
０３のゲート電極を含む第１の配線層３０４、第１の層
間絶縁膜３０５、信号線を含む第２の配線層３０６をこ
の時形成する（図３（ａ））。本実施例では画素トラン
ジスタ３０２とドライバー回路３０３は多結晶シリコン
薄膜トランジスタで構成される。第１の配線層３０４に
は多結晶シリコンを用いるが、金属シリサイドあるいは
金属を用いても良く、第１の層間絶縁膜３０５はシリコ
ン酸化膜（ＳｉＯ2）かシリコン窒化膜（Ｓｉ3Ｎ4）、
あるいはそれらの多層膜である。第２の配線層３０６に
は通常アルミニウム（Ａｌ）合金（銅とシリコンを含
む）を用いる。First, the pixel driving transistor 302 and the driver circuit 303 are formed on the element substrate 301. Scanning line / pixel driving transistor 302 and driver circuit 3
A first wiring layer 304 including a gate electrode of No. 03, a first interlayer insulating film 305, and a second wiring layer 306 including a signal line are formed at this time (FIG. 3A). In this embodiment, the pixel transistor 302 and the driver circuit 303 are composed of polycrystalline silicon thin film transistors. Polycrystalline silicon is used for the first wiring layer 304, but metal silicide or metal may be used, and the first interlayer insulating film 305 is a silicon oxide film (SiO 2 ) or a silicon nitride film (Si 3 N 4 ). ,
Alternatively, it is a multilayer film of them. An aluminum (Al) alloy (including copper and silicon) is usually used for the second wiring layer 306.
【００１０】次に、素子基板３０１上に第２の層間絶縁
膜３０７を形成し、その上に画素電極３０８を形成し、
画素駆動トランジスタ３０２に第２の層間絶縁膜３０７
に開けたコンタクト孔を通じて接続する。さらに配向膜
３０９を形成する（図３（ｂ））。図３（ｂ）の工程を
より詳しく説明すると、本実施例では第２の層間絶縁膜
３０７（ここではポリイミドである）をスピンコートで
塗布成膜した後、画素電極３０８と画素トランジスタ３
０２とを接続するコンタクト孔をフォトリソグラフ法で
形成するが、この時第２の配線層３０６が露出しない様
にする。即ちドライバー回路３０３の上やシールの下に
なる部分にはこの時点ではまだ第２の層間絶縁膜３０７
が残っている。次に画素電極３０８を形成し、その後ド
ライバー回路３０３の上とシールの下になる部分の第２
の層間絶縁膜３０７を取り除く。これは画素電極３０８
に酸化インジウムスズ（ＩＴＯ）を用い、そのエッチン
グ成形に王水系のエッチング剤（硝酸と塩酸を含む水溶
液）を用いる場合、第２の配線層３０６即ちＡｌが露出
しているとＩＴＯのエッチング剤にＡｌが侵されるため
である。ＩＴＯ（即ち画素電極３０８）を例えば水素や
メタンを含むプラズマ中でエッチング成形する場合には
第２の配線層３０６は露出していてもかまわないので、
第２の層間絶縁膜３０７成形工程を１回にすることもで
きる。第２の層間絶縁膜３０７はここではポリイミド薄
膜であるが、他の樹脂薄膜でも比較的耐熱性が高く、透
明であれば用いる事が出来る。また、第２の層間絶縁膜
３０７はポリイミドとＳｉＯ2あるいはＳｉ3Ｎ4との多
層膜でも良い。この場合にはドライバー回路３０３上及
びシール下となる第２の層間絶縁膜３０７のうち必ず取
り除く必要のあるのはポリイミドで他は残しても取り去
っても良い。また配向膜３０９もポリイミド薄膜であ
り、形成は印刷技術（フレキソ印刷等）を用いて行い、
液晶を配向するために必要な部分にのみ形成する。配向
膜３０９の形成はスピンコート法で行うこともある。Next, a second interlayer insulating film 307 is formed on the element substrate 301, and a pixel electrode 308 is formed thereon,
A second interlayer insulating film 307 is formed on the pixel driving transistor 302.
Connect through the contact hole opened in the. Further, an alignment film 309 is formed (FIG. 3B). The process of FIG. 3B will be described in more detail. In this embodiment, after the second interlayer insulating film 307 (here, polyimide) is formed by spin coating, the pixel electrode 308 and the pixel transistor 3 are formed.
A contact hole for connecting with 02 is formed by photolithography, but at this time, the second wiring layer 306 is not exposed. That is, the second interlayer insulating film 307 is not yet formed on the driver circuit 303 and the portion below the seal at this point.
Is left. Next, the pixel electrode 308 is formed, and then the second portion of the portion above the driver circuit 303 and below the seal is formed.
The interlayer insulating film 307 of is removed. This is the pixel electrode 308
When indium tin oxide (ITO) is used as the material and an aqua regia-based etching agent (aqueous solution containing nitric acid and hydrochloric acid) is used for the etching molding, if the second wiring layer 306, that is, Al is exposed, the etching agent becomes ITO. This is because Al is attacked. Since the second wiring layer 306 may be exposed when the ITO (that is, the pixel electrode 308) is formed by etching in plasma containing hydrogen or methane, for example,
The second interlayer insulating film 307 forming step may be performed once. The second interlayer insulating film 307 is a polyimide thin film here, but other resin thin films having relatively high heat resistance and being transparent can be used. Also, the second interlayer insulating film 307 may be a multilayer film of polyimide and SiO 2 or Si 3 N 4 . In this case, it is necessary to remove the second interlayer insulating film 307 on the driver circuit 303 and under the seal, which is polyimide, and the others may be left or removed. The alignment film 309 is also a polyimide thin film, and is formed using a printing technique (flexographic printing or the like).
It is formed only in the portion necessary for aligning the liquid crystal. The alignment film 309 may be formed by spin coating.
【００１１】配向膜３０９を形成した素子基板３０１は
シール３１０で対向基板３１１と接合し、液晶３１２を
封入する（図３（ｃ））。さらに外部回路を外部接続端
子に接続して液晶表示装置を完成する。The element substrate 301 on which the alignment film 309 is formed is bonded to the counter substrate 311 with a seal 310, and a liquid crystal 312 is sealed (FIG. 3C). Further, an external circuit is connected to the external connection terminal to complete the liquid crystal display device.
【００１２】[0012]
【発明の効果】本発明の液晶表示装置では、信号線と画
素電極がポリイミドを層間絶縁膜として別層に形成され
ることで開口率を大きくすることが可能な上に、ポリイ
ミドはスピンコート法で形成されるので、素子基板表面
が平坦なため液晶の配向の乱れが無く高品質な表示が得
られる。さらに素子基板上のドライバー回路がシールよ
り表示領域側にあるためドライバー回路から画素領域に
延びる延べ数百本に及ぶ信号線や走査線がシールを横切
ることがなく、シールを横切る配線を外部接続端子から
ドライバー回路につながる電源線、クロック線、ビデオ
信号線など高々数十本と従来比べ格段に少なくできるの
で、シールを横切る配線とシール界面から浸入する水分
を格段に少なくでき、信頼性が高い。また、ドライバー
回路がシールの内側にあるのでドライバー回路がシール
の外にある場合に比べて装置を小型にできる効果があ
り、また素子基板と対向基板を接合した後の取扱い（例
えばダイシング工程）でドライバー回路を傷つけるよう
なこともない。In the liquid crystal display device of the present invention, the aperture ratio can be increased by forming the signal line and the pixel electrode in separate layers using polyimide as an interlayer insulating film, and the polyimide is spin-coated. Since the element substrate surface is flat, the liquid crystal orientation is not disturbed and high quality display can be obtained. Furthermore, because the driver circuit on the element substrate is on the display area side of the seal, hundreds of signal lines and scanning lines extending from the driver circuit to the pixel area do not cross the seal, and wiring that crosses the seal is connected from the external connection terminal. Power supply lines, clock lines, video signal lines, etc. connected to the driver circuit can be significantly reduced to tens of lines at most, so that water entering from the wiring crossing the seal and the seal interface can be significantly reduced, and the reliability is high. Also, because the driver circuit is inside the seal, there is an effect that the device can be made smaller than when the driver circuit is outside the seal, and it is possible to handle after bonding the element substrate and the counter substrate (for example, dicing process). It does not damage the driver circuit.
【図１】従来のドライバー回路内蔵のアクティブマトリ
クス型液晶表示装置の構造図。FIG. 1 is a structural diagram of a conventional active matrix type liquid crystal display device with a built-in driver circuit.
【図２】本発明のドライバー回路内蔵のアクティブマト
リクス型液晶表示装置の構造図。FIG. 2 is a structural diagram of an active matrix type liquid crystal display device incorporating a driver circuit of the present invention.
【図３】本発明のドライバー回路内蔵のアクティブマト
リクス型液晶表示装置の製造方法を説明する工程図。FIG. 3 is a process diagram illustrating a method for manufacturing an active matrix type liquid crystal display device having a driver circuit according to the present invention.
１０１、２０１、３０１ …素子基板 １０２、２０２ …表示領域 １０３、１０４、２０３、３０３…ドライバー回路 １０５、２０４ …外部接続端子 １０６、２０７、３１１ …対向基板 １０７、２０６、３１０ …シール １０８、２０８、３１２ …液晶 １０９、２１６ …共通電極 １１０、２０５ …コモン端子 １１１、２１７ …導通剤 １１２、２１８ …遮光層 １１３、２０９、３０２ …画素駆動トランジス
タ １１４、２１０、３０８ …画素電極 １１５、２１１、３０４ …第１の配線層 １１６ …層間絶縁膜 １１７、２１２、３０６ …第２の配線層 １１８ …液晶保護絶縁膜 １１９、２１５、３０９ …配向膜 ２１３、３０５ …第１の層間絶縁膜 ２１４、３０７ …第２の層間絶縁膜101, 201, 301 ... Element substrate 102, 202 ... Display area 103, 104, 203, 303 ... Driver circuit 105, 204 ... External connection terminal 106, 207, 311 ... Opposing substrate 107, 206, 310 ... Seal 108, 208, 312 ... Liquid crystal 109, 216 ... Common electrode 110, 205 ... Common terminal 111, 217 ... Conducting agent 112, 218 ... Shading layer 113, 209, 302 ... Pixel drive transistor 114, 210, 308 ... Pixel electrode 115, 211, 304 ... First wiring layer 116 ... Interlayer insulating film 117, 212, 306 ... Second wiring layer 118 ... Liquid crystal protective insulating film 119, 215, 309 ... Alignment film 213, 305 ... First interlayer insulating film 214, 307 ... 2 interlayer insulating film
Claims (2)
電極、前記画素電極のそれぞれに接続された画素駆動薄
膜トランジスタ、前記画素駆動薄膜トランジスタに接続
された一組の信号配線と一組の走査配線、さらに前記信
号配線及び走査配線をそれぞれ駆動するドライバー回路
を有する素子基板と、共通電極を有し前記素子基板に対
向する対向基板と、前記素子基板と前記対向基板の間に
封止した液晶からなるアクティブマトリクス型液晶表示
装置において、前記素子基板上の画素駆動用薄膜トラン
ジスタ上、前記信号配線上及び前記走査配線上に有機膜
があり、前記有機膜上に前記画素電極があり、前記ドラ
イバー回路が前記素子基板と前記対向電極とを接合する
と同時に液晶を封止するシール部より画素電極側にあ
り、前記ドライバー回路上及び前記シール部には前記有
機膜が無く、前記ドライバー回路に対向する部分には前
記対向基板上の前記共通電極が無いことを特徴とする液
晶表示装置。1. At least pixel electrodes arranged in a matrix, pixel driving thin film transistors connected to each of the pixel electrodes, a set of signal lines connected to the pixel driving thin film transistors, and a set of scanning lines, and further An element substrate having a driver circuit for driving each of the signal wiring and the scanning wiring, a counter substrate having a common electrode facing the element substrate, and an active matrix made of liquid crystal sealed between the element substrate and the counter substrate. Type liquid crystal display device, there is an organic film on the pixel driving thin film transistor on the element substrate, on the signal wiring and on the scanning wiring, the pixel electrode is on the organic film, and the driver circuit is the element substrate. And the counter electrode, and at the same time, is on the pixel electrode side of the seal portion that seals the liquid crystal, The liquid crystal display device which is the road and the sealing portion and the organic film is not, the portion opposed to the driver circuit, characterized in that there is no said common electrode on the counter substrate.
とする請求項１の液晶表示装置。2. The liquid crystal display device according to claim 1, wherein the organic film is a polyimide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07986593A JP3413239B2 (en) | 1993-04-06 | 1993-04-06 | Liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07986593A JP3413239B2 (en) | 1993-04-06 | 1993-04-06 | Liquid crystal display |
Related Child Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11363399A Division JPH11337968A (en) | 1999-04-21 | 1999-04-21 | Liquid crystal display device |
| JP2003003350A Division JP3803640B2 (en) | 2003-01-09 | 2003-01-09 | Liquid crystal display |
| JP2003003351A Division JP2003248237A (en) | 2003-01-09 | 2003-01-09 | Liquid crystal display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06289413A true JPH06289413A (en) | 1994-10-18 |
| JP3413239B2 JP3413239B2 (en) | 2003-06-03 |
Family
ID=13702104
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP07986593A Expired - Lifetime JP3413239B2 (en) | 1993-04-06 | 1993-04-06 | Liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3413239B2 (en) |
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980025065A (en) * | 1996-09-27 | 1998-07-06 | 순페이 야마자끼 | Electro-optical device and manufacturing method thereof |
| JP2004109372A (en) * | 2002-09-17 | 2004-04-08 | Seiko Epson Corp | Electrooptical device, method for manufacturing the same, and electronic appliance |
| US6768533B2 (en) | 2000-05-25 | 2004-07-27 | Seiko Epson Corporation | Liquid crystal device, manufacturing method therefor, and electronic apparatus |
| JP2004325967A (en) * | 2003-04-25 | 2004-11-18 | Sharp Corp | Display device |
| KR100440543B1 (en) * | 1997-08-01 | 2004-12-17 | 삼성전자주식회사 | Liquid crystal display element having a structure of covering the inside and the outside of seal lines with organic black matrices, specially related to removing short occurrence of upper/lower plates between a c/f substrate and a tft substrate while securing seal line reliability |
| US6859247B2 (en) | 2000-09-29 | 2005-02-22 | Seiko Epson Corporation | Electro-optical apparatus and projection-type display apparatus |
| JP2005128538A (en) * | 2003-10-20 | 2005-05-19 | Samsung Electronics Co Ltd | Lower substrate, display device having the same, and method for manufacturing the same |
| KR100505564B1 (en) * | 1997-08-25 | 2005-09-26 | 삼성전자주식회사 | Thin film transistor liquid crystal display and manufacturing method thereof |
| KR100561645B1 (en) * | 2003-10-13 | 2006-03-20 | 엘지.필립스 엘시디 주식회사 | Liquid Crystal Display Panel and Method of Fabricating the same |
| US7046312B2 (en) | 1995-12-19 | 2006-05-16 | Semiconductor Energy Laboratory Co., Ltd. | Active matrix liquid crystal display and method of fabricating same |
| WO2007020746A1 (en) * | 2005-08-15 | 2007-02-22 | Sharp Kabushiki Kaisha | Electro-optic device |
| US7333172B1 (en) | 1995-12-21 | 2008-02-19 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device having plurality of conductive layers between a substrate and sealing member and insulated by insulating film |
| JP2008165255A (en) * | 2008-03-26 | 2008-07-17 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
| WO2009087706A1 (en) * | 2008-01-09 | 2009-07-16 | Sharp Kabushiki Kaisha | Display device |
| JP2009230152A (en) * | 2009-06-04 | 2009-10-08 | Semiconductor Energy Lab Co Ltd | Method of manufacturing liquid crystal display |
| JP2011002855A (en) * | 2010-09-22 | 2011-01-06 | Semiconductor Energy Lab Co Ltd | Liquid crystal display |
| JP2011076099A (en) * | 2010-11-01 | 2011-04-14 | Nec Lcd Technologies Ltd | Display device |
| US8045125B2 (en) | 1997-05-22 | 2011-10-25 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device having a gap retaining member made of resin formed directly over the driver circuit |
| JP2012234213A (en) * | 2012-09-03 | 2012-11-29 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
| JP2013092808A (en) * | 2013-02-21 | 2013-05-16 | Nlt Technologies Ltd | Display device |
| JP2013200573A (en) * | 2013-06-05 | 2013-10-03 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
| JP2020030437A (en) * | 2009-10-30 | 2020-02-27 | 株式会社半導体エネルギー研究所 | Liquid crystal display device |
-
1993
- 1993-04-06 JP JP07986593A patent/JP3413239B2/en not_active Expired - Lifetime
Cited By (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7046312B2 (en) | 1995-12-19 | 2006-05-16 | Semiconductor Energy Laboratory Co., Ltd. | Active matrix liquid crystal display and method of fabricating same |
| US9316880B2 (en) | 1995-12-21 | 2016-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device |
| US8194224B2 (en) | 1995-12-21 | 2012-06-05 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device having particular conductive layers |
| US7333172B1 (en) | 1995-12-21 | 2008-02-19 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device having plurality of conductive layers between a substrate and sealing member and insulated by insulating film |
| US7956978B2 (en) | 1995-12-21 | 2011-06-07 | Semiconductor Energy Laboratory Co., Ltd. | Liquid-crystal display device having a particular conductive layer |
| US8665411B2 (en) | 1995-12-21 | 2014-03-04 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device having particular conductive layer |
| US7394516B2 (en) | 1995-12-21 | 2008-07-01 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device having a particular conductive layer |
| KR19980025065A (en) * | 1996-09-27 | 1998-07-06 | 순페이 야마자끼 | Electro-optical device and manufacturing method thereof |
| US8045125B2 (en) | 1997-05-22 | 2011-10-25 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device having a gap retaining member made of resin formed directly over the driver circuit |
| US8854593B2 (en) | 1997-05-22 | 2014-10-07 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device |
| KR100440543B1 (en) * | 1997-08-01 | 2004-12-17 | 삼성전자주식회사 | Liquid crystal display element having a structure of covering the inside and the outside of seal lines with organic black matrices, specially related to removing short occurrence of upper/lower plates between a c/f substrate and a tft substrate while securing seal line reliability |
| KR100505564B1 (en) * | 1997-08-25 | 2005-09-26 | 삼성전자주식회사 | Thin film transistor liquid crystal display and manufacturing method thereof |
| US7092050B2 (en) | 2000-05-25 | 2006-08-15 | Seiko Epson Corporation | Liquid crystal device, manufacturing method therefor, and electronic apparatus |
| US6768533B2 (en) | 2000-05-25 | 2004-07-27 | Seiko Epson Corporation | Liquid crystal device, manufacturing method therefor, and electronic apparatus |
| US6859247B2 (en) | 2000-09-29 | 2005-02-22 | Seiko Epson Corporation | Electro-optical apparatus and projection-type display apparatus |
| JP2004109372A (en) * | 2002-09-17 | 2004-04-08 | Seiko Epson Corp | Electrooptical device, method for manufacturing the same, and electronic appliance |
| JP2004325967A (en) * | 2003-04-25 | 2004-11-18 | Sharp Corp | Display device |
| US7679922B2 (en) | 2003-04-25 | 2010-03-16 | Sharp Kabushiki Kaisha | Display device |
| KR100561645B1 (en) * | 2003-10-13 | 2006-03-20 | 엘지.필립스 엘시디 주식회사 | Liquid Crystal Display Panel and Method of Fabricating the same |
| JP2005128538A (en) * | 2003-10-20 | 2005-05-19 | Samsung Electronics Co Ltd | Lower substrate, display device having the same, and method for manufacturing the same |
| WO2007020746A1 (en) * | 2005-08-15 | 2007-02-22 | Sharp Kabushiki Kaisha | Electro-optic device |
| WO2009087706A1 (en) * | 2008-01-09 | 2009-07-16 | Sharp Kabushiki Kaisha | Display device |
| JPWO2009087706A1 (en) * | 2008-01-09 | 2011-05-19 | シャープ株式会社 | Display device |
| JP2008165255A (en) * | 2008-03-26 | 2008-07-17 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
| JP2009230152A (en) * | 2009-06-04 | 2009-10-08 | Semiconductor Energy Lab Co Ltd | Method of manufacturing liquid crystal display |
| JP2020030437A (en) * | 2009-10-30 | 2020-02-27 | 株式会社半導体エネルギー研究所 | Liquid crystal display device |
| US11668988B2 (en) | 2009-10-30 | 2023-06-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| JP2011002855A (en) * | 2010-09-22 | 2011-01-06 | Semiconductor Energy Lab Co Ltd | Liquid crystal display |
| JP2011076099A (en) * | 2010-11-01 | 2011-04-14 | Nec Lcd Technologies Ltd | Display device |
| JP2012234213A (en) * | 2012-09-03 | 2012-11-29 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
| JP2013092808A (en) * | 2013-02-21 | 2013-05-16 | Nlt Technologies Ltd | Display device |
| JP2013200573A (en) * | 2013-06-05 | 2013-10-03 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3413239B2 (en) | 2003-06-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3413239B2 (en) | Liquid crystal display | |
| JP4364952B2 (en) | Manufacturing method of liquid crystal display device | |
| US6088072A (en) | Liquid crystal display having a bus line formed of two metal layers and method of manufacturing the same | |
| JP3413230B2 (en) | Liquid crystal display | |
| JP2008107849A (en) | Liquid crystal display device and its manufacturing method | |
| JPH04163528A (en) | Active matrix display | |
| KR20010091977A (en) | Semiconductor device, electro-optical device substrate, liquid crystal device substrate and manufacturing method therefor, liquid crystal device, and projection liquid crystal display device and electronic apparatus using the liquid crystal device | |
| JP3059487B2 (en) | Liquid crystal display | |
| JPH10319431A (en) | Thin film transistor array substrate | |
| JPH06258661A (en) | Liquid crystal display device | |
| US7872698B2 (en) | Liquid crystal display with structure resistant to exfoliation during fabrication | |
| JP3253383B2 (en) | Liquid crystal display | |
| JPH06258660A (en) | Liquid crystal display device | |
| JP3819590B2 (en) | Liquid crystal display element, liquid crystal display apparatus using the element, and reflective liquid crystal display apparatus | |
| JPH06186579A (en) | Liquid crystal display device | |
| JPH06258659A (en) | Liquid crystal display device | |
| JPH04265945A (en) | Active matrix substrate | |
| JPH06235929A (en) | Manufacture of liquid crystal display device and liquid crystal display device | |
| JPH0887034A (en) | Liquid crystal display and its production | |
| JPH0553146A (en) | Liquid crystal display device | |
| JP3803640B2 (en) | Liquid crystal display | |
| JPH0933950A (en) | Liquid crystal display device | |
| JPH11337968A (en) | Liquid crystal display device | |
| JP2003248237A (en) | Liquid crystal display device | |
| JP3076705B2 (en) | Liquid crystal display device and method of manufacturing the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080328 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 6 Free format text: PAYMENT UNTIL: 20090328 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 6 Free format text: PAYMENT UNTIL: 20090328 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 7 Free format text: PAYMENT UNTIL: 20100328 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100328 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110328 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120328 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 9 Free format text: PAYMENT UNTIL: 20120328 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130328 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 11 Free format text: PAYMENT UNTIL: 20140328 |