JPH06244362A - Manufacture of thick film multilayer substrate - Google Patents

Manufacture of thick film multilayer substrate

Info

Publication number
JPH06244362A
JPH06244362A JP5310543A JP31054393A JPH06244362A JP H06244362 A JPH06244362 A JP H06244362A JP 5310543 A JP5310543 A JP 5310543A JP 31054393 A JP31054393 A JP 31054393A JP H06244362 A JPH06244362 A JP H06244362A
Authority
JP
Japan
Prior art keywords
thick film
film resistor
insulating layer
resistance value
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5310543A
Other languages
Japanese (ja)
Other versions
JP3635669B2 (en
Inventor
Yuji Otani
祐司 大谷
Takashi Nagasaka
長坂  崇
Mitsuhiro Saito
斎藤  光弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP31054393A priority Critical patent/JP3635669B2/en
Publication of JPH06244362A publication Critical patent/JPH06244362A/en
Application granted granted Critical
Publication of JP3635669B2 publication Critical patent/JP3635669B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To provide a method for manufacturing a thick film multi-layer substrate which makes it possible to easily make a resistance value of a thick film resistor highly accurate. CONSTITUTION:Accrording to a method for manufacturing a thick film multilayer substrate, a thick film resistor 6 on a ceramic sub-strate 1 is sintered at higher temperatures than those at which a glass insulating layer 2 is sintered while it is laid on and remains in contact with, the thick film resistor 6. As a result of the thick film resistor 6 being sintered at higher temperatures than those at which the glass insulating layer 2 is sintered while it is in contct with the thick film resistor 6, it is possible to reduce variations in resistance value caused by subsequent high temperature processes such as sintering of the glass insulating layers 2-4. It is assumed that this is probably due to the following fact. That is, the sintering of the thick film resistor 6 at high temepratuers strengthens a combining force of ceramic particles and conductive particles that constitute the thick film resistor 6, and also makes the particles closely packed. This makes it difficult for the diffusion of a solid phase to occur between the thick film resistor 6 and the glass insulating layer 2 which is in contact with the thick film resistor 6.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は厚膜多層基板の製造方法
に関する。
FIELD OF THE INVENTION The present invention relates to a method for manufacturing a thick film multilayer substrate.

【0002】[0002]

【従来技術】従来、セラミック基板上に絶縁層を印刷、
焼成し、この絶縁層上に配線パタンを印刷、焼成するこ
とにより厚膜多層基板を製造する際には、複数の絶縁層
及び配線パタンは、全て同じ温度で焼成している。した
がって、上記技術を応用して、セラミック基板上に厚膜
抵抗を印刷、焼成し、このセラミック基板上に複数の絶
縁層を順次、印刷、焼成しようとすると、厚膜抵抗、複
数の絶縁層及び配線パタンは、全て同じ温度で焼成する
ことが考えられる。
2. Description of the Related Art Conventionally, an insulating layer is printed on a ceramic substrate,
When a thick film multilayer substrate is manufactured by firing, printing a wiring pattern on the insulating layer, and firing the wiring pattern, the plurality of insulating layers and the wiring patterns are all fired at the same temperature. Therefore, when the thick film resistors are printed and fired on the ceramic substrate by applying the above technique, and a plurality of insulating layers are sequentially printed and fired on the ceramic substrate, the thick film resistors, the plurality of insulating layers, and It is considered that the wiring patterns are all fired at the same temperature.

【0003】しかしながら、上記の製造方法では、厚膜
抵抗の焼成温度と絶縁層、配線パタンなどの焼成温度が
同じであるため、厚膜抵抗焼成後の焼成工程において、
熱的影響により厚膜抵抗とそれに接する絶縁層との間に
相互拡散や熱ストレスが発生し、厚膜抵抗の抵抗値が大
きく変動してしまうという問題がある。そこで上記問題
に対処する従来技術としては、下記の時点において、厚
膜抵抗にレーザトリミングを実施し、抵抗値調整を行っ
ている。
However, in the above manufacturing method, since the firing temperature of the thick film resistor is the same as the firing temperature of the insulating layer, the wiring pattern, etc., in the firing step after firing the thick film resistor,
Due to the thermal effect, mutual diffusion and thermal stress occur between the thick film resistor and the insulating layer in contact with the thick film resistor, and there is a problem that the resistance value of the thick film resistor varies greatly. Therefore, as a conventional technique for dealing with the above problem, the thick film resistor is laser-trimmed at the following time points to adjust the resistance value.

【0004】第一の従来技術では全ガラス絶縁層の焼成
前にレーザトリミングを実施する。第二の従来技術では
全ガラス絶縁層の焼成後に全ガラス絶縁層を透過してレ
ーザトリミングを実施する。第三の従来技術では全ガラ
ス絶縁層を開口して設けた窓を通してレーザトリミング
を実施する。第四の従来技術では上部のガラス絶縁層に
設けた窓を通しかつ最下層のガラス絶縁層を透過してレ
ーザトリミングを実施する。
In the first prior art, laser trimming is performed before firing all glass insulating layers. In the second conventional technique, laser trimming is carried out through the all glass insulating layer after firing the all glass insulating layer. In the third conventional technique, laser trimming is performed through a window provided by opening the all glass insulating layer. In the fourth conventional technique, laser trimming is carried out through a window provided in the upper glass insulating layer and through the lowermost glass insulating layer.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記し
たレーザートリミング方法は、それぞれ下記の問題点を
有している。まず上記第一の従来技術では、レーザート
リミング後に全ガラス絶縁層及び配線の焼成を行うため
にそれらの熱的影響により、厚膜抵抗の抵抗値が変動し
てしまう。図6に同一基板上に設けた3個の厚膜抵抗の
各工程毎の抵抗値変動の一例を示す。図より明らかなよ
うに、抵抗体のシート抵抗値あるいは抵抗体の形状等に
よって抵抗値変動の絶対値が異なる。
However, each of the above laser trimming methods has the following problems. First, in the above-mentioned first conventional technique, since the entire glass insulating layer and the wiring are baked after laser trimming, the resistance value of the thick film resistance fluctuates due to their thermal influence. FIG. 6 shows an example of resistance value variation of each of the three thick film resistors provided on the same substrate in each step. As is clear from the figure, the absolute value of the resistance value variation differs depending on the sheet resistance value of the resistor or the shape of the resistor.

【0006】上記第二の従来技術では、厚い全ガラス絶
縁層を透過してレーザートリミングを行うために、各ガ
ラス絶縁層及びその界面における吸収、散乱、反射が生
じ、厚膜抵抗トリミングのためにレーザー出力を増大さ
せる必要がある。しかし、このレーザー出力の増大は周
辺部への熱的影響の増大により周辺の配線や回路素子に
熱ストレスなどの悪影響を与える可能性が危惧される。
In the above-mentioned second prior art, since laser trimming is performed by passing through the thick whole glass insulating layer, absorption, scattering and reflection occur in each glass insulating layer and its interface, and for thick film resistance trimming. The laser power needs to be increased. However, it is feared that this increase in laser output may adversely affect peripheral wiring and circuit elements such as thermal stress due to an increase in thermal influence on the peripheral portion.

【0007】上記第三、第四の従来技術では、窓部に配
線を布設できないので、多数のレーザートリミング厚膜
抵抗を要する場合、配線パターンの設計が複雑となり、
配線長が必要以上に長くなり、更に厚膜抵抗が露出する
ので耐外部環境性に不安が生じる。本発明は上記問題点
に鑑みなされたものであり、簡単に厚膜抵抗の抵抗値を
高精度化できる厚膜多層基板の製造方法を提供すること
を、その目的としている。
In the above-mentioned third and fourth conventional techniques, since wiring cannot be laid in the window portion, when a large number of laser trimming thick film resistors are required, the wiring pattern design becomes complicated,
The wiring length becomes unnecessarily long, and the thick film resistance is further exposed, causing concern about the external environment resistance. The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for manufacturing a thick film multilayer substrate, which can easily improve the resistance value of the thick film resistor.

【0008】[0008]

【課題を解決するための手段】本発明の厚膜多層基板の
製造方法は、セラミック基板上に厚膜抵抗を印刷し、焼
成する厚膜抵抗形成工程と、前記厚膜抵抗及び前記セラ
ミック基板の表面に複数層の絶縁層を順次、印刷、焼成
する絶縁層形成工程と、前記絶縁層上に配線パタンを印
刷、焼成する配線形成工程とを備える厚膜多層基板の製
造方法において、前記厚膜抵抗を、前記厚膜抵抗に接す
る前記絶縁層よりも高温で焼成することを特徴としてい
る。
A method of manufacturing a thick film multilayer substrate according to the present invention comprises a thick film resistor forming step of printing and firing a thick film resistor on a ceramic substrate, and a step of forming the thick film resistor and the ceramic substrate. In the method of manufacturing a thick film multilayer substrate, which comprises an insulating layer forming step of sequentially printing and baking a plurality of insulating layers on a surface, and a wiring forming step of printing and baking a wiring pattern on the insulating layer, The resistor is fired at a higher temperature than the insulating layer in contact with the thick film resistor.

【0009】好適な態様において、前記厚膜抵抗を前記
絶縁層よりも20〜100℃高温で焼成する。温度差が
20℃未満の場合には抵抗値変動が大きくなり、温度差
が100℃超過の場合には接する配線導体(通常Ag系
導体(Ag、AgPd、AgPt)の溶融又は配線導体
との固相拡散といった不具合が生じる。
In a preferred embodiment, the thick film resistor is fired at a temperature 20 to 100 ° C. higher than that of the insulating layer. When the temperature difference is less than 20 ° C., the resistance value fluctuations are large, and when the temperature difference is more than 100 ° C., the wiring conductors (usually Ag-based conductors (Ag, AgPd, AgPt)) melted or solidified with the wiring conductors. Problems such as phase diffusion occur.

【0010】好適な態様において、前記厚膜抵抗は、そ
の後に焼成される前記絶縁層よりも高温で焼成される。
好適な態様において、前記厚膜抵抗をレーザートリミン
グした後、前記絶縁層を形成する。好適な態様におい
て、前記レーザートリミング直後の前記厚膜抵抗の抵抗
値と、前記厚膜抵抗の高温工程終了時の抵抗値との比率
を記憶し、前記比率に基づいて目標抵抗値を予め補正し
て得た抵抗値に基づいてレーザートリミングを実施す
る。
In a preferred embodiment, the thick film resistor is fired at a higher temperature than the insulating layer which is fired thereafter.
In a preferred embodiment, the insulating layer is formed after laser trimming the thick film resistor. In a preferred aspect, the ratio of the resistance value of the thick film resistance immediately after the laser trimming and the resistance value of the thick film resistance at the end of the high temperature process is stored, and the target resistance value is corrected in advance based on the ratio. Laser trimming is performed based on the obtained resistance value.

【0011】好適な態様において、前記厚膜抵抗に含ま
れるガラスを前記厚膜抵抗又は前記絶縁層の焼成により
結晶化ガラスとする。
In a preferred embodiment, the glass contained in the thick film resistor is made into crystallized glass by firing the thick film resistor or the insulating layer.

【0012】[0012]

【発明の効果】本発明の厚膜多層基板の製造方法では、
セラミック基板上の厚膜抵抗をその上に接して焼成され
る絶縁層よりも高温で焼成する。このようにすれば、以
下の効果を奏することができる。 (1)レーザートリミング跡や窓により絶縁層に凹部が
形成されるレーザートリミングを使用しなくても高精度
に抵抗値を決定できる。
According to the method of manufacturing the thick film multilayer substrate of the present invention,
The thick film resistor on the ceramic substrate is fired at a higher temperature than the insulating layer that is fired in contact therewith. With this configuration, the following effects can be obtained. (1) The resistance value can be determined with high accuracy without using laser trimming in which a recess is formed in the insulating layer by a laser trimming trace or a window.

【0013】すなわち、厚膜抵抗焼成後におけるその抵
抗値の変動は、その後の高温工程(絶縁層焼成、配線
(回路パタン及びビヤーホール充填導体)焼成)、特に
厚膜抵抗に接する絶縁層の焼成工程における厚膜抵抗と
それに接する絶縁層との相互拡散や熱ストレスなどによ
って生じる。ところが本発明者らの実験によれば、厚膜
抵抗をそれに接する絶縁層よりも高温で焼成すれば、そ
の後の絶縁層の焼成などの高温工程による抵抗値変動を
低減できることがわかった。
That is, after the thick film resistor is fired, its resistance value varies depending on the subsequent high temperature process (insulating layer firing, wiring (circuit pattern and via hole filling conductor) firing), particularly the firing process of the insulating layer in contact with the thick film resistor. It is caused by the mutual diffusion of the thick film resistance in and the insulating layer in contact therewith, thermal stress, and the like. However, according to the experiments conducted by the present inventors, it has been found that if the thick film resistor is fired at a temperature higher than that of the insulating layer in contact with the thick film resistor, fluctuations in the resistance value due to a high temperature step such as subsequent firing of the insulating layer can be reduced.

【0014】恐らく、厚膜抵抗の高温焼成により、厚膜
抵抗を構成するガラス粒子と導電粒子との反応ならびに
結合力が強化されるために、その後により低温の絶縁層
焼成工程を行っても、厚膜抵抗とそれに接する絶縁層と
の間で固相拡散が生じにくくなるためと推定される。 (2)厚膜抵抗焼成後でかつ絶縁層形成前にレーザート
リミングすることにより、更なる高精度の抵抗値を得る
ことができる。また厚膜抵抗を絶縁層で被覆できるの
で、安定性に優れ、しかもその配線が可能となる。
Presumably, since the reaction between the glass particles and the conductive particles constituting the thick film resistor and the bonding force are strengthened by the high temperature firing of the thick film resistor, even if the lower temperature insulating layer firing step is performed thereafter, It is presumed that solid-phase diffusion is less likely to occur between the thick film resistor and the insulating layer in contact with it. (2) By performing laser trimming after firing the thick film resistor and before forming the insulating layer, a more highly accurate resistance value can be obtained. Further, since the thick film resistor can be covered with the insulating layer, the stability is excellent and the wiring can be performed.

【0015】すなわち、厚膜抵抗が高温焼成されて安定
であるので、レーザートリミング跡の絶縁層焼成を行っ
ても抵抗値のばらつきが小さい。したがって、絶縁層に
窓などを設ける必要がなくまた絶縁層透過のためにレー
ザー出力を増大しなくてもよい。
That is, since the thick film resistor is stable by being fired at a high temperature, there is little variation in the resistance value even if the insulating layer is fired after laser trimming. Therefore, it is not necessary to provide a window or the like in the insulating layer, and the laser output need not be increased due to the transmission of the insulating layer.

【0016】[0016]

【実施例】(実施例1)本発明の厚膜多層基板の一実施
例を図1を参照して説明する。図1は、アルミナ基板1
上に3層のガラス絶縁層2〜4を有する厚膜多層基板を
示す。
EXAMPLE 1 An example of a thick film multilayer substrate of the present invention will be described with reference to FIG. FIG. 1 shows an alumina substrate 1.
Shown above is a thick film multilayer substrate having three layers of glass insulation layers 2-4.

【0017】基板1上には配線5、厚膜抵抗6が印刷、
焼成されており、その上にガラス絶縁層2〜4が形成さ
れ、ガラス絶縁層4上には配線7、保護ガラス71が形
成されている。また、ガラス絶縁層4上には回路部品8
がはんだ付けされている。9はビアホールに充填された
孔部充填導体である。以下、この厚膜多層基板の製造方
法を説明する。 (厚膜抵抗形成工程)まず、図2に示すように、Ag粉
末にバインダとしてのエチルセルロースと溶剤としての
テルビネオールなどとを混練して導体ペーストを作成
し、次に約1600℃で焼成されたアルミナ基板1上に
この導体ペーストを印刷し、空気中、800〜1050
℃で10分間保持する焼成プロファイルにて焼成して配
線5を形成する。
The wiring 5 and the thick film resistor 6 are printed on the substrate 1.
It is baked, and the glass insulating layers 2 to 4 are formed on it, and the wiring 7 and the protective glass 71 are formed on the glass insulating layer 4. Further, the circuit component 8 is provided on the glass insulating layer 4.
Is soldered. Reference numeral 9 is a hole filling conductor filled in the via hole. The method of manufacturing the thick film multilayer substrate will be described below. (Thick film resistance forming step) First, as shown in FIG. 2, a conductor paste was prepared by kneading Ag powder with ethyl cellulose as a binder and terbineol as a solvent, and then with alumina sintered at about 1600 ° C. This conductor paste is printed on the substrate 1, and 800 to 1050 in air.
The wiring 5 is formed by firing with a firing profile that is maintained at 10 ° C. for 10 minutes.

【0018】次に、1200〜1500℃で溶融後、水
中急冷し、粉砕した所定の混合比率のPbO、Al2
3 、SiO2 、B2 3 混合物などからなる平均粒径2
〜5μmのガラス粉末50〜80vol%にRu02
末を所定vol%混合した混合粉末を作成し、この混合
粉末に溶剤(例えばテルビネオール)、バインダ(例え
ばエチルセルロース)を入れて混練して抵抗体ペースト
を作成し、この抵抗体ペーストをアルミナ基板1の表面
に焼成後の膜厚が7〜15μmの厚さになるように印刷
し、空気中、820〜1050℃で10分間保持する焼
成プロファイルにて焼成して厚膜抵抗6を形成する。 (ガラス絶縁層の最下層を厚膜抵抗上に形成する工程)
次に、図3に示すように、1200〜1500℃で溶融
後、水中急冷し、粉砕した所定の混合比率のCaO、A
2 3 、ZrO、PbOなどの混合物からなる平均粒
径2〜5μmのガラス粉末に、溶剤(例えばテルビネオ
ール)、バインダ(例えばエチルセルロース)を所定量
加え、混練してガラスペーストを作成する。このガラス
ペーストをアルミナ基板1上に15〜25μmの厚さで
印刷し、800〜950℃で10分間保持する焼成プロ
ファイルにて焼成してガラス絶縁層2を形成する。 (残部のガラス絶縁層及び内部配線形成工程)次に、図
4に示すように、上記したガラス絶縁層2の製造工程と
同じ工程でガラス絶縁層3を形成し、次に、上記導体ペ
ーストをガラス絶縁層2、3の互いに連通するビアホー
ルにスクリーン印刷して充填し、空気中、800〜95
0℃で10分間保持する焼成プロファイルにて焼成して
孔部充填導体9の下部を形成する。
Next, after melting at 1200 to 1500 ° C., quenched in water and pulverized, PbO and Al 2 O having a predetermined mixing ratio.
Average particle size 2 consisting of 3 , SiO 2 , B 2 O 3 mixture, etc.
˜5 μm glass powder 50 to 80 vol% and Ru0 2 powder are mixed in a predetermined vol% to prepare a mixed powder, and a solvent (for example, terbineol) and a binder (for example, ethyl cellulose) are added to the mixed powder and kneaded to form a resistor paste. This resistor paste was printed and printed on the surface of the alumina substrate 1 so that the film thickness after firing would be 7 to 15 μm, and fired in a firing profile in which the temperature was maintained at 820 to 1050 ° C. for 10 minutes in air. Then, the thick film resistor 6 is formed. (Process of forming the bottom layer of the glass insulating layer on the thick film resistor)
Next, as shown in FIG. 3, after melting at 1200 to 1500 ° C., it was rapidly cooled in water and crushed, and CaO and A having a predetermined mixing ratio were crushed.
A glass paste having a mean particle size of 2 to 5 μm, which is made of a mixture of l 2 O 3 , ZrO, PbO, etc., is added with a predetermined amount of a solvent (such as terbineol) and a binder (such as ethyl cellulose) and kneaded to form a glass paste. This glass paste is printed on the alumina substrate 1 to a thickness of 15 to 25 μm, and is baked in a baking profile that is held at 800 to 950 ° C. for 10 minutes to form the glass insulating layer 2. (Remaining Glass Insulating Layer and Internal Wiring Forming Step) Next, as shown in FIG. 4, the glass insulating layer 3 is formed in the same step as the above-described glass insulating layer 2 manufacturing step, and then the conductor paste is added. The via holes communicating with each other in the glass insulating layers 2 and 3 are screen-printed and filled in air, and 800 to 95
The lower portion of the hole filling conductor 9 is formed by firing with a firing profile that is maintained at 0 ° C. for 10 minutes.

【0019】次に、上記したガラス絶縁層2の製造工程
と同じ工程でガラス絶縁層4を形成し、次に、上記ビア
ホールに連通するガラス絶縁層4のビアホールにAgペ
ーストをスクリーン印刷して充填し、空気中、800〜
950℃で10分間保持する焼成プロファイルにて焼成
して孔部充填導体9の上部を形成する。 (表層回路形成工程)次に、図4に示す様に導体ペース
トをガラス絶縁層4表面に印刷し、800〜950℃で
10分間保持する焼成プロファイルにて焼成して配線7
を形成し、その上に保護ガラスペーストを印刷し、空気
中、500〜650℃をピーク温度とする焼成プロファ
イルにて焼成して保護ガラス層71を形成した。
Next, the glass insulating layer 4 is formed in the same process as the above-mentioned process for manufacturing the glass insulating layer 2, and then the via hole of the glass insulating layer 4 communicating with the via hole is screen-printed with Ag paste to fill it. In the air, 800 ~
The upper portion of the hole filling conductor 9 is formed by firing with a firing profile that is maintained at 950 ° C. for 10 minutes. (Surface layer circuit forming step) Next, as shown in FIG. 4, a conductor paste is printed on the surface of the glass insulating layer 4 and baked by a baking profile which holds at 800 to 950 ° C. for 10 minutes to form the wiring 7.
Was formed, a protective glass paste was printed thereon, and the protective glass layer 71 was formed by firing in air with a firing profile having a peak temperature of 500 to 650 ° C.

【0020】保護ガラスペーストは、1200〜150
0℃で溶融後、水中急冷し、粉砕した所定の混合比率の
PbO、SiO2 、B2 3 混合物からなる平均粒径2
〜5μmのガラス粉末に、溶剤(例えばテルピネオー
ル)、バインダ(例えばエチルセルロース)を所定量加
え、混練して作成した。 (回路部品装着工程)次に、図1に示すように、ガラス
絶縁層4の表面に焼成基板の表面に、回路部品8をはん
だ付けして工程を完了した。
The protective glass paste is 1200-150.
Average particle size 2 consisting of PbO, SiO 2 and B 2 O 3 mixture with a predetermined mixing ratio, which was melted at 0 ° C., quenched in water, and crushed.
A predetermined amount of a solvent (for example, terpineol) and a binder (for example, ethyl cellulose) were added to a glass powder of ˜5 μm, and the mixture was kneaded. (Circuit component mounting step) Next, as shown in FIG. 1, the circuit component 8 was soldered to the surface of the glass insulating layer 4 on the surface of the fired substrate to complete the step.

【0021】また、基板形成プロセスにて導体ペースト
のAg粉末の代わりにAgとPdあるいはAgとPtと
の混合粉を用いてもよい。またCuを用いることもでき
るがこの場合には酸化防止のため、焼成をN2 雰囲気で
行なう必要がある。さらに、表層回路形式工程におい
て、導体ペーストを用いて配線形成後、この配線間に抵
抗体を形成する事もできる。
Further, in the substrate forming process, a mixed powder of Ag and Pd or Ag and Pt may be used instead of the Ag powder of the conductor paste. Cu can also be used, but in this case, it is necessary to perform firing in an N 2 atmosphere to prevent oxidation. Further, in the surface layer circuit type process, after the wiring is formed using the conductor paste, the resistor can be formed between the wirings.

【0022】次に、厚膜抵抗6の抵抗値変化を各製造工
程終了毎にモニターした結果を図5に示す。また、厚膜
抵抗6の焼成を850℃で10分間保持する焼成プロフ
ァイルにて焼成した他は実施例と同じ方法で作成した厚
膜抵抗の抵抗値変化を示す。図6からわかるように、厚
膜抵抗6の抵抗値は、高温焼成する本実施例品の抵抗値
変化は比較例品に比べて格段に縮小されていることがわ
かる。 (実施例2)上記実施例では、レーザートリミングを行
わなかったが、厚膜抵抗6の形成後にそのレーザートリ
ミングを行って、厚膜抵抗6の値を精密に所定値に決
め、その後、厚膜抵抗6を含む基板1上にガラス絶縁層
2〜4を形成してもよい。厚膜抵抗6が高温焼成されて
いるために、その上にガラス絶縁層2〜4を低温焼成し
ても、図5からわかるように殆ど変わらない。 (実施例3)上記実施例2では、ガラス絶縁層2〜4形
成前にレーザートリミングを実施したが、ガラス絶縁層
2の形成後にレーザートリミングを行い、その後でガラ
ス絶縁層3、4を形成してもよい。このようにすれば更
に抵抗値変動を低減し、更に厚膜抵抗6上をガラス絶縁
層3そして4で被覆することができる。 (実施例4)他の実施例を説明する。
Next, FIG. 5 shows the results of monitoring changes in the resistance value of the thick film resistor 6 after each manufacturing process. Further, the change in the resistance value of the thick film resistor produced by the same method as that of the example is shown except that the thick film resistor 6 is fired at a firing profile of holding it at 850 ° C. for 10 minutes. As can be seen from FIG. 6, regarding the resistance value of the thick film resistor 6, the change in resistance value of the product of this example fired at a high temperature is remarkably reduced as compared with the product of the comparative example. (Embodiment 2) In the above embodiment, laser trimming was not performed. However, after the thick film resistor 6 is formed, the laser trimming is performed to precisely set the value of the thick film resistor 6 to a predetermined value, and then the thick film resistor 6 is formed. The glass insulating layers 2 to 4 may be formed on the substrate 1 including the resistor 6. Since the thick film resistor 6 is fired at a high temperature, even if the glass insulating layers 2 to 4 are fired thereon at a low temperature, it hardly changes as can be seen from FIG. (Example 3) In Example 2 above, laser trimming was performed before forming the glass insulating layers 2 to 4, but laser trimming was performed after forming the glass insulating layer 2 and then the glass insulating layers 3 and 4 were formed. May be. In this way, fluctuations in resistance value can be further reduced, and the thick film resistor 6 can be further covered with the glass insulating layers 3 and 4. (Embodiment 4) Another embodiment will be described.

【0023】この実施例は、実施例1において、厚膜抵
抗6のレーザートリミング後の抵抗値R3と、製造工程
完了後の上記厚膜抵抗6の抵抗R4との変化率Rr=R
4/R3について多数のサンプルの平均変化率Rrmを
計算し、レーザートリミング時にこの平均変化率Rrm
を利用してレーザートリミング時の抵抗値R3を決定す
る。
In this embodiment, the change rate Rr = R between the resistance value R3 of the thick film resistor 6 after laser trimming and the resistance R4 of the thick film resistor 6 after the manufacturing process is completed in the first embodiment.
4 / R3, the average rate of change Rrm of many samples was calculated, and this average rate of change Rrm during laser trimming was calculated.
Is used to determine the resistance value R3 during laser trimming.

【0024】例えば厚膜抵抗6の目標抵抗値をRxとす
る。そこでレーザートリミングにより厚膜抵抗6のレー
ザートリミング設定抵抗値R3をR3=Rx/Rrmと
してレーザートリミングを行う。このようにすれば、レ
ーザートリミング後にガラス絶縁層焼成などを行い、厚
膜抵抗6に熱履歴が加えられる場合でも、この熱履歴に
よる厚膜抵抗6の抵抗値変動を最小限に抑制することが
可能となる。
For example, the target resistance value of the thick film resistor 6 is Rx. Therefore, laser trimming is performed by setting the laser trimming setting resistance value R3 of the thick film resistor 6 by R3 = Rx / Rrm by laser trimming. By doing so, even if the glass insulating layer is fired after laser trimming and heat history is applied to the thick film resistor 6, it is possible to minimize the variation in the resistance value of the thick film resistor 6 due to this heat history. It will be possible.

【0025】これは、レーザートリミング後のガラス絶
縁層や配線の焼成工程が一定であり、それによる抵抗値
変動も本質的に一定範囲内に収まるためである。 (実施例5)実施例4の変形態様を以下に説明する。こ
の実施例では、レーザートリミングにおける抵抗値比較
(モニタ抵抗と記憶する目標抵抗との比較)を行うコン
ピュータのメモリに、回路基板上の全部の厚膜抵抗6に
対してそれぞれ、平均変化率Rrmを個別に記憶してお
く。
This is because the firing process of the glass insulating layer and the wiring after the laser trimming is constant, and the variation of the resistance value due to the constant process is essentially within a constant range. (Fifth Embodiment) A modification of the fourth embodiment will be described below. In this embodiment, the average rate of change Rrm for each thick film resistor 6 on the circuit board is stored in the memory of the computer that compares the resistance value in laser trimming (comparison between the monitor resistance and the target resistance to be stored). Remember individually.

【0026】これは、回路基板上の位置や、各厚膜抵抗
6の抵抗値などにより微妙に平均変化率Rrmが異なる
のを補償するためである。このようにすれば、回路基板
上の位置や、各厚膜抵抗6の抵抗値などにより微妙に平
均変化率Rrmが異なる場合でも、熱履歴による各厚膜
抵抗6の抵抗値変動を最小化することができる。 (実施例6)実施例5の変形態様を以下に説明する。
This is to compensate for the fact that the average rate of change Rrm is slightly different depending on the position on the circuit board, the resistance value of each thick film resistor 6, and the like. By doing so, even if the average change rate Rrm is slightly different depending on the position on the circuit board or the resistance value of each thick film resistor 6, the variation in the resistance value of each thick film resistor 6 due to thermal history is minimized. be able to. (Sixth Embodiment) A modification of the fifth embodiment will be described below.

【0027】回路基板は複数枚(例えば4枚)を1ロッ
トとして同じハンドリング用のボート(たとえばアルミ
ナ製)に載置して、各工程を実施する。この実施例で
は、レーザートリミングにおける抵抗値比較(モニタ抵
抗と記憶する目標抵抗との比較)を行うコンピュータの
メモリに、上記ボート上の各回路基板上のレーザートリ
ミングが必要な各厚膜抵抗6の全数に対して、それぞれ
平均変化率Rrmを個別に記憶しておく。そしてレーザ
ートリミングが必要な全厚膜抵抗6に対して各抵抗値R
3を目標抵抗Rx/Rrmとして個別にレーザートリミ
ングする。
A plurality of (for example, four) circuit boards are placed as one lot on the same boat for handling (for example, made of alumina), and each step is carried out. In this embodiment, in the memory of the computer for performing the resistance value comparison (comparison between the monitor resistance and the target resistance to be stored) in the laser trimming, the thick film resistors 6 on the respective circuit boards on the boat, which require the laser trimming, are stored. The average rate of change Rrm is individually stored for all the numbers. Then, for each full-thickness film resistor 6 that requires laser trimming, each resistance value R
3 is individually laser-trimmed as the target resistance Rx / Rrm.

【0028】これは、上記セラミックボート上の回路基
板の載置位置により、回路基板毎に微妙に温度などが変
化し、そのために回路基板上の同一位置に形成される厚
膜抵抗6でも上記微妙な温度変化により抵抗値が変動す
るためである。この実施例によれば、更に一層の抵抗値
変動抑制が可能となる。 (変形態様)以下、他の変形態様を説明する。
This is because the temperature or the like changes subtly for each circuit board depending on the mounting position of the circuit board on the ceramic boat, so that the thick film resistor 6 formed at the same position on the circuit board also has the above subtle. This is because the resistance value fluctuates due to various temperature changes. According to this embodiment, it is possible to further suppress the resistance value fluctuation. (Modification) Another modification will be described below.

【0029】変形態様1 実施例7において、厚膜抵抗6の膜厚と熱履歴後の平均
変化率Rrmとは一定の関係をもつので、この関係を示
すグラフを記憶しておけば、厚膜抵抗6の膜厚を変える
度にこのグラフから平均変化率Rrmをサーチすること
ができ、厚膜抵抗6の膜厚を変える度に一々、平均変化
率Rrmを実験的に導出しなくてもよい。
Modification 1 In Example 7, the film thickness of the thick film resistor 6 and the average rate of change Rrm after thermal history have a constant relationship. Therefore, if a graph showing this relationship is stored, the thick film resistor 6 may be stored. The average change rate Rrm can be searched from this graph each time the film thickness of the resistor 6 is changed, and the average change rate Rrm does not have to be experimentally derived each time the film thickness of the thick film resistor 6 is changed. .

【0030】変形態様2 この態様では、厚膜抵抗6形成後でかつガラス絶縁層2
形成前に、厚膜抵抗6とガラス絶縁層2との間の固相拡
散を防止又は低減するバリア層を少なくとも厚膜抵抗6
上に形成する。このバリア層はレーザートリミング前に
形成してもよく、その後に形成してもよい。このバリア
層の条件としては、厚膜抵抗6との固相拡散が少なく、
厚膜抵抗6とガラス絶縁層2との間の固相拡散を低減
し、厚膜抵抗6形成後の熱履歴に対して相変化しない絶
縁性材料であり、例えば、窒化シリコン膜やアルミナ膜
などを採用することができ、製造プロセスとしてはCV
D法やPVD法や印刷焼成法などを採用できる。なお、
レーザートリミング前に形成する場合には、レーザート
リミングにより溶断可能な厚さとする必要がある。
Modification 2 In this modification, the glass insulating layer 2 is formed after the thick film resistor 6 is formed.
Prior to formation, a barrier layer for preventing or reducing solid-phase diffusion between the thick film resistor 6 and the glass insulating layer 2 is provided at least as the thick film resistor 6
Form on top. This barrier layer may be formed before or after laser trimming. As conditions for this barrier layer, solid phase diffusion with the thick film resistor 6 is small,
An insulating material that reduces solid-phase diffusion between the thick film resistor 6 and the glass insulating layer 2 and does not undergo a phase change with respect to the thermal history after the thick film resistor 6 is formed, such as a silicon nitride film or an alumina film. CV can be adopted as the manufacturing process.
The D method, PVD method, printing firing method, etc. can be adopted. In addition,
When forming before laser trimming, it is necessary to have a thickness that can be cut by laser trimming.

【0031】変形態様3 この態様では、厚膜抵抗6形成後でかつガラス絶縁層2
形成前に又はガラス絶縁層2として、直上のガラス絶縁
層よりも軟質又は高弾性の緩衝層を少なくとも厚膜抵抗
6上に形成する。この緩衝層はレーザートリミング前に
形成してもよく、その後に形成してもよい。この緩衝層
の条件としては、厚膜抵抗6との固相拡散が少なく、厚
膜抵抗6とガラス絶縁層4との間の固相拡散を低減し、
厚膜抵抗6形成後の熱履歴に対して相変化しない絶縁性
材料であり、製造プロセスとしてはCVD法やPVD法
や印刷焼成法などを採用できる。なお、レーザートリミ
ング前に形成する場合には、レーザートリミングにより
溶断可能な厚さとする必要がある。
Modification 3 In this modification, the glass insulating layer 2 is formed after the thick film resistor 6 is formed.
Before formation or as the glass insulating layer 2, a buffer layer having a softer or higher elasticity than the glass insulating layer immediately above is formed at least on the thick film resistor 6. This buffer layer may be formed before or after laser trimming. As conditions for this buffer layer, solid phase diffusion with the thick film resistor 6 is small, solid phase diffusion between the thick film resistor 6 and the glass insulating layer 4 is reduced,
It is an insulating material that does not undergo a phase change with respect to the thermal history after the thick film resistor 6 is formed, and a CVD method, a PVD method, a printing firing method or the like can be adopted as a manufacturing process. In addition, when forming before laser trimming, it is necessary to have a thickness that allows fusing by laser trimming.

【0032】このようにすれば、厚膜抵抗6とガラス絶
縁層2又は3との熱膨張係数の差に起因する熱応力をこ
の緩衝層で緩和することができ、それにより上記熱応力
による厚膜抵抗6の抵抗値の変動を低減することができ
る。 変形態様4 この態様では、厚膜抵抗6形成後でかつガラス絶縁層2
形成前に又はガラス絶縁層2として、直上のガラス絶縁
層の熱膨張率と厚膜抵抗6の熱膨張率との中間の熱膨張
率を有するを設ける。この緩衝層はレーザートリミング
前に形成してもよく、その後に形成してもよい。この緩
衝層の条件としては、厚膜抵抗6との固相拡散が少な
く、厚膜抵抗6とガラス絶縁層4との間の固相拡散を低
減し、厚膜抵抗6形成後の熱履歴に対して相変化しない
絶縁性材料であり、製造プロセスとしてはCVD法やP
VD法や印刷焼成法などを採用できる。なお、レーザー
トリミング前に形成する場合には、レーザートリミング
により溶断可能な厚さとする必要がある。
In this way, the thermal stress due to the difference in thermal expansion coefficient between the thick film resistor 6 and the glass insulating layer 2 or 3 can be relaxed by this buffer layer, whereby the thickness due to the thermal stress can be reduced. It is possible to reduce fluctuations in the resistance value of the film resistor 6. Modification 4 In this modification, the glass insulating layer 2 is formed after the thick film resistor 6 is formed.
Before formation or as the glass insulating layer 2, a glass insulating layer having a thermal expansion coefficient intermediate between the thermal expansion coefficient of the glass insulating layer immediately above and the thermal expansion coefficient of the thick film resistor 6 is provided. This buffer layer may be formed before or after laser trimming. The conditions for the buffer layer are that solid phase diffusion with the thick film resistor 6 is small, solid phase diffusion between the thick film resistor 6 and the glass insulating layer 4 is reduced, and the thermal history after the thick film resistor 6 is formed is reduced. On the other hand, it is an insulating material that does not change phase, and the manufacturing process is CVD or P
A VD method or a printing firing method can be adopted. In addition, when forming before laser trimming, it is necessary to have a thickness that allows fusing by laser trimming.

【0033】このようにすれば、厚膜抵抗6とガラス絶
縁層2又は3との熱膨張係数の差に起因する熱応力をこ
の緩衝層で緩和することができ、それにより上記熱応力
による厚膜抵抗6の抵抗値の変動を低減することができ
る。 変形態様5 この態様では、厚膜抵抗6に含まれるガラスの主成分を
結晶化ガラスとする。
In this way, the thermal stress due to the difference in the thermal expansion coefficient between the thick film resistor 6 and the glass insulating layer 2 or 3 can be relaxed by this buffer layer, whereby the thickness due to the thermal stress can be reduced. It is possible to reduce fluctuations in the resistance value of the film resistor 6. Modification 5 In this modification, the main component of the glass contained in the thick film resistor 6 is crystallized glass.

【0034】このようにすれば、厚膜抵抗6の内部のガ
ラスが厚膜抵抗6の焼成時に結晶化し、結晶化ガラスの
融点が高くなる。好適には、結晶化状態で非晶質状態の
ときより融点が50℃以上上昇する組成が好ましい。し
たがって、その後の絶縁層の焼成工程における絶縁層と
厚膜抵抗6との相互反応をより良好に抑止することがで
きる。
In this way, the glass inside the thick film resistor 6 is crystallized when the thick film resistor 6 is fired, and the melting point of the crystallized glass is increased. A composition in which the melting point rises by 50 ° C. or more is more preferable than that in the amorphous state in the crystallized state. Therefore, the mutual reaction between the insulating layer and the thick film resistor 6 in the subsequent step of firing the insulating layer can be more effectively suppressed.

【0035】さらに厚膜抵抗6内部のガラスだけでな
く、ガラス絶縁層2に含まれるガラスの主成分をも結晶
化ガラスとしても同様の効果が生じる。すなわち、ガラ
ス絶縁層2に含まれるガラスの主成分が結晶化ガラスと
なることにより、焼成後のガラス絶縁層2とそれに隣接
する厚膜抵抗6との相互反応が抑制される。これによ
り、厚膜抵抗6の抵抗値変動を低減することができる。
Further, not only the glass inside the thick film resistor 6 but also the main component of the glass contained in the glass insulating layer 2 as crystallized glass has the same effect. That is, since the main component of the glass contained in the glass insulating layer 2 is the crystallized glass, the mutual reaction between the glass insulating layer 2 after firing and the thick film resistor 6 adjacent thereto is suppressed. As a result, fluctuations in the resistance value of the thick film resistor 6 can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施例1の厚膜多層基板を示す模式断面図であ
る。
FIG. 1 is a schematic cross-sectional view showing a thick film multilayer substrate of Example 1.

【図2】実施例1の製造工程を示す模式断面図である。FIG. 2 is a schematic cross-sectional view showing the manufacturing process of Example 1.

【図3】実施例1の製造工程を示す模式断面図である。FIG. 3 is a schematic cross-sectional view showing the manufacturing process of Example 1.

【図4】実施例1の製造工程を示す模式断面図である。FIG. 4 is a schematic cross-sectional view showing the manufacturing process of Example 1.

【図5】実施例1における各工程後の厚膜抵抗の抵抗値
の変動を示す図である。
FIG. 5 is a diagram showing changes in the resistance value of the thick film resistance after each step in Example 1.

【図6】従来の厚膜多層基板の各部に形成された3個の
抵抗の各工程後の抵抗値の変動を示す図である。
FIG. 6 is a diagram showing changes in resistance values of three resistors formed in respective portions of a conventional thick film multilayer substrate after respective steps.

【符号の説明】[Explanation of symbols]

1は基板、2〜4はガラス絶縁層、6は厚膜抵抗であ
る。
Reference numeral 1 is a substrate, 2 to 4 are glass insulating layers, and 6 is a thick film resistor.

─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成6年1月12日[Submission date] January 12, 1994

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0029[Name of item to be corrected] 0029

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0029】変形態様1 実施例において、厚膜抵抗6の膜厚と熱履歴後の平均
変化率Rrmとは一定の関係をもつので、この関係を示
すグラフを記憶しておけば、厚膜抵抗6の膜厚を変える
度にこのグラフから平均変化率Rrmをサーチすること
ができ、厚膜抵抗6の膜厚を変える度に一々、平均変化
率Rrmを実験的に導出しなくてもよい。
Modified Example 1 In Example 4 , the film thickness of the thick film resistor 6 and the average rate of change Rrm after thermal history have a constant relationship. Therefore, if a graph showing this relationship is stored, the thick film resistor 6 may be stored. The average change rate Rrm can be searched from this graph each time the film thickness of the resistor 6 is changed, and the average change rate Rrm does not have to be experimentally derived each time the film thickness of the thick film resistor 6 is changed. .

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H05K 1/16 C 6921−4E 3/46 Q 6921−4E C 6921−4E ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification number Office reference number FI Technical display location H05K 1/16 C 6921-4E 3/46 Q 6921-4E C 6921-4E

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 セラミック基板上に厚膜抵抗を印刷し、
焼成する厚膜抵抗形成工程と、前記厚膜抵抗及び前記セ
ラミック基板の表面に複数層の絶縁層を順次、印刷、焼
成する絶縁層形成工程と、前記絶縁層上に配線パタンを
印刷、焼成する配線形成工程とを備える厚膜多層基板の
製造方法において、 前記厚膜抵抗を、前記厚膜抵抗に接する前記絶縁層より
も高温で焼成することを特徴とする厚膜多層基板の製造
方法。
1. A thick film resistor is printed on a ceramic substrate,
A thick film resistor forming step of firing, an insulating layer forming step of sequentially printing and firing a plurality of insulating layers on the surface of the thick film resistor and the ceramic substrate, and a wiring pattern is printed and fired on the insulating layer. A method of manufacturing a thick film multilayer substrate, comprising: a wiring forming step; firing the thick film resistor at a temperature higher than that of the insulating layer in contact with the thick film resistor.
【請求項2】前記厚膜抵抗を前記絶縁層よりも20〜1
00℃高温で焼成する請求項1記載の厚膜多層基板の製
造方法。
2. The thick film resistor is 20 to 1 times thicker than the insulating layer.
The method for producing a thick film multilayer substrate according to claim 1, wherein the thick film multilayer substrate is baked at a high temperature of 00 ° C.
【請求項3】 前記厚膜抵抗は、その後に焼成される前
記絶縁層よりも高温で焼成される請求項1記載の厚膜多
層基板の製造方法。
3. The method for manufacturing a thick film multilayer substrate according to claim 1, wherein the thick film resistor is fired at a temperature higher than that of the insulating layer which is fired thereafter.
【請求項4】 前記厚膜抵抗をレーザートリミングした
後、前記絶縁層を形成する請求項1記載の厚膜多層基板
の製造方法。
4. The method for manufacturing a thick film multilayer substrate according to claim 1, wherein the insulating layer is formed after laser trimming the thick film resistor.
【請求項5】 前記レーザートリミング直後の前記厚膜
抵抗の抵抗値と、前記厚膜抵抗の高温工程終了時の抵抗
値との比率を記憶し、前記比率に基づいて目標抵抗値を
予め補正して得た抵抗値に基づいてレーザートリミング
を実施する請求項1記載の厚膜多層基板の製造方法。
5. A ratio between the resistance value of the thick film resistor immediately after the laser trimming and the resistance value of the thick film resistor at the end of the high temperature process is stored, and the target resistance value is corrected in advance based on the ratio. The method for manufacturing a thick film multilayer substrate according to claim 1, wherein laser trimming is performed based on the resistance value obtained.
【請求項6】前記厚膜抵抗に含まれるガラスを前記厚膜
抵抗又は前記絶縁層の焼成により結晶化ガラスとする請
求項1記載の厚膜多層基板の製造方法。
6. The method for producing a thick film multilayer substrate according to claim 1, wherein the glass contained in the thick film resistor is crystallized glass by firing the thick film resistor or the insulating layer.
JP31054393A 1992-12-22 1993-12-10 Method for producing thick film multilayer substrate Expired - Fee Related JP3635669B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31054393A JP3635669B2 (en) 1992-12-22 1993-12-10 Method for producing thick film multilayer substrate

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP4-342803 1992-12-22
JP34280392 1992-12-22
JP31054393A JP3635669B2 (en) 1992-12-22 1993-12-10 Method for producing thick film multilayer substrate

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2004209427A Division JP3719518B2 (en) 1992-12-22 2004-07-16 Method for producing thick film multilayer substrate

Publications (2)

Publication Number Publication Date
JPH06244362A true JPH06244362A (en) 1994-09-02
JP3635669B2 JP3635669B2 (en) 2005-04-06

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ID=26566362

Family Applications (1)

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Country Link
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990011869A1 (en) * 1989-04-12 1990-10-18 Fanuc Ltd Profile control device
US5659457A (en) * 1995-04-07 1997-08-19 Motorola, Inc. Carbon electrodes and energy storage device made thereof
JP2006073903A (en) * 2004-09-03 2006-03-16 Murata Mfg Co Ltd Ceramic multilayer substrate
JP2008016552A (en) * 2006-07-04 2008-01-24 Toppan Printing Co Ltd Component-mounting substrate, and manufacturing method therefor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990011869A1 (en) * 1989-04-12 1990-10-18 Fanuc Ltd Profile control device
US5659457A (en) * 1995-04-07 1997-08-19 Motorola, Inc. Carbon electrodes and energy storage device made thereof
JP2006073903A (en) * 2004-09-03 2006-03-16 Murata Mfg Co Ltd Ceramic multilayer substrate
JP4548050B2 (en) * 2004-09-03 2010-09-22 株式会社村田製作所 Ceramic multilayer substrate
JP2008016552A (en) * 2006-07-04 2008-01-24 Toppan Printing Co Ltd Component-mounting substrate, and manufacturing method therefor

Also Published As

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