JPH06244091A - Transmission mask and its manufacture - Google Patents

Transmission mask and its manufacture

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Publication number
JPH06244091A
JPH06244091A JP2830893A JP2830893A JPH06244091A JP H06244091 A JPH06244091 A JP H06244091A JP 2830893 A JP2830893 A JP 2830893A JP 2830893 A JP2830893 A JP 2830893A JP H06244091 A JPH06244091 A JP H06244091A
Authority
JP
Japan
Prior art keywords
thin film
semiconductor substrate
mask
transmission
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2830893A
Other languages
Japanese (ja)
Inventor
Satoru Sago
覚 佐合
Juichi Sakamoto
樹一 坂本
Satoru Yamazaki
悟 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2830893A priority Critical patent/JPH06244091A/en
Publication of JPH06244091A publication Critical patent/JPH06244091A/en
Withdrawn legal-status Critical Current

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  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Electron Beam Exposure (AREA)

Abstract

PURPOSE:To improve exposure accuracy and to maintain it stably for a long period regarding a transmission mask used during block exposure of a pattern by using a charged particle beam and a manufacturing method thereof. CONSTITUTION:The title transmission mask for charged particle exposure is constituted by forming charged particle transmission holes 9A, 9B, 9C with a specified pattern configuration in a thin film semiconductor substrate 3 by using the thinned film semiconductor substrate 3 as a mask matrix. The title method is a method of manufacturing a transmission mask wherein at least a surface of a thin film-like semiconductor substrate 3 and the inner surface of the transmission holes 9A, 9B, 9C or at least a surface of the thin film-like semiconductor substrate 3 and the inner surface of the transmission holes 9A, 9B, 9C and the rear of the thin film-like semiconductor substrate are covered with a tungsten film and a transmission mask wherein a tungsten film is formed by chemical vapor deposition method.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、荷電粒子ビームを用い
てパターンのブロック露光を行う際に用いる透過マスク
及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission mask used for block exposure of a pattern using a charged particle beam and a method for manufacturing the same.

【0002】近年、半導体集積回路の高密度化に伴い、
長年にわたって微細パターン形成手段の主流であったフ
ォトリソグラフィに代わって、例えば電子ビームやイオ
ンビーム等の荷電粒子ビームやX線を用いる新しい露光
技術が検討され、実用化されてきている。
With the recent increase in density of semiconductor integrated circuits,
In place of photolithography, which has been the mainstream of fine pattern forming means for many years, new exposure techniques using charged particle beams such as electron beams and ion beams and X-rays have been studied and put into practical use.

【0003】これら新しい露光技術の中、電子ビームを
用いてパターンを形成する電子ビーム露光は、ビームそ
のものを数Åにまで絞ることができるために、1μmあ
るいはそれ以下の微細なパターンを作成できることに大
きな特徴を持つ。ところが従来行われていた電子ビーム
露光はいわゆる「一筆書き」の描画方法であったため
に、微細なパターンになればなるほど小さなビームで描
画露光を行わなければならなくなり、露光時間が莫大に
長くなるという問題があった。そこで、この問題を解決
するために、ブロック露光法が考案された。
Among these new exposure techniques, electron beam exposure in which a pattern is formed using an electron beam is capable of forming a fine pattern of 1 μm or less because the beam itself can be narrowed down to several Å. Has great characteristics. However, the electron beam exposure that has been performed in the past was a so-called "single stroke writing" method, so the finer the pattern, the smaller the beam must be used for drawing and exposing, and the exposure time will be enormously long. There was a problem. Then, in order to solve this problem, the block exposure method was devised.

【0004】荷電粒子ビームによるブロック露光法に
は、マスク母体となる薄膜状の基板に所定のパターン形
状を有する荷電粒子透過孔を形成した透過マスク(ステ
ンシルマスク)が用いられるが、上記マスク母体として
は、加工性や強度を考慮するとシリコン(Si)等の半導
体基板が最適で、Si基板が主として用いられている。
In the block exposure method using a charged particle beam, a transmission mask (stencil mask) in which charged particle transmission holes having a predetermined pattern are formed on a thin film substrate serving as a mask base is used. In consideration of workability and strength, a semiconductor substrate such as silicon (Si) is optimal, and a Si substrate is mainly used.

【0005】Si基板をマスク母体として用いる場合、通
常半導体装置の製造に用いられるのと同じ厚さのSi基板
をそのまま用いてその厚さ分をそのまま透過孔の深さに
すると、深さが深いことに起因して露光量の減少や露光
精度の低下等の悪影響を生ずる。そこで、パターン形成
領域は上記Si基板を可能な限り薄膜(メンブレン)状に
し、この薄膜状Si基板に所定形状のパターン即ち透光孔
が形成されるのが普通である。
When the Si substrate is used as the mask base, if the Si substrate having the same thickness as that used in the manufacture of a semiconductor device is used as it is and the thickness of the Si substrate is used as it is as the depth of the transmission hole, the depth becomes deep. Due to this, adverse effects such as a decrease in exposure amount and a decrease in exposure accuracy occur. Therefore, in the pattern formation region, it is usual that the Si substrate is formed into a thin film (membrane) shape as much as possible, and a pattern having a predetermined shape, that is, a light transmitting hole is formed in the thin film Si substrate.

【0006】[0006]

【従来の技術】従来、上記透過マスクは、以下に図3の
工程断面図を参照して説明する方法により製造されてい
た。
2. Description of the Related Art Conventionally, the above-mentioned transmission mask has been manufactured by a method described below with reference to process sectional views of FIG.

【0007】図3(a) 参照 即ち、支持枠となる第1のSi基板1上にCVD法等によ
り第1の酸化シリコン(SiO2)膜2を形成し、その上にマ
スク母体となる第2のSi基板を載せ、加熱して、第1の
Si基板1上に第1のSiO2膜2を介し第2のSi基板を接着
させた後、第2のSi基板を化学的且つ機械的に例えば20
μm程度の厚さまでポリッシングし、第1のSi基板1上
に上記薄膜化された第2のSi基板からなる薄膜状Si基板
3が前記第1のSiO2膜2を介して接着されてなるSiの貼
り合わせ基板を形成する。
Referring to FIG. 3 (a), that is, a first silicon oxide (SiO 2 ) film 2 is formed on a first Si substrate 1 serving as a supporting frame by a CVD method or the like, and a first mask substrate is formed on the first silicon oxide (SiO 2 ) film 2. Place the Si substrate of No. 2 and heat it to
After adhering the second Si substrate onto the Si substrate 1 via the first SiO 2 film 2, the second Si substrate is chemically and mechanically bonded to, for example, 20
Si obtained by polishing the first Si substrate 1 to a thickness of about μm, and adhering a thin film Si substrate 3 made of the thinned second Si substrate on the first Si substrate 1 through the first SiO 2 film 2. To form a bonded substrate.

【0008】図3(b) 参照 次いで、上記貼り合わせ基板の表面即ち薄膜状Si基板3
の表面上に、後に荷電粒子の透過孔パターンのエッチン
グマスクに用いられる第2のSiO2膜(またはPSG膜)
4をCVD法等により形成した後、この貼り合わせ基板
の全面上を、CVD法を用いて窒化シリコン(Si3N4) 膜
5で覆う。
Next, referring to FIG. 3B, the surface of the bonded substrate, that is, the thin film Si substrate 3
Second SiO 2 film (or PSG film) that will be used later as an etching mask for the pattern of the through holes of charged particles on the surface of the
After forming 4 by the CVD method or the like, the entire surface of this bonded substrate is covered with a silicon nitride (Si 3 N 4 ) film 5 by the CVD method.

【0009】図3(c) 参照 次いで貼り合わせ基板の下面即ち第1のSi基板1の下面
上のSi3N4 膜5に、通常のフォトリソグラフィ手段及び
ドライエッチング手段を用いマスクパターン形成領域を
画定するエッチング用開口6を形成する。
Referring to FIG. 3 (c), a mask pattern forming region is formed on the Si 3 N 4 film 5 on the lower surface of the bonded substrate, that is, the lower surface of the first Si substrate 1 by using ordinary photolithography means and dry etching means. The defining etching opening 6 is formed.

【0010】図3(d) 参照 次いで残留しているSi3N4 膜5をマスクにし、前記Si3N
4 膜5のエッチング用開口6を介し、且つ前記第1のSi
O2膜2をエッチングストッパにして第1のSi基板1を、
裏面から、水酸化カリウム(KOH) 溶液によりバックエッ
チングし、第1のSi基板1にマスクパターン形成領域画
定窓7を形成する。ここで、第1のSi基板からなる薄膜
状Si基板3の支持枠1Fが形成される。
[0010] FIG. 3 (d) was the Si 3 N 4 film 5 to reference and then remaining in a mask, the Si 3 N
4 through the etching opening 6 of the film 5 and the first Si
Using the O 2 film 2 as an etching stopper, the first Si substrate 1 is
Back etching is performed from the back surface with a potassium hydroxide (KOH) solution to form a mask pattern formation region defining window 7 in the first Si substrate 1. Here, the support frame 1F of the thin film Si substrate 3 made of the first Si substrate is formed.

【0011】図3(e) 参照 次いで、Si3N4 膜5を除去した後、通常の電子ビームリ
ソグラフィ手段とドライエッチング手段を用い、第2の
SiO2膜4に所定の透過孔パターン形状を有するエッチン
グ用の開孔8A、8B、8C等を形成し、次いでこのエッチン
グ用開孔8を介し、ドライエッチング手段によりて薄膜
状Si基板3に所定パターン形状を有する透過孔パターン
9A、9B、9C等を形成する。
Next, after removing the Si 3 N 4 film 5, a second electron beam lithography means and a dry etching means are used to remove the second
Etching holes 8A, 8B, 8C, etc. having a predetermined transmission hole pattern shape are formed in the SiO 2 film 4, and then the thin film Si substrate 3 is predetermined through the etching holes 8 by a dry etching means. Transmission hole pattern having a pattern shape
9A, 9B, 9C, etc. are formed.

【0012】図3(f) 参照 次いで、ウェットエッチング手段により薄膜状Si基板3
上の第2のSiO2膜4及び前記マスクパターン形成領域画
定窓7の底部に表出する第1のSiO2膜2を選択的に除去
することにより、従来の荷電粒子露光用の透過マスク10
は形成されていた。
Next, referring to FIG. 3 (f), the thin film Si substrate 3 is formed by wet etching means.
By selectively removing the upper second SiO 2 film 4 and the first SiO 2 film 2 exposed at the bottom of the mask pattern formation region defining window 7, the conventional transmission mask 10 for charged particle exposure.
Had been formed.

【0013】[0013]

【発明が解決しようとする課題】しかし上記方法で形成
された従来の透過マスクにおいては、薄膜状Si基板3が
絶縁体に近く、且つ第2のSiO2膜4によって支持枠1Fか
ら絶縁された構造であるため、荷電粒子ビームを用いて
露光を行った場合、薄膜状Si基板3がチャージアップし
易く、その結果、荷電粒子ビームはこの薄膜状Si基板3
の表面近傍で曲げられて、露光量や露光精度が著しく低
下するという問題があった。
However, in the conventional transmission mask formed by the above method, the thin film Si substrate 3 is close to the insulator and is insulated from the support frame 1F by the second SiO 2 film 4. Due to the structure, when the charged particle beam is used for exposure, the thin film Si substrate 3 is easily charged up, and as a result, the charged particle beam is generated by the thin film Si substrate 3
There is a problem that the amount of exposure and the exposure accuracy are significantly reduced due to bending near the surface of the.

【0014】また、上記薄膜状Si基板を、前記貼り合わ
せ法以外に、厚いSi基板内にボロンの注入等によって前
記KOH エッチングのストッパを形成することによって一
枚のSi基板から造り分ける方法もあるが、何れにしても
透過孔パターンの形成される領域は薄膜化されているの
で、前記と同様の現象が生じる。
In addition to the above-mentioned bonding method, there is also a method of forming the above-mentioned thin film Si substrate from one Si substrate by forming the KOH etching stopper by injecting boron into the thick Si substrate. However, in any case, since the region where the transmission hole pattern is formed is made thin, the same phenomenon as described above occurs.

【0015】そこで従来、図4に示すように、マスクの
表面に導電性を有する金(Au)等の貴金属膜11を被着して
前記透過孔パターン形成領域のチャージアップを防止す
る改良構造も提供されたが、この構造においても、上記
貴金属膜11の形成が蒸着或いはスパッタ等のPVD法に
より行われるのが一般的であって、貴金属膜11はマスク
の表面部のみに堆積され、マスクの裏面側即ち前記薄膜
状Si基板3の裏面及び透過孔パターン9A、9B、9C等の内
面等には殆ど堆積されないので薄膜状Si基板3の抵抗の
減少が充分でなく、また、表面に堆積した貴金属膜11が
電子ビーム照射により加熱されることによってSiと反応
してSi中に拡散してしまって表面は再び高抵抗化するこ
と等によって、薄膜状Si基板3のチャージアップが充分
には防止されず、露光精度の低下等を充分に回避するこ
とができなかった。
Therefore, conventionally, as shown in FIG. 4, there is also an improved structure in which a noble metal film 11 having conductivity such as gold (Au) is deposited on the surface of the mask to prevent charge-up in the through hole pattern forming region. Although provided, even in this structure, the formation of the noble metal film 11 is generally performed by a PVD method such as vapor deposition or sputtering, and the noble metal film 11 is deposited only on the surface portion of the mask, Since the back surface side, that is, the back surface of the thin film Si substrate 3 and the inner surfaces of the through hole patterns 9A, 9B, 9C, etc. are hardly deposited, the resistance of the thin film Si substrate 3 is not sufficiently reduced and is deposited on the front surface. When the noble metal film 11 is heated by electron beam irradiation, it reacts with Si and diffuses into Si to increase the resistance again, so that the charge-up of the thin film Si substrate 3 is sufficiently prevented. Not exposure accuracy It was not possible to sufficiently avoid such a decrease.

【0016】そこで本発明は、荷電粒子ビームによる露
光に際してチャージアップが充分に防止されて露光精度
が高められる透過マスクの構造及びその製造方法を提供
することを目的とする。
Therefore, an object of the present invention is to provide a structure of a transmission mask in which charge-up is sufficiently prevented during exposure by a charged particle beam and exposure accuracy is improved, and a method for manufacturing the same.

【0017】[0017]

【課題を解決するための手段】上記課題の解決は、マス
ク母体に薄膜化した半導体基板を用い該薄膜化半導体基
板に所定のパターン形状を有する荷電粒子透過孔が形成
されてなる荷電粒子露光用の透過マスクであって、少な
くとも該薄膜状半導体基板の表面及び該透過孔の内面、
若しくは少なくとも該薄膜状半導体基板の表面と該透過
孔の内面及び該薄膜状半導体基板の裏面がタングステン
膜で覆われている本発明による透過マスク、若しくは、
上記透過マスクを製造するに際して、前記薄膜状半導体
基板に前記荷電粒子透過孔を形成して後、少なくとも該
薄膜状半導体基板の表面及び該透過孔の内面、若しくは
該薄膜状半導体基板の表面と該透過孔の内面及び該薄膜
状半導体基板の裏面に、化学気相成長法によりタングス
テン膜を被着させる工程を有する本発明による透過マス
クの製造方法によって達成される。
Means for Solving the Problems To solve the above-mentioned problems, a semiconductor substrate having a thin film is used as a mask base, and a thin film semiconductor substrate is provided with a charged particle transmission hole having a predetermined pattern shape. A transparent mask of at least the surface of the thin film semiconductor substrate and the inner surface of the transparent hole,
Alternatively, at least the front surface of the thin film semiconductor substrate, the inner surface of the transparent hole, and the back surface of the thin film semiconductor substrate are covered with a tungsten film according to the present invention, or
In manufacturing the transmission mask, after forming the charged particle transmission holes in the thin film semiconductor substrate, at least the surface of the thin film semiconductor substrate and the inner surface of the transmission hole, or the surface of the thin film semiconductor substrate and This is achieved by the method of manufacturing a transmission mask according to the present invention, which has a step of depositing a tungsten film on the inner surface of the transmission hole and the back surface of the thin film semiconductor substrate by chemical vapor deposition.

【0018】[0018]

【作用】即ち本発明に係る透過マスクにおいては、マス
ク母体となる薄膜状半導体基板の表面及び荷電粒子透過
孔パターンの内面、或いは薄膜状半導体基板の表面と荷
電粒子透過孔パターンの内面及び薄膜状半導体基板の裏
面に高導電性を有するタングステン膜をCVD法を用い
て被着することによって薄膜状半導体基板を低抵抗に保
ち、これによってマスク母体である薄膜状半導体基板の
チャージアップを防止して荷電粒子ビームによる透過露
光の精度を向上させるものである。
That is, in the transmission mask according to the present invention, the surface of the thin film semiconductor substrate and the inner surface of the charged particle transmission hole pattern serving as the mask matrix, or the surface of the thin film semiconductor substrate and the inner surface of the charged particle transmission hole pattern and the thin film shape A thin film semiconductor substrate is kept at a low resistance by depositing a highly conductive tungsten film on the back surface of the semiconductor substrate by using a CVD method, thereby preventing charge-up of the thin film semiconductor substrate which is a mask base. This is to improve the accuracy of transmission exposure with a charged particle beam.

【0019】また、タングステン金属の融点は3387℃と
高いので、荷電粒子ビーム照射による昇温によってタン
グステン膜が薄膜状半導体基板と反応して消失すること
がなく、且つ熱膨張率が 4.5×10-6(293K)でSiの熱膨張
率 2.6×10-6(293K)に比較的近いために荷電粒子ビーム
露光の際の温度変化によるストレスによってタングステ
ン膜が薄膜状半導体基板面から剥離することも少ないの
で前記高精度の性能は長期にわたって安定に維持され
る。
Further, since the melting point of tungsten metal is as high as 3387 ° C., the tungsten film does not react with the thin film semiconductor substrate to disappear due to the temperature rise due to the irradiation of the charged particle beam, and the coefficient of thermal expansion is 4.5 × 10 −5. Since the thermal expansion coefficient of Si at 6 (293K) is relatively close to 2.6 × 10 -6 (293K), the tungsten film is less likely to peel off from the surface of the thin film semiconductor substrate due to the stress due to temperature change during charged particle beam exposure. Therefore, the high precision performance is stably maintained for a long period of time.

【0020】[0020]

【実施例】以下本発明を、図示実施例により具体的に説
明する。図1は本発明に係る透過マスクの一実施例の模
式断面図で、図2は本発明に係る透過マスクの他の実施
例の模式断面図である。全図を通じ同一対象物は同一符
合で示す。
EXAMPLES The present invention will be described in detail below with reference to illustrated examples. FIG. 1 is a schematic sectional view of an embodiment of a transmission mask according to the present invention, and FIG. 2 is a schematic sectional view of another embodiment of a transmission mask according to the present invention. The same object is denoted by the same reference numeral throughout the drawings.

【0021】本発明に係る荷電粒子ビーム露光用の透過
マスクは、例えば図1に示すように、第1のSi基板から
なりマスクパターン形成領域画定窓7を囲む支持枠1F上
に、厚さ1μm程度の第1のSiO2膜2を介してマスク母
体となる厚さ20μm程度の薄膜状Si基板3が接着され、
この薄膜状Si基板3におけるマスクパターン形成領域画
定窓7上に下面が表出する領域に所定形状を有する荷電
粒子ビームの透過孔パターン9A、9B、9C等が形成されて
なる、図3(f) に示された従来構造と同様な裸マスクの
薄膜状Si基板3の表面3Sと透過孔パターン9A、9B、9C等
の内面に、厚さ0.05〜0.1 μm程度のタングステン膜12
が被着される。
The transmission mask for charged particle beam exposure according to the present invention is, for example, as shown in FIG. 1, formed on a supporting frame 1F made of a first Si substrate and surrounding a mask pattern formation region defining window 7 and having a thickness of 1 μm. A thin-film Si substrate 3 having a thickness of about 20 μm, which serves as a mask base, is adhered through the first SiO 2 film 2 having a thickness of about 2 μm.
On the mask pattern formation region defining window 7 of the thin film Si substrate 3, the charged particle beam transmission hole patterns 9A, 9B, 9C having a predetermined shape are formed in the region where the lower surface is exposed, as shown in FIG. The thin film Si substrate 3 having a bare mask similar to that of the conventional structure shown in FIG. 2) and the inner surface of the through hole patterns 9A, 9B, 9C, etc., have a tungsten film 12 of about 0.05 to 0.1 μm thick.
Is put on.

【0022】上記、薄膜状Si基板3の表面3S及び透過孔
パターン9A、9B、9C等の内面へのタングステン膜12の被
着は、前記裸マスクをサセプタ上に薄膜状Si基板3面を
上にして搭載して、本発明の方法で規定するようにタン
グステン膜12をCVD法により成長させることにより容
易になされる。なおこの場合、マスク側面10にもタング
ステン膜12が被着する。但し、成長には選択性があるの
で、絶縁膜である第1のSiO2膜2の端面上への成長厚さ
は他の部分よりも薄くなる。
To deposit the tungsten film 12 on the surface 3S of the thin film Si substrate 3 and the inner surfaces of the through hole patterns 9A, 9B, 9C, etc., the bare mask is placed on the susceptor and the surface of the thin Si substrate 3 is placed on top. And the tungsten film 12 is grown by the CVD method as defined by the method of the present invention. In this case, the tungsten film 12 is also deposited on the mask side surface 10. However, since the growth has selectivity, the growth thickness on the end face of the first SiO 2 film 2, which is an insulating film, is thinner than other portions.

【0023】上記タングステン膜12被着に際してのCV
Dは、例えば第1成長と第2成長とからなり、それぞれ
の条件は下記の通りである。 第1成長 成長ガス組成 6弗化タングステン(WF6) 3 sccm 水素(H2) 70 sccm 成長圧力 20 mTorr 成長温度 280 ℃ 成長時間 10 sec 第2成長 成長ガス組成 WF6 3 sccm モノシラン(SiH4) 2 sccm H2 70 sccm 成長圧力 20〜30 mTorr 成長温度 280 ℃ 成長時間 〜90 sec また、図2に示す他の実施例においては、前記実施例に
用いられたのと同様な裸マスク(図3(f) に示される構
造)の薄膜状Si基板3の表面3Sと透過孔パターン9A、9
B、9C等の内面及び薄膜状Si基板3の裏面3Bに厚さO.05
〜0.10μm程度のタングステン膜11が被着される。
CV when depositing the tungsten film 12
D consists of, for example, the first growth and the second growth, and the respective conditions are as follows. First growth Growth gas composition Tungsten hexafluoride (WF 6 ) 3 sccm Hydrogen (H 2 ) 70 sccm Growth pressure 20 mTorr Growth temperature 280 ℃ Growth time 10 sec Second growth Growth gas composition WF 6 3 sccm Monosilane (SiH 4 ) 2 sccm H 2 70 sccm Growth pressure 20 to 30 mTorr Growth temperature 280 ° C. Growth time to 90 seconds In another embodiment shown in FIG. 2, a bare mask similar to that used in the above embodiment (see FIG. (Structure shown in (f)) Surface 3S of thin film Si substrate 3 and through hole patterns 9A, 9
Thickness of O.05 on the inner surface of B, 9C, etc. and the back surface 3B of the thin film Si substrate 3.
A tungsten film 11 of about 0.10 μm is deposited.

【0024】この実施例のように、薄膜状Si基板3の表
面3Sと透過孔パターン9A、9B、9C等の内面及び薄膜状Si
基板3の裏面3Bにタングステン膜12を被着させるには、
前記裸マスクを側面からクランプして成長ガス雰囲気内
に装置の器壁から浮かせて保持し、本発明の方法に規定
するようにタングステン膜12をCVD法により成長させ
ればよい。なお、この際マスクの側面10及び支持枠1Fの
下面及びマスクパターン形成領域画定窓7の内面にもタ
ングステン膜12が被着する。但し、成長には選択性があ
るので、絶縁膜である第1のSiO2膜2の端面上への成長
厚さは他の部分よりも薄くなる。
As in this embodiment, the surface 3S of the thin film Si substrate 3 and the inner surfaces of the through hole patterns 9A, 9B, 9C and the thin film Si are formed.
To deposit the tungsten film 12 on the back surface 3B of the substrate 3,
The bare mask may be clamped from the side and kept floating in the growth gas atmosphere from the device wall, and the tungsten film 12 may be grown by the CVD method as specified in the method of the present invention. At this time, the tungsten film 12 is also deposited on the side surface 10 of the mask, the lower surface of the support frame 1F, and the inner surface of the mask pattern formation region defining window 7. However, since the growth has selectivity, the growth thickness on the end face of the first SiO 2 film 2, which is an insulating film, is thinner than other portions.

【0025】なおまた、この実施例に用いたタングステ
ン膜12のCVD条件は、前記実施例と同様である。以上
の実施例から明らかなように、本発明に係る透過マスク
は、マスク母体の薄膜状半導体基板の表面及び荷電粒子
ビーム透過孔の内面、或いは薄膜状半導体基板の表面と
荷電粒子ビーム透過孔の内面及び薄膜状半導体基板の裏
面とが高導電性を有するタングステン膜に覆われている
ので、荷電粒子ビームの照射によって表面に発生するチ
ャージは、このタングステン膜を通して外部に放電され
る。従って、例えば電子ビーム等の荷電粒子ビームによ
る露光に際して、マスク母体の薄膜状半導体基板がチャ
ージアップすることがなくなり、前記ビームの偏向が防
止されて露光精度が向上する。またタングステンは熱膨
張率が半導体例えばSiに比較的近いので、上記露光に際
しての温度の変化によりタングステン膜が剥離すること
は少なく、更にタングステンが高融点で露光に際しての
昇温によってSiと反応することもないので、上記高露光
精度の性能は長期にわたって安定に維持される。
The CVD conditions for the tungsten film 12 used in this embodiment are the same as those in the above embodiment. As apparent from the above examples, the transmission mask according to the present invention, the surface of the thin film semiconductor substrate of the mask base and the inner surface of the charged particle beam transmission hole, or the surface of the thin film semiconductor substrate and the charged particle beam transmission hole. Since the inner surface and the back surface of the thin film semiconductor substrate are covered with the tungsten film having high conductivity, the charges generated on the surface by the irradiation of the charged particle beam are discharged to the outside through the tungsten film. Therefore, during exposure with a charged particle beam such as an electron beam, the thin film semiconductor substrate of the mask base is not charged up, the deflection of the beam is prevented, and the exposure accuracy is improved. Further, since the coefficient of thermal expansion of tungsten is relatively close to that of a semiconductor such as Si, the tungsten film is less likely to be peeled off due to the temperature change during the exposure, and the tungsten has a high melting point and reacts with Si due to the temperature rise during the exposure. Therefore, the performance of the high exposure accuracy is stably maintained for a long period of time.

【0026】[0026]

【発明の効果】以上説明のように本発明によれば、荷電
粒子露光用透過マスクの露光精度を向上し、且つその高
精度を長期にわたって安定に維持することができる。
As described above, according to the present invention, it is possible to improve the exposure accuracy of the transmission mask for exposing charged particles and to maintain the high accuracy stably for a long period of time.

【0027】従って本発明は、高密度化される半導体装
置の製造工程の信頼性向上に寄与するところが大きい。
Therefore, the present invention largely contributes to the improvement of the reliability of the manufacturing process of the semiconductor device of high density.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明に係る透過マスクの一実施例の模式断
面図
FIG. 1 is a schematic sectional view of an embodiment of a transmission mask according to the present invention.

【図2】 本発明に係る透過マスクの他の実施例の模式
断面図
FIG. 2 is a schematic sectional view of another embodiment of the transmission mask according to the present invention.

【図3】 従来の透過マスクの製造工程断面図FIG. 3 is a sectional view of a manufacturing process of a conventional transmission mask.

【図4】 従来の改良構造の透過マスクの模式断面図FIG. 4 is a schematic sectional view of a conventional transparent mask having an improved structure.

【符号の説明】[Explanation of symbols]

1 第1のSi基板 1F 支持枠 2 第1のSiO2膜 3 薄膜状Si基板 3S 表面 3B 裏面 4 第2のSiO2膜 5 Si3N4 膜 6 エッチング用開口 7 マスクパターン形成領域画定窓 8A、8B、8C エッチング用開孔 9A、9B、9C 透過孔パターン 10 マスクの側面 11 貴金属膜 12 タングステン膜1 First Si substrate 1F Support frame 2 First SiO 2 film 3 Thin film Si substrate 3S Front surface 3B Back surface 4 Second SiO 2 film 5 Si 3 N 4 film 6 Etching opening 7 Mask pattern formation area defining window 8A , 8B, 8C Etching holes 9A, 9B, 9C Transmission hole pattern 10 Side of mask 11 Noble metal film 12 Tungsten film

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 マスク母体に薄膜化した半導体基板を用
い該薄膜化半導体基板に所定のパターン形状を有する荷
電粒子透過孔が形成されてなる荷電粒子露光用の透過マ
スクであって、少なくとも該薄膜状半導体基板の表面及
び該透過孔の内面、若しくは少なくとも該薄膜状半導体
基板の表面と該透過孔の内面及び該薄膜状半導体基板の
裏面がタングステン膜で覆われていることを特徴とする
透過マスク。
1. A transmission mask for charged particle exposure, comprising a semiconductor substrate having a thin film as a mask base and formed with charged particle transmission holes having a predetermined pattern shape on the thinned semiconductor substrate, wherein at least the thin film. Transparent semiconductor substrate and the inner surface of the transparent hole, or at least the surface of the thin film semiconductor substrate and the inner surface of the transparent hole and the back surface of the thin film semiconductor substrate are covered with a tungsten film. .
【請求項2】 請求項1記載の透過マスクを製造するに
際して、前記薄膜状半導体基板に前記荷電粒子透過孔を
形成して後、少なくとも該薄膜状半導体基板の表面及び
該透過孔の内面、若しくは該薄膜状半導体基板の表面と
該透過孔の内面及び該薄膜状半導体基板の裏面に、化学
気相成長法によりタングステン膜を被着させる工程を有
することを特徴とする透過マスクの製造方法。
2. In manufacturing the transmission mask according to claim 1, after forming the charged particle transmission holes in the thin film semiconductor substrate, at least the surface of the thin film semiconductor substrate and the inner surface of the transmission hole, or A method of manufacturing a transmission mask, comprising a step of depositing a tungsten film on the front surface of the thin film semiconductor substrate, the inner surface of the transmission hole, and the back surface of the thin film semiconductor substrate by chemical vapor deposition.
JP2830893A 1993-02-18 1993-02-18 Transmission mask and its manufacture Withdrawn JPH06244091A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2830893A JPH06244091A (en) 1993-02-18 1993-02-18 Transmission mask and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2830893A JPH06244091A (en) 1993-02-18 1993-02-18 Transmission mask and its manufacture

Publications (1)

Publication Number Publication Date
JPH06244091A true JPH06244091A (en) 1994-09-02

Family

ID=12244994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2830893A Withdrawn JPH06244091A (en) 1993-02-18 1993-02-18 Transmission mask and its manufacture

Country Status (1)

Country Link
JP (1) JPH06244091A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07326556A (en) * 1994-06-02 1995-12-12 Nec Corp Aperture for electronic beam plotter
JPH10340852A (en) * 1997-06-09 1998-12-22 Hoya Corp Substrate for transfer mask and manufacture of transfer mask using the substrate
JP2003007589A (en) * 2001-06-20 2003-01-10 Toppan Printing Co Ltd Stencil mask, its manufacturing method and exposing method
US7179569B2 (en) * 2000-10-31 2007-02-20 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device, stencil mask and method for manufacturing the same
US7327013B2 (en) 2002-12-26 2008-02-05 Kabushiki Kaisha Toshiba Stencil mask with charge-up prevention and method of manufacturing the same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07326556A (en) * 1994-06-02 1995-12-12 Nec Corp Aperture for electronic beam plotter
JP2606138B2 (en) * 1994-06-02 1997-04-30 日本電気株式会社 Aperture for electron beam writing system
JPH10340852A (en) * 1997-06-09 1998-12-22 Hoya Corp Substrate for transfer mask and manufacture of transfer mask using the substrate
US7179569B2 (en) * 2000-10-31 2007-02-20 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device, stencil mask and method for manufacturing the same
US7459246B2 (en) 2000-10-31 2008-12-02 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device, stencil mask and method for manufacturing a the same
US7745073B2 (en) 2000-10-31 2010-06-29 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device, stencil mask and method for manufacturing a the same
JP2003007589A (en) * 2001-06-20 2003-01-10 Toppan Printing Co Ltd Stencil mask, its manufacturing method and exposing method
US7327013B2 (en) 2002-12-26 2008-02-05 Kabushiki Kaisha Toshiba Stencil mask with charge-up prevention and method of manufacturing the same

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