JPH06216192A - Method for connecting electronic part - Google Patents

Method for connecting electronic part

Info

Publication number
JPH06216192A
JPH06216192A JP2054393A JP2054393A JPH06216192A JP H06216192 A JPH06216192 A JP H06216192A JP 2054393 A JP2054393 A JP 2054393A JP 2054393 A JP2054393 A JP 2054393A JP H06216192 A JPH06216192 A JP H06216192A
Authority
JP
Japan
Prior art keywords
wiring pattern
tape
film carrier
chip
carrier tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2054393A
Other languages
Japanese (ja)
Inventor
Katsuya Kosuge
克也 小菅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2054393A priority Critical patent/JPH06216192A/en
Publication of JPH06216192A publication Critical patent/JPH06216192A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To simplify the manufacturing process, by supplying solder pastes to the through hole bored in a film carrier tape and to a part connecting land of a wiring pattern laid on the surface of the tape, and by placing respectively the electrode sections of a chip part on the solder pastes, and further, by soldering respectively the electrode sections of the chip part to the land and to a wiring pattern laid on the rear surface of the tape. CONSTITUTION:A chip part 8 to be mounted on a wiring pattern 2 laid on the surface of a film carrier tape 1 is connected electrically with a semiconductor chip 5 mounted on a wiring pattern 3 laid on the rear surface of the tape 1. That is, first, solder pastes 9 are supplied respectively to a through hole 7 bored in the film carrier tape 1 and to a part connecting land 2a of the wiring pattern 2 laid on the surface of the tape 1. Then, electrode sections 8a provided at both the ends of the chip part 8 are placed respectively on the solder pastes 9. Subsequently, the solder pastes 9 are fused, and the electrode sections 8a of the chip part 8 are soldered respectively to the land 2a and to the wiring pattern 3 laid on the rear surface of the tape 1 via the through hole 7.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、ＴＡＢ（Ｔａｐｅ Ａ
ｕｔｏｍａｔｅｄ Ｂｏｎｄｉｎｇ）技術を用いた部品
実装における電子部品の接続方法に関するものである。BACKGROUND OF THE INVENTION The present invention relates to TAB (Tape A
The present invention relates to a method of connecting electronic components in component mounting using automated bonding technology.

【０００２】[0002]

【従来の技術】従来より、ＴＡＢ技術を用いた部品実装
においては、フィルムキャリアテープの表裏面にそれぞ
れ配線パターンを積層して、裏面の配線パターンには半
導体チップを実装し、表面の配線パターンにはチップ抵
抗やチップコンデンサといった、いわゆるチップ部品を
実装したものがある。2. Description of the Related Art Conventionally, in the component mounting using the TAB technology, wiring patterns are laminated on the front and back surfaces of a film carrier tape, a semiconductor chip is mounted on the wiring pattern on the back surface, and a wiring pattern is formed on the front surface. There is a so-called chip component mounted such as a chip resistor or a chip capacitor.

【０００３】このような実装構造においては、裏面の配
線パターンに実装された半導体チップに対して、表面の
配線パターンに実装されたチップ部品が以下の方法によ
って電気的に接続されていた。すなわち、フィルムキャ
リアテープの所定位置にスルーホールを形成し、このス
ルーホールを介してフィルム表裏面の各配線パターンに
実装された半導体チップとチップ部品とを電気的に接続
していた。In such a mounting structure, the chip component mounted on the front surface wiring pattern is electrically connected to the semiconductor chip mounted on the rear surface wiring pattern by the following method. That is, a through hole is formed at a predetermined position of the film carrier tape, and the semiconductor chip mounted on each wiring pattern on the front and back surfaces of the film is electrically connected to the chip component through the through hole.

【０００４】[0004]

【発明が解決しようとする課題】しかしながら、上記従
来方法のようにフィルムキャリアテープにスルーホール
を形成して電子部品同士を接続する場合は、孔のメッキ
処理が必要となるため、製造工程が非常に複雑になるう
え、製品のコスト高を招いてしまう。However, when the through holes are formed in the film carrier tape to connect the electronic parts to each other as in the conventional method described above, it is necessary to plate the holes, so that the manufacturing process is very difficult. In addition to being complicated, the cost of the product is increased.

【０００５】本発明は、上記問題を解決するためになさ
れたもので、製造工程の簡略化を可能とした電子部品の
接続方法を提供することを目的とする。The present invention has been made to solve the above problems, and an object of the present invention is to provide a method of connecting electronic components that enables simplification of the manufacturing process.

【０００６】[0006]

【課題を解決するための手段】本発明は、上記目的を達
成するためになされたもので、フィルムキャリアテープ
の表裏面に積層された配線パターンのうち、裏面の配線
パターンに実装された半導体チップに対して、表面の配
線パターンに実装されるチップ部品を電気的に接続する
ための方法であって、フィルムキャリアテープに穿設さ
れた貫通孔と表面の配線パターンの部品接続用ランドと
にはんだペーストを供給する第１の工程と、チップ部品
の両端に設けられた電極部を第１の工程で供給されたは
んだペースト上に位置決め載置する第２の工程と、はん
だペーストを溶融して、裏面の配線パターンに貫通孔を
介してチップ部品の電極部をはんだ付けする第３の工程
とから成るものである。The present invention has been made in order to achieve the above-mentioned object, and among the wiring patterns laminated on the front and back surfaces of the film carrier tape, a semiconductor chip mounted on the back wiring pattern. On the other hand, a method for electrically connecting a chip component mounted on a surface wiring pattern, which is soldered to a through hole formed in a film carrier tape and a component connection land of the surface wiring pattern. A first step of supplying the paste, a second step of positioning and placing the electrode portions provided at both ends of the chip component on the solder paste supplied in the first step, melting the solder paste, The third step is to solder the electrode portion of the chip component to the wiring pattern on the back surface through the through hole.

【０００７】[0007]

【作用】本発明の電子部品の接続方法においては、まず
第１の工程でフィルムキャリアテープに穿設された貫通
孔と表面の配線パターンの部品接続用ランドとにはんだ
ペーストが供給され、次いで第２の工程でチップ部品の
両端に設けられた電極部が第１の工程で供給されたはん
だペースト上に位置決め載置され、続いて第３の工程で
はんだペーストが溶融されて、裏面の配線パターンに貫
通孔を介してチップ部品の電極部がはんだ付けされる。In the method of connecting electronic parts of the present invention, first, in the first step, the solder paste is supplied to the through holes formed in the film carrier tape and the parts connecting lands of the surface wiring pattern, and then the second step. The electrode parts provided at both ends of the chip component in step 2 are positioned and placed on the solder paste supplied in the first step, and then the solder paste is melted in the third step to form the wiring pattern on the back surface. The electrode portion of the chip component is soldered to the through hole.

【０００８】[0008]

【実施例】以下、本発明の実施例を図面に基づいて詳細
に説明する。図１は、本発明に係わる電子部品の接続方
法を説明するための図である。まず図１（ａ）において
は、フィルムキャリアテープ１の表裏面にそれぞれ配線
パターン２、３が積層されており、このうち裏面の配線
パターン３にはバンプ４を介して半導体チップ５が実装
されている。そして、この半導体チップ５は保護樹脂６
によって封止されている。また、フィルムキャリアテー
プ１の所定位置には貫通孔７が穿設されており、この貫
通孔７はテープ打ち抜きの際にデバイスホールなどと同
時に形成されたものである。Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a diagram for explaining a method of connecting electronic components according to the present invention. First, in FIG. 1 (a), wiring patterns 2 and 3 are laminated on the front and back surfaces of a film carrier tape 1, of which the semiconductor chip 5 is mounted on the wiring pattern 3 on the back surface via bumps 4. There is. Then, the semiconductor chip 5 has a protective resin 6
It is sealed by. A through hole 7 is formed at a predetermined position of the film carrier tape 1, and the through hole 7 is formed at the same time as a device hole or the like when the tape is punched.

【０００９】ここで、本実施例の電子部品の接続方法で
は、裏面の配線パターン３に実装された半導体チップ５
に対して、表面の配線パターン２に実装されるチップ部
品８（例えばチップ抵抗やチップコンデンサなど）が以
下の方法によって電気的に接続される。すなわち、第１
の工程では、図１（ｂ）に示すようにフィルムキャリア
テープ１に穿設された貫通孔７と表面の配線パターン２
の部品接続用ランド２ａとにはんだペースト９を供給す
る。この場合のはんだペースト９の供給方法としては、
例えばスクリーン印刷法やディスペンサ吐出法などを採
用することができる。Here, in the method of connecting electronic components of this embodiment, the semiconductor chip 5 mounted on the wiring pattern 3 on the back surface is mounted.
On the other hand, the chip component 8 (for example, a chip resistor or a chip capacitor) mounted on the front surface wiring pattern 2 is electrically connected by the following method. That is, the first
In the step, as shown in FIG. 1B, the through holes 7 formed in the film carrier tape 1 and the wiring pattern 2 on the surface are formed.
The solder paste 9 is supplied to the component connecting lands 2a. In this case, as a method of supplying the solder paste 9,
For example, a screen printing method or a dispenser ejection method can be adopted.

【００１０】次いで、第２の工程では、同じく図１
（ｂ）に示すようにチップ部品８の両端に設けられた電
極部８ａを上記第１の工程で供給されたはんだペースト
９上に位置決め載置する。このとき、チップ部品８はは
んだペースト９の粘着性によってフィルムキャリアテー
プ１の表面側に仮固定される。Next, in the second step, the same process as shown in FIG.
As shown in (b), the electrode parts 8a provided on both ends of the chip component 8 are positioned and placed on the solder paste 9 supplied in the first step. At this time, the chip component 8 is temporarily fixed to the front surface side of the film carrier tape 1 by the adhesiveness of the solder paste 9.

【００１１】続いて、第３の工程では、図１（ｃ）に示
すように上記はんだペースト９を例えばリフローソルダ
リング法によって溶融し、裏面の配線パターン３に貫通
孔７を介してチップ部品８の電極部８ａをはんだ付けす
る。このとき、チップ部品８のもう一方の電極部８ａは
表面の配線パターン２の部品接続用ランド２ａにはんだ
付けされ、これにより表面の配線パターン２に実装され
たチップ部品８が裏面の配線パターン３に実装された半
導体チップ５に電気的に接続される。Subsequently, in a third step, as shown in FIG. 1C, the solder paste 9 is melted by, for example, a reflow soldering method, and the wiring pattern 3 on the rear surface is chipped through the through holes 7 and the chip component 8 is formed. The electrode part 8a of is soldered. At this time, the other electrode portion 8a of the chip component 8 is soldered to the component connection land 2a of the front surface wiring pattern 2, so that the chip component 8 mounted on the front surface wiring pattern 2 has the rear surface wiring pattern 3a. Is electrically connected to the semiconductor chip 5 mounted on.

【００１２】このように本実施例においては、フィルム
キャリアテープ１に穿設された貫通孔７を介して裏面の
配線パターン３にチップ部品８の電極部８ａをはんだ付
けすることにより、孔のメッキ処理を要することなく、
裏面の配線パターン３に実装された半導体チップ５に対
して、表面の配線パターン２に実装されるチップ部品８
を電気的に接続することができる。As described above, in this embodiment, the electrode portion 8a of the chip component 8 is soldered to the wiring pattern 3 on the back surface through the through hole 7 formed in the film carrier tape 1 to plate the hole. Without the need for processing
For the semiconductor chip 5 mounted on the wiring pattern 3 on the back surface, the chip component 8 mounted on the wiring pattern 2 on the front surface
Can be electrically connected.

【００１３】[0013]

【発明の効果】以上、説明したように本発明の電子部品
の接続方法によれば、従来のように孔のメッキ処理を要
することなく、フィルムキャリアテープに穿設された貫
通孔にはんだペーストを供給し、これにチップ部品の電
極部を載置した状態ではんだペーストを溶融して、チッ
プ部品の電極部を裏面の配線パターンにはんだ付けする
ことにより、裏面の配線パターンに実装された半導体チ
ップに対して、表面の配線パターンに実装されるチップ
部品を電気的に接続することができる。その結果、従来
の製造工程の中から孔のメッキ処理工程を排除できるよ
うになるため、製造工程の簡略化が可能となり、もって
大幅な作業工数の削減や製品コストの低減が期待でき
る。As described above, according to the method for connecting electronic parts of the present invention, the solder paste is applied to the through holes formed in the film carrier tape without the need for plating the holes as in the conventional case. The semiconductor chip mounted on the wiring pattern on the back side by supplying the solder paste, melting the solder paste with the electrode section of the chip component placed on this, and soldering the electrode section of the chip component to the wiring pattern on the back side. On the other hand, the chip component mounted on the surface wiring pattern can be electrically connected. As a result, the hole plating process can be eliminated from the conventional manufacturing process, so that the manufacturing process can be simplified, and it is expected that the number of man-hours and the product cost can be significantly reduced.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明に係わる電子部品の接続方法を説明する
ための図である。FIG. 1 is a diagram for explaining a method of connecting electronic components according to the present invention.

【符号の説明】[Explanation of symbols]

１ フィルムキャリアテープ ２ 表面
の配線パターン ２ａ 部品接続用ランド ３ 裏面
の配線パターン ５ 半導体チップ ７ 貫通
孔 ８ チップ部品 ８ａ 電
極部 ９ はんだペースト（はんだ）1 film carrier tape 2 wiring pattern on the front surface 2a land for connecting components 3 wiring pattern on the back surface 5 semiconductor chip 7 through hole 8 chip component 8a electrode portion 9 solder paste (solder)

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】 フィルムキャリアテープの表裏面に積層
された配線パターンのうち、裏面の配線パターンに実装
された半導体チップに対して、表面の配線パターンに実
装されるチップ部品を電気的に接続するための方法であ
って、 前記フィルムキャリアテープに穿設された貫通孔と前記
表面の配線パターンの部品接続用ランドとにはんだペー
ストを供給する第１の工程と、 前記チップ部品の両端に設けられた電極部を前記第１の
工程で供給されたはんだペースト上に位置決め載置する
第２の工程と、 前記はんだペーストを溶融して、前記裏面の配線パター
ンに前記貫通孔を介して前記チップ部品の電極部をはん
だ付けする第３の工程とから成ることを特徴とする電子
部品の接続方法。1. A chip component mounted on a front surface wiring pattern is electrically connected to a semiconductor chip mounted on a rear surface wiring pattern of wiring patterns laminated on the front and back surfaces of a film carrier tape. A first step of supplying a solder paste to the through holes formed in the film carrier tape and the component connection lands of the surface wiring pattern, and the method is provided on both ends of the chip component. A second step of positioning and placing the electrode part on the solder paste supplied in the first step; and melting the solder paste to form the chip component through the through hole in the wiring pattern on the back surface. And a third step of soldering the electrode portion of 1. to the electronic component connecting method.
JP2054393A 1993-01-12 1993-01-12 Method for connecting electronic part Pending JPH06216192A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2054393A JPH06216192A (en) 1993-01-12 1993-01-12 Method for connecting electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2054393A JPH06216192A (en) 1993-01-12 1993-01-12 Method for connecting electronic part

Publications (1)

Publication Number Publication Date
JPH06216192A true JPH06216192A (en) 1994-08-05

Family

ID=12030074

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2054393A Pending JPH06216192A (en) 1993-01-12 1993-01-12 Method for connecting electronic part

Country Status (1)

Country Link
JP (1) JPH06216192A (en)

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