JPH06204001A - Constant laminated chip resistor - Google Patents
Constant laminated chip resistorInfo
- Publication number
- JPH06204001A JPH06204001A JP43A JP34764092A JPH06204001A JP H06204001 A JPH06204001 A JP H06204001A JP 43 A JP43 A JP 43A JP 34764092 A JP34764092 A JP 34764092A JP H06204001 A JPH06204001 A JP H06204001A
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、極低抵抗を持つ積層形
チップ固定抵抗器に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated chip fixed resistor having an extremely low resistance.
【０００２】[0002]
【従来の技術】極低抵抗を有するチップ固定抵抗器は、
バッテリーチャージャーの電流検出回路、ＤＣ／ＤＣコ
ンバータの電流検出回路、或いは携帯電話の高周波ユニ
ット等に使用されている。この抵抗器を作製する場合、
一般に図２（要部断面図）及び図３（上面図）に示すよ
うな角形チップ固定抵抗器において、その抵抗体の幅Ｗ
を大きくし、抵抗値を極低くしている。2. Description of the Related Art Chip fixed resistors having extremely low resistance are
It is used in a current detection circuit of a battery charger, a current detection circuit of a DC / DC converter, or a high frequency unit of a mobile phone. When making this resistor,
Generally, in a rectangular chip fixed resistor as shown in FIG. 2 (a cross-sectional view of the main part) and FIG. 3 (a top view), the width W of the resistor is
Is made large and the resistance value is made extremely low.
【０００３】図２及び図３に示す抵抗器は、絶縁性基板
３０と、この基板３０上に設けた抵抗体３１と、基板３
０の相対両側部に形成した電極３２，３３と、電極３
２，３３上に施したメッキ層３４，３５と、抵抗体３１
を被覆するオーバーコートガラス３６とからなる。The resistors shown in FIGS. 2 and 3 include an insulating substrate 30, a resistor 31 provided on the substrate 30, and a substrate 3.
The electrodes 32 and 33 formed on both sides of the electrode 0 and the electrode 3
Plating layers 34 and 35 applied on 2, 33 and resistor 31
And an overcoat glass 36 for covering.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上記従
来のような抵抗器では、抵抗体３１のＷ寸法（幅）を長
くして極低抵抗を得ようとしても、Ｗ寸法に制限がある
ため、極低抵抗のチップ固定抵抗器を製造するのが難し
いという問題点がある。従って、本発明の目的は、製造
が容易な極低抵抗のチップ固定抵抗器を提供することに
ある。However, in the conventional resistor described above, the W dimension is limited even if the W dimension (width) of the resistor 31 is increased to obtain an extremely low resistance. There is a problem that it is difficult to manufacture a chip fixed resistor having an extremely low resistance. Therefore, it is an object of the present invention to provide an extremely low resistance chip fixed resistor which is easy to manufacture.
【０００５】[0005]
【課題を解決するための手段】前記目的は、本発明の積
層形チップ固定抵抗器により達成される。この抵抗器
は、絶縁性基板の相対両側部にそれぞれ外部電極を形成
し、この絶縁性基板上に、複数の内部電極と抵抗体とを
交互に積層形成し、前記抵抗体はその端部で接続して１
つの連続する抵抗体とし、前記内部電極は交互に一方側
部及び他方側部の外部電極に接続し、その内部電極と外
部電極との接続以外には内部電極及び抵抗体を外部電極
に接続しないように内部電極及び抵抗体の端部と外部電
極との間に絶縁体を設け、最上の絶縁体の下に位置する
層（抵抗体又は内部電極）を最上の絶縁体で被覆したこ
とを特徴とする。The above object is achieved by the laminated chip fixed resistor of the present invention. This resistor has external electrodes formed on opposite sides of an insulating substrate, and a plurality of internal electrodes and resistors are alternately laminated on the insulating substrate. Connect 1
The internal electrodes are alternately connected to the external electrodes on one side and the other side, and the internal electrodes and the resistive elements are not connected to the external electrodes except for the connection between the internal electrodes and the external electrodes. In this way, an insulator is provided between the end of the internal electrode and the resistor and the external electrode, and the layer (resistor or internal electrode) located under the uppermost insulator is covered with the uppermost insulator. And
【０００６】[0006]
【作用】複数の内部電極と抵抗体とを交互に積層すると
共に、抵抗体を端部で接続して１つの抵抗体とすること
により、抵抗体の幅を実際に拡張したのと同等になり、
抵抗体の抵抗値が極低くなる。しかも、後述の製造例か
らも分かるように、比較的単純な工程で極低抵抗を得る
ことができ、製造が容易である。[Function] By alternately stacking a plurality of internal electrodes and resistors and connecting the resistors at one end to form one resistor, the width of the resistor is equivalent to an actual extension. ,
The resistance value of the resistor becomes extremely low. Moreover, as can be seen from the manufacturing example described later, extremely low resistance can be obtained by a relatively simple process, and the manufacturing is easy.
【０００７】[0007]
【実施例】以下、本発明の積層形チップ固定抵抗器を実
施例に基づいて説明する。図１はその一実施例の要部断
面図を示す。この抵抗器は、絶縁性基板１と、この基板
１上に順に設けた、内部電極２ａ，抵抗体３ａ，内部電
極２ｂ，抵抗体３ｂ，内部電極２ｃ，抵抗体３ｃ，内部
電極２ｄ，抵抗体３ｄと、基板１の相対両側部にそれぞ
れ形成した外部電極５，６と、内部電極２ａ〜２ｄ及び
抵抗体３ａ〜３ｄと外部電極５，６との間に介在させた
絶縁体４ａ，４ｂ，４ｃ，４ｄと、外部電極５，６上に
施したメッキ層７，８とで構成される。内部電極２ａ，
２ｂ，２ｃ，２ｄと抵抗体３ａ，３ｂ，３ｃ，３ｄは交
互にそれぞれ４層ずつ積層形成されている。EXAMPLES The laminated chip fixed resistor of the present invention will be described below based on examples. FIG. 1 shows a cross-sectional view of an essential part of the embodiment. This resistor includes an insulating substrate 1 and an internal electrode 2a, a resistor 3a, an internal electrode 2b, a resistor 3b, an internal electrode 2c, a resistor 3c, an internal electrode 2d, a resistor provided on the substrate 1 in this order. 3d, external electrodes 5 and 6 formed on both sides of the substrate 1, insulators 4a and 4b interposed between the internal electrodes 2a to 2d and the resistors 3a to 3d and the external electrodes 5 and 6, respectively. 4c and 4d, and plated layers 7 and 8 applied on the external electrodes 5 and 6. Internal electrode 2a,
The layers 2b, 2c, 2d and the resistors 3a, 3b, 3c, 3d are alternately laminated in four layers.
【０００８】図１から分かるように、抵抗体３ａと抵抗
体３ｂ、抵抗体３ｂと抵抗体３ｃ、抵抗体３ｃと抵抗体
３ｄは、それぞれ端部で電気的に接続され、全体的に１
つの抵抗体として連続する。内部電極２ａ，２ｂ，２
ｃ，２ｄは各々連続していないが、内部電極２ａ，２ｃ
の一端部は外部電極５に、内部電極２ｂ，２ｄの一端部
は外部電極６に接続してある。又、内部電極２ａ，２ｃ
の他端部及び抵抗体３ａ，３ｃは、それぞれ絶縁体４
ａ，４ｃによって外部電極６とは接触せず、同様に内部
電極２ｂ，２ｄの他端部及び抵抗体３ｂ，３ｄは、それ
ぞれ絶縁体４ｂ，４ｄによって外部電極５とは接触しな
い。最上の絶縁体４ｄは、最上の抵抗体３ｄの全表面を
被覆し、抵抗体３ｄの保護層としても機能する。なお、
メッキ層７，８はハンダ付け性を良くするためのもので
ある。As can be seen from FIG. 1, the resistor 3a and the resistor 3b, the resistor 3b and the resistor 3c, and the resistor 3c and the resistor 3d are electrically connected to each other at their end portions, so that a total of 1
Continue as one resistor. Internal electrodes 2a, 2b, 2
c and 2d are not continuous, but internal electrodes 2a and 2c
Is connected to the external electrode 5 and one ends of the internal electrodes 2b and 2d are connected to the external electrode 6. Also, the internal electrodes 2a, 2c
The other end of each of the resistors and the resistors 3a and 3c are connected to the insulator 4 respectively.
a and 4c do not contact the external electrode 6, and similarly, the other ends of the internal electrodes 2b and 2d and the resistors 3b and 3d do not contact the external electrode 5 by the insulators 4b and 4d, respectively. The uppermost insulator 4d covers the entire surface of the uppermost resistor 3d and also functions as a protective layer for the resistor 3d. In addition,
The plated layers 7 and 8 are for improving solderability.
【０００９】このような抵抗器では、連続する抵抗体３
ａ〜３ｄの幅が実質的に広くなり、抵抗体の幅を実際に
拡張したのと同等になる。つまり、基板上に抵抗体を積
層することで、単に幅を延ばす場合に比べて、抵抗器全
体の幅を拡張しなくても抵抗体の幅を実質的に簡単に大
きくすることができる。この結果、抵抗体の抵抗値が極
めて低くなる上に、後述の製造例からも分かるように、
比較的単純な工程で実質上幅広の抵抗体を作製でき、製
造が容易である。In such a resistor, the continuous resistor 3
The width of a to 3d becomes substantially wide, which is equivalent to the actual width expansion of the resistor. That is, by stacking the resistor on the substrate, the width of the resistor can be increased substantially easily without expanding the width of the entire resistor as compared with the case of simply extending the width. As a result, the resistance value of the resistor becomes extremely low, and as can be seen from the manufacturing example described later,
A resistor having a substantially wide width can be manufactured by a relatively simple process, and the manufacturing is easy.
【００１０】次に、上記構造（内部電極と抵抗体を各々
４層積層した構造）の抵抗器の製造例を述べる。例え
ば、次の工程（１）〜（１５）の順に行う。 （１）絶縁性基板１上に導体ペーストを印刷し、内部電
極２ａを形成する。 （２）内部電極２ａ上に抵抗ペーストを印刷し、抵抗体
３ａを形成する。 （３）内部電極２ａ及び抵抗体３ａが後の工程（１４）
で形成する外部電極６と電気的に接続しないように、内
部電極２ａと抵抗体３ａの端部にガラスペーストを印刷
し、絶縁体４ａを形成する。 （４）抵抗体３ａ及び絶縁体４ａ上に導体ペーストを印
刷し、内部電極２ｂを形成する。 （５）抵抗体３ａの端部と電気的に接続するように、内
部電極２ｂ上に抵抗ペーストを印刷し、抵抗体３ｂを形
成する。 （６）抵抗体３ａ，３ｂが後の工程（１４）で形成する
外部電極５と電気的に接続せず、内部電極２ａが外部電
極５と電気的に接続するように、抵抗体３ａ，３ｂの端
部にガラスペーストを印刷し、絶縁体４ｂを形成する。 （７）抵抗体３ｂ及び絶縁体４ｂ上に導体ペーストを印
刷し、内部電極２ｃを形成する。 （８）抵抗体３ｂの端部と電気的に接続するように、内
部電極２ｃ上に抵抗ペーストを印刷し、抵抗体３ｃを形
成する。 （９）抵抗体３ｂ，３ｃが外部電極６と電気的に接続せ
ず、内部電極２ｂが外部電極６と電気的に接続するよう
に、抵抗体３ｂ，３ｃの端部にガラスペーストを印刷
し、絶縁体４ｃを形成する。 （１０）抵抗体３ｃ及び絶縁体４ｃ上に導体ペーストを
印刷し、内部電極２ｄを形成する。 （１１）抵抗体３ｃと電気的に接続するように、内部電
極２ｄ上に抵抗ペーストを印刷し、抵抗体３ｄを形成す
る。 （１２）抵抗体３ｃ，３ｄが外部電極５と電気的に接続
せず、抵抗体３ｄが外部（大気）に露出せず、内部電極
２ｃ，２ｄがそれぞれ外部電極５，６と電気的に接続す
るように、抵抗体３ｃの端部及び抵抗体３ｄの全面にガ
ラスペーストを印刷し、絶縁体４ｄを形成する。 （１３）上記工程（１）〜（１２）で作製した内部電極
２ａ〜２ｄ、抵抗体３ａ〜３ｄ、絶縁体４ａ〜４ｄを同
時に焼成する。 （１４）基板１の一方側及び他方側の側部に導体ペース
トを塗布・焼成し、外部電極５，６を形成する。 （１５）ハンダ付け性を良くするために、メッキによっ
て外部電極５，６の表面にメッキ層７，８を施す。Next, an example of manufacturing a resistor having the above structure (a structure in which each of the internal electrodes and the resistor is laminated in four layers) will be described. For example, the following steps (1) to (15) are performed in this order. (1) A conductive paste is printed on the insulating substrate 1 to form the internal electrodes 2a. (2) A resistor paste is printed on the internal electrodes 2a to form the resistors 3a. (3) The internal electrode 2a and the resistor 3a are formed in a later step (14).
A glass paste is printed on the end portions of the internal electrode 2a and the resistor 3a so as not to be electrically connected to the external electrode 6 formed in 1. to form the insulator 4a. (4) A conductor paste is printed on the resistor 3a and the insulator 4a to form the internal electrode 2b. (5) A resistor paste is printed on the internal electrodes 2b so as to be electrically connected to the end of the resistor 3a to form the resistor 3b. (6) The resistors 3a, 3b are so arranged that the resistors 3a, 3b are not electrically connected to the external electrode 5 formed in the subsequent step (14) but the internal electrode 2a is electrically connected to the external electrode 5. A glass paste is printed on the end portion of to form the insulator 4b. (7) A conductor paste is printed on the resistor 3b and the insulator 4b to form the internal electrode 2c. (8) A resistor paste is printed on the internal electrodes 2c so as to be electrically connected to the ends of the resistor 3b to form the resistor 3c. (9) A glass paste is printed on the end portions of the resistors 3b and 3c so that the resistors 3b and 3c are not electrically connected to the external electrodes 6 and the internal electrodes 2b are electrically connected to the external electrodes 6. , The insulator 4c is formed. (10) A conductor paste is printed on the resistor 3c and the insulator 4c to form the internal electrode 2d. (11) A resistor paste is printed on the internal electrodes 2d so as to be electrically connected to the resistor 3c to form the resistor 3d. (12) The resistors 3c and 3d are not electrically connected to the external electrode 5, the resistor 3d is not exposed to the outside (atmosphere), and the internal electrodes 2c and 2d are electrically connected to the external electrodes 5 and 6, respectively. As described above, the glass paste is printed on the end portion of the resistor 3c and the entire surface of the resistor 3d to form the insulator 4d. (13) The internal electrodes 2a to 2d, the resistors 3a to 3d, and the insulators 4a to 4d produced in the above steps (1) to (12) are simultaneously fired. (14) The conductor paste is applied to one side and the other side of the substrate 1 and baked to form the external electrodes 5 and 6. (15) To improve the solderability, plating layers 7 and 8 are applied to the surfaces of the external electrodes 5 and 6 by plating.
【００１１】なお、上記実施例は内部電極及び抵抗体を
各々４層ずつ積層形成した場合であるが、内部電極及び
抵抗体の積層数は、特に限定はなく、抵抗器の規格や抵
抗値等に応じて適宜増減すればよい。上記製造例におい
ても、全ての内部電極、抵抗体及び絶縁体を同時焼成し
ないで、個別に或いは何回かに分けて焼成してもよい。
又、外部電極は内部電極、抵抗体及び絶縁体と同時焼成
してもよく、外部電極そのものをメッキによって形成し
ても差し支えない。更には、外部電極のハンダ付け性が
良ければ、メッキ層は必ずしも施さなくてもよい。In the above embodiment, the internal electrode and the resistor are laminated by four layers, but the number of laminated internal electrodes and the resistor is not particularly limited, and the standard of the resistor, the resistance value, etc. The amount may be increased or decreased as appropriate. Also in the above-mentioned manufacturing example, all internal electrodes, resistors and insulators may not be simultaneously fired, but may be fired individually or in several times.
The external electrode may be co-fired with the internal electrode, the resistor and the insulator, or the external electrode itself may be formed by plating. Furthermore, if the solderability of the external electrodes is good, the plating layer may not be necessarily applied.
【００１２】その他、最上の抵抗体は必ずしも設ける必
要がない。例えば、上記実施例では、抵抗体３ｄは無く
てもよい。即ち、内部電極２ｄが外部（大気）に露出せ
ず、しかも内部電極２ｄが外部電極６と接続すると共に
外部電極５と接続せず、且つ抵抗体３ｃが外部電極５と
接続しないように、内部電極２ｄ上に絶縁体４ｄを形成
してもよい。In addition, it is not always necessary to provide the uppermost resistor. For example, in the above embodiment, the resistor 3d may be omitted. That is, the internal electrode 2d is not exposed to the outside (atmosphere), the internal electrode 2d is connected to the external electrode 6 and the external electrode 5, and the resistor 3c is not connected to the external electrode 5. The insulator 4d may be formed on the electrode 2d.
【００１３】[0013]
【発明の効果】以上説明したように、本発明の積層形チ
ップ固定抵抗器は、複数の内部電極及び抵抗体を交互に
積層形成し、抵抗体の端部を接続して１つの連続する抵
抗体としたため、下記の効果を有する。 （１）抵抗体の幅を実際に拡張しなくても抵抗体を実質
上幅広にしたのと同等になり、しかも比較的単純な工程
で実質上幅広の抵抗体を作製することができる。この結
果、極低抵抗を簡単に得ることができる上に、製造が容
易である。 （２）内部電極と抵抗体とを交互に積層形成した単純な
構造でもって極低抵抗を得ることができる。As described above, in the multilayer chip fixed resistor of the present invention, a plurality of internal electrodes and resistors are alternately laminated and the ends of the resistors are connected to form one continuous resistor. Since it is a body, it has the following effects. (1) Even if the width of the resistor is not actually expanded, it is equivalent to making the resistor substantially wider, and the resistor can be made substantially wider by a relatively simple process. As a result, an extremely low resistance can be easily obtained, and the manufacturing is easy. (2) An extremely low resistance can be obtained with a simple structure in which internal electrodes and resistors are alternately laminated.
【図１】本発明の一実施例に係る抵抗器の要部断面図で
ある。FIG. 1 is a sectional view of an essential part of a resistor according to an embodiment of the present invention.
【図２】従来例に係る抵抗器の要部断面図である。FIG. 2 is a sectional view of a main part of a resistor according to a conventional example.
【図３】図２に示す抵抗器の上面図である。3 is a top view of the resistor shown in FIG. 2. FIG.
１ 絶縁性基板 ２ａ，２ｂ，２ｃ，２ｄ 内部電極 ３ａ，３ｂ，３ｃ，３ｄ 抵抗体 ４ａ，４ｂ，４ｃ，４ｄ 絶縁体 ５，６ 外部電極 ７，８ メッキ層 1 Insulating substrate 2a, 2b, 2c, 2d Internal electrode 3a, 3b, 3c, 3d Resistor 4a, 4b, 4c, 4d Insulator 5,6 External electrode 7,8 Plating layer
Claims (1)
極を形成し、この絶縁性基板上に、複数の内部電極と抵
抗体とを交互に積層形成し、前記抵抗体はその端部で接
続して１つの連続する抵抗体とし、前記内部電極は交互
に一方側部及び他方側部の外部電極に接続し、その内部
電極と外部電極との接続以外には内部電極及び抵抗体を
外部電極に接続しないように内部電極及び抵抗体の端部
と外部電極との間に絶縁体を設け、最上の絶縁体の下に
位置する層（抵抗体又は内部電極）を最上の絶縁体で被
覆したことを特徴とする積層形チップ固定抵抗器。1. An external electrode is formed on each of opposite sides of an insulating substrate, and a plurality of internal electrodes and resistors are alternately laminated on the insulating substrate. The internal electrodes are alternately connected to the external electrodes on one side and the other side, and the internal electrodes and the resistor are externally connected except for the connection between the internal electrodes and the external electrodes. An insulator is provided between the internal electrode and the end of the resistor so as not to connect to the electrode, and the external electrode, and the layer (resistor or internal electrode) located below the uppermost insulator is covered with the uppermost insulator. A laminated chip fixed resistor characterized in that
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP43A JPH06204001A (en) | 1992-12-28 | 1992-12-28 | Constant laminated chip resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP43A JPH06204001A (en) | 1992-12-28 | 1992-12-28 | Constant laminated chip resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06204001A true JPH06204001A (en) | 1994-07-22 |
Family
ID=18391592
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP43A Pending JPH06204001A (en) | 1992-12-28 | 1992-12-28 | Constant laminated chip resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06204001A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006229065A (en) * | 2005-02-18 | 2006-08-31 | Rohm Co Ltd | Low resistance chip resistor and its manufacturing process |
| JP2006245219A (en) * | 2005-03-02 | 2006-09-14 | Rohm Co Ltd | Low-resistance chip resistor and its production process |
-
1992
- 1992-12-28 JP JP43A patent/JPH06204001A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006229065A (en) * | 2005-02-18 | 2006-08-31 | Rohm Co Ltd | Low resistance chip resistor and its manufacturing process |
| JP2006245219A (en) * | 2005-03-02 | 2006-09-14 | Rohm Co Ltd | Low-resistance chip resistor and its production process |
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