JPH06164017A - Manufacture of semiconductor thin-film magneto resistance element - Google Patents
Manufacture of semiconductor thin-film magneto resistance elementInfo
- Publication number
- JPH06164017A JPH06164017A JP4307182A JP30718292A JPH06164017A JP H06164017 A JPH06164017 A JP H06164017A JP 4307182 A JP4307182 A JP 4307182A JP 30718292 A JP30718292 A JP 30718292A JP H06164017 A JPH06164017 A JP H06164017A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- substrate
- insulating layer
- insb
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Hall/Mr Elements (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、物体の回転、変位の検
出等に用いられる半導体薄膜磁気抵抗素子の製造方法に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor thin film magnetoresistive element used for detecting rotation and displacement of an object.
【０００２】[0002]
【従来の技術】従来、一般に、回転を検出するセンサと
しては、光学式、磁気方式を初め、種々の方式がある。
この中で、特に汚れ、塵埃等、雰囲気の影響を受ける用
途においては、そうした影響を受けにくい磁気方式が最
も有利である。2. Description of the Related Art Conventionally, as a sensor for detecting rotation, there are various systems such as an optical system and a magnetic system.
Among them, the magnetic method, which is less susceptible to such an influence, is most advantageous especially in applications where the atmosphere such as dirt and dust is affected.
【０００３】一方、この磁気方式においても、電磁ピッ
クアップ，ホール素子，磁気抵抗素子等、種々の方式が
知られている。On the other hand, also in this magnetic system, various systems such as an electromagnetic pickup, a Hall element, a magnetoresistive element, etc. are known.
【０００４】近年、自動車の電子化に伴い、各種センサ
素子が装着されるようになってきているが、回転セン
サ、特にギヤセンサとして、ホール素子（ホールＩ
Ｃ），強磁性薄膜磁気抵抗素子，半導体磁気抵抗素子を
用いた回転センサが考えられるが、自動車用回転センサ
として用いる際、素子の動作温度範囲が−５０〜＋１５
０℃を満足しなければならない。In recent years, various sensor elements have been mounted along with the computerization of automobiles. Hall elements (Hall I) are used as rotation sensors, especially gear sensors.
C), a rotation sensor using a ferromagnetic thin film magnetoresistive element and a semiconductor magnetoresistive element are conceivable, but when used as a rotation sensor for automobiles, the operating temperature range of the element is -50 to +15.
Must meet 0 ° C.
【０００５】ところが、ホール素子，ホールＩＣ，強磁
性薄膜磁気抵抗素子は、いずれも、検出出力が小さく、
被検出体との間のギャップを小さくする必要があるため
に、ギヤセンサとしては、使いにくいという問題点があ
った。However, the Hall element, Hall IC, and ferromagnetic thin film magnetoresistive element all have a small detection output,
Since it is necessary to reduce the gap between the object and the object to be detected, there is a problem that it is difficult to use as a gear sensor.
【０００６】一方、半導体磁気抵抗素子は、元々検出出
力が大きく、被検出体とのギャップを広く取れるため、
最もギヤセンサとして適しているものと考えられるが、
現状で最も特性の優れた半導体磁気抵抗素子であるＩｎ
Ｓｂ半導体磁気抵抗素子ではその動作温度範囲は、−２
０〜＋８０℃程度で、上記の自動車用の動作温度範囲を
満足するものではない。現在、多用されているＩｎＳｂ
磁気抵抗素子は、バルク型のものが多い。このＩｎＳｂ
バルク型では、その電子移動度は、低温域では不純物散
乱、高温域では、極性光学散乱により支配され、それら
各々の存在する領域の境界に電子移動度のピーク値をと
る。このピーク値から高温側では、ほぼ電子移動度は、
温度の−１．７乗に沿って変化し、また、通常極低温側
（７０゜Ｋ付近）で急峻なピークを有する。On the other hand, the semiconductor magnetoresistive element originally has a large detection output, and a wide gap with the object to be detected can be obtained.
It is thought that it is most suitable as a gear sensor,
In, which is the semiconductor magnetoresistive element with the best characteristics at present
The operating temperature range of the Sb semiconductor magnetoresistive element is -2.
The temperature range of 0 to + 80 ° C. does not satisfy the above operating temperature range for automobiles. InSb, which is currently widely used
Most of the magnetoresistive elements are of bulk type. This InSb
In the bulk type, the electron mobility is dominated by impurity scattering in the low temperature region and polar optical scattering in the high temperature region, and the electron mobility peaks at the boundaries of the regions in which they exist. From this peak value, on the high temperature side, the electron mobility is almost
It changes along the -1.7th power of the temperature, and usually has a steep peak on the cryogenic temperature side (around 70 ° K).
【０００７】これに対して、ＩｎＳｂ薄膜型の場合に
は、転位等の欠陥に起因する散乱因子や粒界散乱、表面
散乱等の別の散乱因子が付加されるため、電子移動度の
ピークは、高温側にシフトし、室温付近で比較的ブロー
ドなピークを有するため、−５０〜＋１５０℃という温
度範囲を考えた場合、温度依存性の点で、好ましい。こ
れに加え、薄膜型のＩｎＳｂ磁気抵抗素子は、高抵抗化
が容易で、素子の駆動電圧を高くでき（出力は、電子移
動度および駆動電圧に比例する）、低消費電力化，小型
化が可能であるという長所がある。On the other hand, in the case of the InSb thin film type, since a scattering factor due to defects such as dislocations and other scattering factors such as grain boundary scattering and surface scattering are added, the peak of electron mobility is Since it shifts to the high temperature side and has a relatively broad peak near room temperature, it is preferable in terms of temperature dependence when considering the temperature range of -50 to + 150 ° C. In addition, the thin-film InSb magnetoresistive element can easily be made high in resistance, the driving voltage of the element can be increased (the output is proportional to the electron mobility and the driving voltage), and the power consumption and the size can be reduced. It has the advantage of being possible.
【０００８】[0008]
【発明が解決しようとする課題】しかしながら、このよ
うに、ＩｎＳｂ薄膜型の利点があるにも関わらず、従
来、それ程普及しておらず、高温用途で用いられていな
い原因としては、以下の点が挙げられる。However, in spite of the advantages of the InSb thin film type, the reason why it has not been so popular and has not been used in high temperature applications is as follows. Is mentioned.
【０００９】ＩｎＳｂ薄膜をエピタキシャル成長させる
ために、成長基板として例えば、ＣｄＴｅ，ＰｂＴｅ単
結晶基板を用いれば、電子移動度の十分大きな薄膜を得
ることが可能であるが、これらの基板は、極めて高価な
ものである。If, for example, a CdTe or PbTe single crystal substrate is used as a growth substrate for epitaxially growing an InSb thin film, it is possible to obtain a thin film having sufficiently high electron mobility, but these substrates are extremely expensive. It is a thing.
【００１０】また、ガラス基板のような安価な基板を用
いれば、コストダウンはできるが、この際、薄膜がラン
ダムに成長し、いわゆる多結晶タイプの膜となり、結果
的に電子移動度の大きな薄膜を得ることは難しい。Further, if an inexpensive substrate such as a glass substrate is used, the cost can be reduced, but at this time, the thin film grows randomly and becomes a so-called polycrystalline type film, and as a result, a thin film having a high electron mobility. Hard to get.
【００１１】これに対しては、「東洋通信機技報Ｎｏ．
４０（１９８７）」で、福中等が述べている通り、へき
開マイカ基板を用いれば、単結晶並の電子移動度が得ら
れることが明らかになっている。反面、この方法では、
高温用途で使用可能なＩｎＳｂ薄膜を得ることは、困難
である。それは、ＩｎＳｂ薄膜とマイカ基板の密着性が
悪いため、このＩｎＳｂ薄膜を別の支持基板上にエポキ
シ等の接着層を介して転写して用いなければならないた
めである。従って、できあがった素子においては、高温
時、あるいは、低温〜高温の温度サイクルを繰り返した
際、接着層とＩｎＳｂ薄膜間の熱膨張係数の差が大き
く、ＩｎＳｂ薄膜に亀裂が生じる等、特に、前述した−
５０〜＋１５０℃の温度範囲において、実用に耐える信
頼性を有していなかった。In response to this, “Toyo Communication Equipment Technical Report No.
40 (1987) ”, as described by Fukunaka et al., It has been clarified that an electron mobility comparable to that of a single crystal can be obtained by using a cleaved mica substrate. On the other hand, with this method,
It is difficult to obtain an InSb thin film that can be used in high temperature applications. This is because the adhesion between the InSb thin film and the mica substrate is poor, and this InSb thin film must be transferred onto another supporting substrate via an adhesive layer such as epoxy and used. Therefore, in the completed device, the difference in the thermal expansion coefficient between the adhesive layer and the InSb thin film is large at the time of high temperature or when the temperature cycle of low temperature to high temperature is repeated, and cracks occur in the InSb thin film. Did-
In the temperature range of 50 to + 150 ° C., it was not reliable enough for practical use.
【００１２】本発明は、このような各種の従来のセンサ
の課題を考慮し、自動車用ギヤセンサ等の高温用途にお
いても、十分な信頼性を有する半導体薄膜磁気抵抗素子
の製造方法を提供することを目的とする。In consideration of the above problems of various conventional sensors, the present invention provides a method of manufacturing a semiconductor thin film magnetoresistive element having sufficient reliability even in high temperature applications such as gear sensors for automobiles. To aim.
【００１３】[0013]
【課題を解決するための手段】上記目的を達成するため
に、本発明は、絶縁性基板もしくは半導体基板上に、ア
ンチモン化インジウム薄膜を形成し所望の素子パターン
形成を施した後ＳｉＮ,ＳｉＯＮ,ＳｉＯ,ポリイミドな
どでなる絶縁層を形成し、３００℃以上５２５℃未満
か、あるいは５２５℃以上の温度で熱処理をし、次いで
絶縁層とアンチモン化インジウム薄膜の電極を形成する
部分を基板から除去し、電極を形成する工程を順次通過
させる半導体薄膜磁気抵抗素子の製造方法である。In order to achieve the above object, the present invention provides a method of forming an indium antimonide thin film on an insulating substrate or a semiconductor substrate, forming a desired element pattern, and then forming SiN, SiON, An insulating layer made of SiO, polyimide, etc. is formed, and heat treatment is performed at a temperature of 300 ° C. or higher and lower than 525 ° C. or 525 ° C. or higher. , A method of manufacturing a semiconductor thin film magnetoresistive element in which the steps of forming electrodes are sequentially performed.
【００１４】[0014]
【作用】本発明の半導体薄膜磁気抵抗素子の製造方法に
よれば、基板上にアンチモン化インジウム薄膜を形成す
るのみでは、必ずしも電子移動度が大きくないが、本発
明のように、適切な絶縁層を形成し、第一に３００℃以
上５２５℃未満で熱処理した場合には、アンチモン化イ
ンジウム薄膜の固相成長により結晶粒径が大きくなると
共に３００℃以上でアンチモン化インジウム薄膜からア
ンチモンが離脱するのを絶縁層により防ぐことができ、
高電子移動度化できる。この場合、熱処理温度が低い
程、熱処理時間を長くすることが必要である。According to the method of manufacturing a semiconductor thin film magnetoresistive element of the present invention, the electron mobility is not necessarily high only by forming the indium antimonide thin film on the substrate, but as in the present invention, an appropriate insulating layer is formed. In the first case, when heat treatment is performed at 300 ° C. or higher and lower than 525 ° C., the crystal grain size increases due to solid phase growth of the indium antimonide thin film, and antimony is released from the indium antimonide thin film at 300 ° C. or higher. Can be prevented by the insulating layer,
High electron mobility can be achieved. In this case, the lower the heat treatment temperature, the longer the heat treatment time is required.
【００１５】また、第二に５２５℃以上で熱処理した場
合には、アンチモン化インジウム薄膜の融点がこの温度
であるため、この場合には溶融状態で凝集し薄膜が玉の
ように固まるのを防ぐ目的で絶縁層を形成する。この方
法によって十分基板の横方向に結晶が成長したアンチモ
ン化インジウム薄膜を得ることができる。Secondly, when the heat treatment is carried out at 525 ° C. or higher, the melting point of the indium antimonide thin film is this temperature. In this case, therefore, it is prevented that the thin film aggregates in the molten state and the thin film hardens like a ball. An insulating layer is formed for the purpose. By this method, it is possible to obtain an indium antimonide thin film in which crystals are sufficiently grown in the lateral direction of the substrate.
【００１６】従って上記いずれの熱処理条件下でもアン
チモン化インジウム薄膜を高電子移動度化することがで
きる。Therefore, the electron mobility of the indium antimonide thin film can be increased under any of the above heat treatment conditions.
【００１７】次いで、絶縁層およびアンチモン化インジ
ウム薄膜の電極形成部分のみを基板から除去し、この
後、電極を形成することで、丁度、電極がアンチモン化
インジウム薄膜の間に埋め込まれた状態となり、磁気抵
抗効果が大きい素子構成とすることが可能となる。Then, only the insulating layer and the electrode forming portion of the indium antimonide thin film are removed from the substrate, and thereafter the electrode is formed, so that the electrode is just embedded between the indium antimonide thin film, It is possible to obtain an element configuration having a large magnetoresistive effect.
【００１８】従ってこれらの工程を経ることにより、高
感度で耐熱性に優れた半導体薄膜磁気抵抗素子を実現す
ることができ、−５０〜＋１５０℃といった自動車用等
の高温用途においても、十分な信頼性を保証することが
できる。Therefore, through these steps, a semiconductor thin film magnetoresistive element having high sensitivity and excellent heat resistance can be realized, and sufficient reliability is obtained even in high temperature applications such as automobiles such as -50 to + 150 ° C. You can guarantee the sex.
【００１９】[0019]
【実施例】以下、本発明の実施例について図面を参照し
て説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００２０】図１は、本実施例の半導体薄膜磁気抵抗素
子の製造工程図を示す。本実施例では、絶縁性基板とし
て、ガラス基板１（ＣＧＷ＃７０５９（コーニング社
製））を用いた（図１(1)）。このガラス基板１を有機
洗浄した後、直ちに真空蒸着装置内に導入し、真空度１
×１０-5Torr.以下に真空排気した後、ガラス基板１の
表面清浄化のため５５０℃で加熱し、次いで基板温度を
下げ、４００℃にし、Ｓｂ／Ｉｎ蒸発粒子数比２以上と
して成膜すると、Ｉｎ／Ｓｂ原子数比１／１の化学量論
的組成を満足したアンチモン化インジウム薄膜（以下Ｉ
ｎＳｂ薄膜と呼ぶ）２が得られる（図１(2)）。FIG. 1 shows a manufacturing process diagram of the semiconductor thin film magnetoresistive element of this embodiment. In this example, a glass substrate 1 (CGW # 7059 (manufactured by Corning)) was used as the insulating substrate (FIG. 1 (1)). After this glass substrate 1 was organically washed, it was immediately introduced into a vacuum vapor deposition apparatus, and the vacuum degree 1
After evacuation to × 10 -5 Torr. Or less, the glass substrate 1 is heated at 550 ° C. to clean the surface, then the substrate temperature is lowered to 400 ° C., and the film is formed with the Sb / In evaporated particle number ratio of 2 or more. Then, an indium antimonide thin film (hereinafter referred to as I / Sb) satisfying the stoichiometric composition with an In / Sb atomic ratio of 1/1
2 (referred to as nSb thin film) is obtained (FIG. 1 (2)).
【００２１】しかしながら、この状態で得られたＩｎＳ
ｂ薄膜２は、膜厚３μｍ程度のものでも十分結晶粒径が
大きくないため電子移動度は高々１ｍ2／Ｖ・ｓ程度のも
のである（電子移動度は結晶粒径に比例する）。このた
め、ＩｎＳｂ薄膜２の結晶粒径を大きくするために熱処
理を必要とする。However, the InS obtained in this state
The thin b film 2 has a crystal grain size not sufficiently large even if it has a thickness of about 3 μm, and therefore has an electron mobility of at most about 1 m 2 / V · s (electron mobility is proportional to the crystal grain size). Therefore, heat treatment is required to increase the crystal grain size of the InSb thin film 2.
【００２２】この熱処理に先立ち、図２に示すように素
子間分離するための素子パターン形成３をフォトリソグ
ラフィー技術により行い、次いでＩｎＳｂ薄膜２の全面
を覆うようにスパッタリング法を用いてＳｉＮでなる絶
縁層４を適切な厚さ形成する（図１(3)）。この後、熱
処理を以下のように施す。Prior to this heat treatment, as shown in FIG. 2, element pattern formation 3 for element isolation is performed by a photolithography technique, and then an insulating film made of SiN is used so as to cover the entire surface of the InSb thin film 2. The layer 4 is formed to have an appropriate thickness (FIG. 1 (3)). After that, heat treatment is performed as follows.
【００２３】まず、３００℃以上５２５℃未満の温度で
熱処理する場合には、ＩｎＳｂ薄膜２は固体状態である
が、絶縁層４を設けずに熱処理時の雰囲気圧力が低い状
態では、ＩｎＳｂ薄膜２からのＳｂの離脱再蒸発が生
じ、特性が劣化する。これに対して絶縁層４を設けるこ
とで、この現象を防ぐことが可能となる。ここで、熱処
理温度が低い程、熱処理時間を長くする必要がある。こ
れによりＩｎＳｂ薄膜２が固相成長を起こして、結晶粒
径が大きくなる。これにより、電子移動度が、３〜４ｍ
2／Ｖ・ｓ程度のＩｎＳｂ薄膜が得られる。尚、この際の
絶縁層４としては、本実施例のＳｉＮ以外にＳｉＯＮ，
ＳｉＯ，ポリイミドでもこの熱処理温度範囲で安定であ
るため、同様な効果が得られる。First, when the heat treatment is performed at a temperature of 300 ° C. or higher and lower than 525 ° C., the InSb thin film 2 is in a solid state. However, when the atmospheric pressure during the heat treatment is low without providing the insulating layer 4, the InSb thin film 2 is formed. Desorption of Sb from and re-evaporation occurs and the characteristics deteriorate. On the other hand, by providing the insulating layer 4, this phenomenon can be prevented. Here, the lower the heat treatment temperature, the longer the heat treatment time must be. As a result, the InSb thin film 2 undergoes solid phase growth, and the crystal grain size increases. As a result, the electron mobility is 3 to 4 m.
An InSb thin film of about 2 / V · s can be obtained. In this case, as the insulating layer 4, in addition to SiN of this embodiment, SiON,
Since SiO and polyimide are stable in this heat treatment temperature range, similar effects can be obtained.
【００２４】一方、５２５℃以上、即ちＩｎＳｂ薄膜２
の融点以上の温度で熱処理する場合には、絶縁層４がな
い場合には、ＩｎＳｂ薄膜２は溶融し、玉のように凝集
する。絶縁層４を設けることでこれを防ぎ、溶融再結晶
化により基板面方向に十分大きく結晶が成長する。これ
により、電子移動度５〜６ｍ2／Ｖ・ｓ程度のＩｎＳｂ薄
膜を得ることが可能となる。いずれにしても、これら熱
処理によって、ＩｎＳｂ薄膜の電子移動度は飛躍的に向
上する。尚、この際の絶縁層４としては、本実施例のＳ
ｉＮ以外にＳｉＯＮ，ＳｉＯでも良い（ポリイミドは、
使用できない）。On the other hand, at 525 ° C. or higher, that is, the InSb thin film 2
When the heat treatment is performed at a temperature equal to or higher than the melting point of, the InSb thin film 2 is melted and aggregates like a ball when the insulating layer 4 is not present. This is prevented by providing the insulating layer 4, and the crystal is grown sufficiently large in the substrate surface direction by the melt recrystallization. This makes it possible to obtain an InSb thin film having an electron mobility of about 5 to 6 m 2 / V · s. In any case, these heat treatments dramatically improve the electron mobility of the InSb thin film. The insulating layer 4 used in this case is S of the present embodiment.
In addition to iN, SiON or SiO may be used (for polyimide,
I can not use it).
【００２５】この後、絶縁層４およびＩｎＳｂ薄膜２の
電極を形成する部分のみを基板１から除去する（図１
(4), 及び(5)）。具体的には、図３に示すように、電極
を形成する部分５のみを露出させるように絶縁層４上に
フォトレジスト等でなるマスク材６を形成し、ＳｉＮで
なる絶縁層４をウエットプロセスでは、リン酸とフッ酸
の混合液でエッチング除去し、また、ドライプロセスで
は、フッ素含有系ガス、即ちＣＦ4とＯ2の混合ガスでド
ライエッチングして除去する。絶縁層４がＳｉＯＮやＳ
ｉＯの場合には、ウエットエッチングでは、フッ酸とフ
ッ化アンモニウムの混合液で除去し、ドライエッチング
では、ＣＦ4 ガスで除去する。また、絶縁層４がポリイ
ミドの場合は、ウエットエッチングではヒドラジン、ド
ライエッチングではＣＦ4とＯ2の混合ガスでそれぞれ除
去する。次に、ＩｎＳｂ薄膜２をウエットエッチングで
は、硝酸、乳酸、グリコール酸の混合液で除去し、ドラ
イエッチングでは、ＣＦ4とＯ2の混合ガスで除去するこ
とにより、電極形成部分５ができあがる。このとき、電
極形成部分のＩｎＳｂ薄膜の側壁７の形状は、順テーパ
形状が好ましい。After that, only the portions of the insulating layer 4 and the InSb thin film 2 where the electrodes are formed are removed from the substrate 1 (FIG. 1).
(4), and (5)). Specifically, as shown in FIG. 3, a mask material 6 made of photoresist or the like is formed on the insulating layer 4 so as to expose only a portion 5 where an electrode is formed, and the insulating layer 4 made of SiN is subjected to a wet process. Then, it is removed by etching with a mixed solution of phosphoric acid and hydrofluoric acid. In the dry process, it is removed by dry etching with a fluorine-containing gas, that is, a mixed gas of CF 4 and O 2 . The insulating layer 4 is SiON or S
In the case of iO, in wet etching, it is removed with a mixed solution of hydrofluoric acid and ammonium fluoride, and in dry etching, it is removed with CF 4 gas. When the insulating layer 4 is polyimide, it is removed by hydrazine in wet etching and by a mixed gas of CF 4 and O 2 in dry etching. Next, the InSb thin film 2 is removed by wet etching with a mixed solution of nitric acid, lactic acid, and glycolic acid, and by dry etching with a mixed gas of CF 4 and O 2 , the electrode forming portion 5 is completed. At this time, the shape of the side wall 7 of the InSb thin film in the electrode formation portion is preferably a forward tapered shape.
【００２６】次いで、電極８をＩｎＳｂ薄膜２の側壁７
を十分覆うように形成し、埋め込み電極９を形成し、こ
の後、マスク材６をリフトオフ法により剥離除去して、
所望の素子形状を得、最後にＳｉＯＮ保護膜を素子全面
に被覆して、素子が完成する（図１(5)）。この際のマ
スク材６の形状は、逆テーパ形状が好ましい。Next, the electrode 8 is formed on the side wall 7 of the InSb thin film 2.
To form a buried electrode 9, and then the mask material 6 is peeled off and removed by a lift-off method.
A desired element shape is obtained, and finally the SiON protective film is coated on the entire surface of the element to complete the element (FIG. 1 (5)). The shape of the mask material 6 at this time is preferably an inverse taper shape.
【００２７】こうして完成した素子では、埋め込み電極
９を有するため、磁気抵抗効果を生じない無効な電流経
路が無く、従来に比して、磁気抵抗効果を向上させるこ
とが可能となる。この点を具体的に、従来の作成方式と
比較して述べるものとする。Since the element thus completed has the embedded electrode 9, there is no ineffective current path that does not cause the magnetoresistive effect, and the magnetoresistive effect can be improved as compared with the conventional one. This point will be specifically described in comparison with the conventional creation method.
【００２８】図４に、従来の技術で作成した半導体薄膜
磁気抵抗素子の断面図を示す。同図に示すように電極１
０は、単純にＩｎＳｂ薄膜２の上に形成されている。こ
の構成において、通常素子における電流経路は、素子部
１１では、電流経路１２のように膜面に平行であるが、
電極近傍では、特にＩｎＳｂ薄膜２の表面から深い所ほ
ど電流経路１３のように曲がりを生じる。ここで素子面
に対して垂直に磁界を印加すると、電流経路１２につい
ては、磁気抵抗効果を生じるものの、電流経路１３につ
いては、磁気抵抗効果を生じない。従って従来の構造で
は、トータルの磁気抵抗効果にロスを生じるのに対し
て、本実施例の半導体薄膜磁気抵抗素子の埋め込み電極
９では、従来の電流経路１３がないため、磁気抵抗効果
特性が向上する。加えて、従来の電極構成では、素子の
Ｌ寸法に応じて電極形状（Ｌ寸法）を変える必要があ
り、この最適化設計が複雑であったのに対して、埋め込
み電極構成ではこうした設計の制約を考える必要がな
く、素子設計の自由度が向上する。FIG. 4 shows a sectional view of a semiconductor thin film magnetoresistive element manufactured by a conventional technique. As shown in the figure, electrode 1
0 is simply formed on the InSb thin film 2. In this configuration, the current path in the normal element is parallel to the film surface in the element section 11 like the current path 12,
In the vicinity of the electrodes, in particular, a deeper portion from the surface of the InSb thin film 2 is bent like a current path 13. When a magnetic field is applied perpendicularly to the element surface, the current path 12 produces a magnetoresistive effect, but the current path 13 does not produce a magnetoresistive effect. Therefore, in the conventional structure, a loss occurs in the total magnetoresistive effect, whereas in the embedded electrode 9 of the semiconductor thin film magnetoresistive element of this embodiment, the conventional current path 13 is not provided, so that the magnetoresistive effect characteristic is improved. To do. In addition, in the conventional electrode configuration, it is necessary to change the electrode shape (L dimension) according to the L dimension of the element, and this optimization design is complicated, whereas in the embedded electrode configuration, such a design constraint is imposed. Therefore, the degree of freedom in device design is improved.
【００２９】このようにして作成した素子について、従
来のＩｎＳｂ薄膜の電子移動度（１ｍ2／Ｖ・ｓ）を有
する図４に示すような従来の技術で作成した半導体薄膜
磁気抵抗素子の磁界−抵抗変化特性と、本実施例の熱処
理工程を経て従来の電極構造にしたものおよび熱処理工
程と埋め込み電極構成を有するものでの磁界−抵抗変化
特性を各々、図５の曲線１４，１５，１６に示す。同図
より本発明の半導体薄膜磁気抵抗素子の製造方法により
作成した素子では、従来法によるものに比べ、格段に磁
気抵抗効果が向上することがわかる。The magnetic field of the semiconductor thin film magnetoresistive element prepared by the conventional technique as shown in FIG. 4 having the electron mobility (1 m 2 / V · s) of the conventional InSb thin film of the element thus prepared The resistance change characteristics and the magnetic field-resistance change characteristics of the conventional electrode structure that has been subjected to the heat treatment process of this embodiment and the heat treatment process and the buried electrode structure are shown in curves 14, 15 and 16 of FIG. 5, respectively. Show. From the figure, it can be seen that the magnetoresistive effect is remarkably improved in the element manufactured by the method for manufacturing a semiconductor thin film magnetoresistive element of the present invention as compared with the element manufactured by the conventional method.
【００３０】また、本実施例の作成方式により作成した
薄膜磁気抵抗素子を−５０〜１５０℃の温度サイクル下
で繰り返し、特性劣化試験を行ったが、従来生じたよう
な素子劣化は生じず、極めて高い信頼性を有すること
が、確認された。加えて、ＩｎＳｂ薄膜２を熱処理する
際にその表面に被覆する絶縁層４が素子のＩｎＳｂ薄膜
層２を常に保護しているために、最終素子全面に形成す
る保護膜を樹脂等としても素子劣化が生じにくい点も付
け加えておく。Further, the thin film magnetoresistive element manufactured by the manufacturing method of this embodiment was repeatedly subjected to a characteristic deterioration test under a temperature cycle of -50 to 150 ° C., but the element deterioration which occurred conventionally does not occur. It was confirmed to have extremely high reliability. In addition, since the insulating layer 4 covering the surface of the InSb thin film 2 is always protecting the InSb thin film layer 2 of the element when the InSb thin film 2 is heat-treated, even if the protective film formed on the entire surface of the final element is made of resin or the like, the element is deteriorated. I also added that it is unlikely to occur.
【００３１】尚、本実施例では、基板として、ガラス基
板を用いたが、Ｓｉウエハ等の半導体基板や表面絶縁化
基板、スルーホール電極を有するグレイズドアルミナ基
板等を用いても良いことは言うまでもない。In this embodiment, the glass substrate is used as the substrate, but it goes without saying that a semiconductor substrate such as a Si wafer, a surface-insulated substrate, a glaze alumina substrate having a through hole electrode, or the like may be used. Yes.
【００３２】[0032]
【発明の効果】以上述べたところから明らかなように、
本発明によれば、ＩｎＳｂ薄膜の結晶性が改善され、電
子移動度が大きく、さらに埋め込み電極構成を有するた
め、磁気抵抗効果に対して無効となる電流経路を無くし
て磁気抵抗効果が向上し、加えて、ＩｎＳｂ薄膜でなる
抵抗素子部の上に常に絶縁層が被覆され、素子部を保護
しているため信頼性が向上する。As is apparent from the above description,
According to the present invention, the crystallinity of the InSb thin film is improved, the electron mobility is high, and the buried electrode structure is provided. Therefore, the current path that is ineffective against the magnetoresistive effect is eliminated and the magnetoresistive effect is improved. In addition, since the insulating layer is always coated on the resistance element portion made of the InSb thin film to protect the element portion, the reliability is improved.
【００３３】従って、本発明を用いて作成したＩｎＳｂ
薄膜および埋め込み電極を用いることで、−５０〜＋１
５０℃の温度範囲においても十分信頼性の高い半導体薄
膜磁気抵抗素子を提供することができ、産業上の利用価
値は、極めて大きい。Therefore, the InSb prepared by using the present invention.
By using a thin film and a buried electrode, -50 to +1
It is possible to provide a semiconductor thin film magnetoresistive element having a sufficiently high reliability even in a temperature range of 50 ° C., and its industrial utility value is extremely large.
【図１】本発明の一実施例の半導体薄膜磁気抵抗素子の
製造方法の概略工程図である。FIG. 1 is a schematic process drawing of a method of manufacturing a semiconductor thin film magnetoresistive element according to an embodiment of the present invention.
【図２】本実施例のＩｎＳｂ薄膜の素子間分離パターン
形成を説明する斜視図である。FIG. 2 is a perspective view illustrating formation of an element isolation pattern of an InSb thin film of this example.
【図３】本実施例の素子製造工程の詳細を説明する図で
ある。FIG. 3 is a diagram for explaining the details of the element manufacturing process of the present embodiment.
【図４】従来の技術で作成した半導体薄膜磁気抵抗素子
の断面図である。FIG. 4 is a cross-sectional view of a semiconductor thin film magnetoresistive element prepared by a conventional technique.
【図５】従来及び本発明の製造方法により製造された半
導体薄膜磁気抵抗素子の磁界−抵抗変化特性の一例を示
すグラフである。FIG. 5 is a graph showing an example of a magnetic field-resistance change characteristic of a semiconductor thin film magnetoresistive element manufactured by a conventional method and a manufacturing method of the present invention.
１ 基板 ２ ＩｎＳｂ薄膜 ４ 絶縁層 ５ 電極形成部分 ９ 埋め込み電極 1 substrate 2 InSb thin film 4 insulating layer 5 electrode forming portion 9 embedded electrode
Claims (6)
形成する工程と、そのアンチモン化インジウム薄膜を素
子形状に加工する工程と、そのアンチモン化インジウム
薄膜上に絶縁層を形成する工程と、そのアンチモン化イ
ンジウム薄膜を３００℃以上５２５℃未満の温度で熱処
理する工程と、前記絶縁層およびアンチモン化インジウ
ム薄膜の電極を形成する部分のみを前記基板から除去す
る工程と、この後電極を形成する工程とを備えたことを
特徴とする半導体薄膜磁気抵抗素子の製造方法。1. A step of forming an indium antimonide thin film on a substrate, a step of processing the indium antimonide thin film into a device shape, a step of forming an insulating layer on the indium antimonide thin film, and its antimony conversion. A step of heat-treating the indium thin film at a temperature of 300 ° C. or higher and lower than 525 ° C., a step of removing only the insulating layer and a portion of the indium antimonide thin film forming an electrode from the substrate, and a step of forming an electrode thereafter. A method of manufacturing a semiconductor thin film magnetoresistive element, comprising:
形成する工程と、そのアンチモン化インジウム薄膜を素
子形状に加工する工程と、そのアンチモン化インジウム
薄膜上に絶縁層を形成する工程と、そのアンチモン化イ
ンジウム薄膜を５２５℃以上の温度で熱処理する工程
と、前記絶縁層およびアンチモン化インジウム薄膜の電
極を形成する部分のみを前記基板から除去する工程と、
この後電極を形成する工程とを備えたことを特徴とする
半導体薄膜磁気抵抗素子の製造方法。2. A step of forming an indium antimonide thin film on a substrate, a step of processing the indium antimonide thin film into an element shape, a step of forming an insulating layer on the indium antimonide thin film, and its antimony conversion. A step of heat-treating the indium thin film at a temperature of 525 ° C. or higher; a step of removing only the insulating layer and a portion of the indium antimonide thin film forming an electrode from the substrate;
A method of manufacturing a semiconductor thin film magnetoresistive element, comprising the step of forming electrodes thereafter.
分としてなる材料層であることを特徴とする請求項１又
は２記載の半導体薄膜磁気抵抗素子の製造方法。3. The method for manufacturing a semiconductor thin film magnetoresistive element according to claim 1, wherein the insulating layer is a material layer containing silicon and nitrogen or oxygen as main components.
する請求項１記載の半導体薄膜磁気抵抗素子の製造方
法。4. The method of manufacturing a semiconductor thin film magnetoresistive element according to claim 1, wherein the insulating layer is polyimide.
あることを特徴とする請求項１又は２記載の半導体薄膜
磁気抵抗素子の製造方法。5. The method of manufacturing a semiconductor thin film magnetoresistive element according to claim 1, wherein the substrate is an insulating substrate or a semiconductor substrate.
ら裏面に貫通するスルーホール導体を備えたものである
ことを特徴とする請求項１又は２記載の半導体薄膜磁気
抵抗素子の製造方法。6. The method of manufacturing a semiconductor thin film magnetoresistive element according to claim 1, wherein the substrate has an insulating substrate and a through-hole conductor penetrating from the surface on which the element is formed to the back surface. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4307182A JPH06164017A (en) | 1992-11-17 | 1992-11-17 | Manufacture of semiconductor thin-film magneto resistance element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4307182A JPH06164017A (en) | 1992-11-17 | 1992-11-17 | Manufacture of semiconductor thin-film magneto resistance element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06164017A true JPH06164017A (en) | 1994-06-10 |
Family
ID=17966027
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4307182A Pending JPH06164017A (en) | 1992-11-17 | 1992-11-17 | Manufacture of semiconductor thin-film magneto resistance element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06164017A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7244368B2 (en) | 2002-03-29 | 2007-07-17 | Fujitsu Limited | Manufacturing process of a magnetic head, magnetic head, pattern formation method |
| US20230042689A1 (en) * | 2018-06-06 | 2023-02-09 | Government Of The United States, As Represented By The Secretary Of The Air Force | Optimized Heteroepitaxial Growth of Semiconductors |
-
1992
- 1992-11-17 JP JP4307182A patent/JPH06164017A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7244368B2 (en) | 2002-03-29 | 2007-07-17 | Fujitsu Limited | Manufacturing process of a magnetic head, magnetic head, pattern formation method |
| US20230042689A1 (en) * | 2018-06-06 | 2023-02-09 | Government Of The United States, As Represented By The Secretary Of The Air Force | Optimized Heteroepitaxial Growth of Semiconductors |
| US11761115B2 (en) | 2018-06-06 | 2023-09-19 | United States Of America As Represented By The Secretary Of The Air Force | Optimized heteroepitaxial growth of semiconductors |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5385864A (en) | Method of fabricating semiconductor thin film and a Hall-effect device | |
| US20060046488A1 (en) | Germanium-on-insulator fabrication utilizing wafer bonding | |
| JPH06164017A (en) | Manufacture of semiconductor thin-film magneto resistance element | |
| JP3158588B2 (en) | Transfer formation method of InSb thin film | |
| JPS6128213B2 (en) | ||
| JP3180378B2 (en) | Method of manufacturing semiconductor thin film and method of manufacturing semiconductor magnetoresistive element | |
| JPH0964319A (en) | Soi substrate and its manufacture | |
| KR940003745B1 (en) | Active device having an oxide super conductor and a fabrication process thereof | |
| JP2009158612A (en) | Diamond field effect transistor | |
| JPH0634411B2 (en) | Superconducting device | |
| JPH03104209A (en) | Manufacture of semiconductor device | |
| JPS57211749A (en) | Manufacture of dielectric separating substrate | |
| JPH10326921A (en) | Production of semiconductor thin-film magnetoresistive element | |
| JPH06209130A (en) | Forming method of insb thin film | |
| JPH07169686A (en) | Manufacture of semiconductor thin film and semiconductor thin film magnetoresistance element | |
| JPH0210882A (en) | Semiconductor thin film magnetoresistance element and manufacture thereof | |
| JPH07166323A (en) | Production of thin '-fesi2 film and device with the same | |
| JPH10209523A (en) | Magnetoelectric transducer | |
| Gottlieb et al. | The epitaxial deposition of silicon on insulating substrates for MOS circuitry | |
| JPH02163935A (en) | Manufacture of semiconductor device | |
| JP2540185B2 (en) | Semiconductor device | |
| JP3551134B2 (en) | Method for manufacturing magnetic tunnel effect element | |
| JP2731513B2 (en) | Superconducting element and method of manufacturing the same | |
| JPH0242729A (en) | Aluminum-based thin-film wiring | |
| JP2689946B2 (en) | Manufacturing method of infrared detector |