JPH06151988A - Superconducting three-terminal element - Google Patents
Superconducting three-terminal elementInfo
- Publication number
- JPH06151988A JPH06151988A JP4292441A JP29244192A JPH06151988A JP H06151988 A JPH06151988 A JP H06151988A JP 4292441 A JP4292441 A JP 4292441A JP 29244192 A JP29244192 A JP 29244192A JP H06151988 A JPH06151988 A JP H06151988A
- Authority
- JP
- Japan
- Prior art keywords
- superconducting
- channel layer
- channel
- layer
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、超電導エレクトロニク
スの分野にかかり、特に高速かつ低消費電力の超電導ス
イッチング素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the field of superconducting electronics, and more particularly to a superconducting switching device which operates at high speed and consumes low power.
【０００２】[0002]
【従来の技術】超電導電流の電流経路をチャネルとし、
チャネル部に絶縁ゲートを設けて超電導電流を制御する
超電導三端子素子として、二つのタイプの三端子素子が
知られている。第一のタイプの素子は、超電導薄膜をそ
のままチャネルとして用いたものであり、ＳｕＦＥＴと
名付けられている。この素子については例えば、ＩＥＥ
Ｅ・トランザクション・オン・マグネティクス，ＭＡＧ
−２３巻１２７９頁、１９８９年（ＩＥＥＥ Ｔｒａｎ
ｓａｃｔｉｏｎ ｏｎ Ｍａｇｎｅｔｉｃｓ、Ｖｏｌ．
Ｍａｇ−２３、ｐ．１２７９，１９８９）に報告されて
いる。超電導体としてＩｎ／ＩｎＯx、 ゲート絶縁膜と
して、Ａｌ2Ｏ3を用いた素子が試作され、ゲートに電圧
を印加することによりチャネルの超電導−常伝導転移を
確認している。第二のタイプは超電導−常伝導−超電導
接合を形成し、常伝導層の部分をチャネルとして常伝導
層に絶縁ゲートを設けた三端子素子であり、ＪＯＦＥＴ
と名付けられている。例えばＩＥＥＥ・エレクトロン・
デバイス・レターズ、ＥＤＬ−６巻、２９７頁、１９８
５年（ＩＥＥＥ Ｅｌｅｃｔｏｒｏｎ ＤｅｖｉｃｅＬ
ｅｔｔｅｒｓ，ＥＤＬ−６，２９７，１９８５）に、常
伝導体としてシリコン、超電導体としてＰｂを用い、ゲ
ート絶縁膜としてシリコン酸化膜を用いた三端子素子が
報告されている。ゲート電圧によってチャネルの常伝導
−超電導転移を確認している。2. Description of the Related Art A current path of a superconducting current is used as a channel,
Two types of three-terminal elements are known as superconducting three-terminal elements that control the superconducting current by providing an insulated gate in the channel portion. The first type element uses a superconducting thin film as a channel as it is, and is named SuFET. For this element, for example, IEEE
E-Transaction on Magnetics, MAG
Volume 23, p. 1279, 1989 (IEEE Tran
action on Magnetics, Vol.
Mag-23, p. 1279, 1989). A device using In / InOx as a superconductor and Al 2 O 3 as a gate insulating film was prototyped, and the superconducting-normal conduction transition of the channel was confirmed by applying a voltage to the gate. The second type is a three-terminal element in which a superconducting-normal conduction-superconducting junction is formed and an insulated gate is provided in the normal conduction layer with the normal conduction layer portion as a channel.
It is named. For example, IEEE Electron
Device Letters, EDL-6, 297, 198
5 years (IEEE Electron DeviceL
eters, EDL-6, 297, 1985), a three-terminal element using silicon as a normal conductor, Pb as a superconductor, and a silicon oxide film as a gate insulating film is reported. The normal-superconducting transition of the channel is confirmed by the gate voltage.
【０００３】これらの従来技術において、超電導三端子
素子は、ゲート電極によってチャネルの状態として超電
導状態と常伝導状態の２種類の状態が実現できるので、
これらをオン、オフの２つの状態としたスイッチング素
子が実現できる。In these prior arts, the superconducting three-terminal element can realize two kinds of states of the channel, that is, the superconducting state and the normal conducting state, by the gate electrode.
A switching element having these two states of ON and OFF can be realized.
【０００４】[0004]
【発明が解決しようとする課題】上記従来技術において
は、チャネルの状態として超電導状態、常伝導状態の２
状態を用いることができる。実際には同じ超電導状態で
あっても、ゲート電圧の値によってチャネルの超電導電
流の臨界電流は変わる。しかし、この臨界電流の変化は
ゲート電圧に対して連続的なので、回路に用いる場合に
臨界電流の異なる状態を、区別して扱うことはできな
い。従って従来の素子で３状態以上の状態を扱うために
は、複数の素子の組合せが必要であった。従来の素子の
大きさで、単一素子で３状態以上の状態を扱えれば、同
じレベルの集積度で、より多くの情報を扱える。このこ
とは用いる素子数が多いほど顕著に現れる。例えば単純
計算で１００素子を用いた場合に扱える情報量は、従来
素子では２100 ＝１．３×１０30に対し、例えば単一素
子で４状態扱える素子では４100＝１．６×１０60と３
０桁も多くの情報を扱えることになる。この差は素子数
が多いほど顕著に現れるので、集積度の高い回路ほど効
果が大きい。In the above-mentioned prior art, there are two states of a channel, a superconducting state and a normal conducting state.
States can be used. In fact, even in the same superconducting state, the critical current of the superconducting current in the channel changes depending on the value of the gate voltage. However, since the change in the critical current is continuous with respect to the gate voltage, it is not possible to distinguish between different states of the critical current when used in a circuit. Therefore, in order to handle three or more states with the conventional element, it is necessary to combine a plurality of elements. If the size of the conventional element can handle three or more states with a single element, more information can be handled with the same level of integration. This becomes more remarkable as the number of elements used increases. For example, the amount of information that can be handled when 100 elements are used in a simple calculation is 2 100 = 1.3 × 10 30 for a conventional element, and 4 100 = 1.6 × 10 60 for an element that can handle 4 states with a single element. And 3
As many as 0 digits can handle a lot of information. This difference becomes more remarkable as the number of elements increases, so that the effect is greater in circuits with higher integration.
【０００５】本発明の目的は上に述べたような単一素子
で３状態以上の離散的な状態を制御できる三端子素子を
超電導体を利用して実現することにある。It is an object of the present invention to realize a three-terminal element capable of controlling three or more discrete states with a single element as described above by using a superconductor.
【０００６】[0006]
【課題を解決するための手段】上記目的を達成するため
の三端子素子として、ＳｕＦＥＴおよびＪＯＦＥＴに対
応して、以下に示す２つのタイプの超電導三端子素子が
考えられる。As a three-terminal element for achieving the above object, the following two types of superconducting three-terminal elements can be considered, corresponding to SuFET and JOFET.
【０００７】（１）電界効果型の超電導三端子素子を、
電気伝導性材料から成るチャネル層、良導体からなるソ
ース電極およびドレイン電極、絶縁体薄膜、および良導
体からなるゲート電極によって構成する。ソース電極と
ドレイン電極の間のチャネル層の部分の上部または下部
に絶縁体膜を介して良導体からなるゲート電極を配置す
る。このような三端子素子において、チャネル層を超電
導層と常伝導層が交互に積層されている構造を持つよう
に構成する。ここで各層の境界の面は、ソース電極とド
レイン電極を結ぶ方向に対して平行で、かつ絶縁体薄膜
とチャネルの界面に対して平行であることが望ましい。
チャネルを形成する超電導材料および常伝導材料として
は、良好な界面を得ることができ、かつ多層のエピタキ
シャル成長が可能な材料として、銅を含んだ酸化物超電
導体と同じく銅を含み同じ結晶構造を有する酸化物常伝
導材料の組合せが有望である。例えばチャネル層中の超
電導層としてＹ−Ｂａ−Ｃｕ−Ｏから構成される超電導
酸化物を用い、チャネル層の常伝導体としてはＬｎ−Ｂ
ａ−Ｃｕ−ＯまたはＹ−Ｂａ−Ｃｕ−Ｏから成り、該Ｌ
ｎがＰｒを除く希土類元素からなり、ＹまたはＬｎとＢ
ａの組成比が、１．３：３．７から１．５：１．５の範
囲にある酸化物材料を用いる。常伝導材料としては（Ｙ
・Ｐｒ）−Ｂａ−Ｃｕ−Ｏから成り、ＹとＰｒの組成比
が１：１以下であるものを用いてもよい。(1) A field effect type superconducting three-terminal element
A channel layer made of an electrically conductive material, a source electrode and a drain electrode made of a good conductor, an insulator thin film, and a gate electrode made of a good conductor. A gate electrode made of a good conductor is arranged above or below the portion of the channel layer between the source electrode and the drain electrode with an insulator film interposed therebetween. In such a three-terminal element, the channel layer is configured to have a structure in which superconducting layers and normal conducting layers are alternately laminated. Here, the boundary surface of each layer is preferably parallel to the direction connecting the source electrode and the drain electrode and parallel to the interface between the insulator thin film and the channel.
As a superconducting material and a normal-conducting material for forming a channel, as a material capable of obtaining a good interface and capable of epitaxial growth of multiple layers, it has the same crystal structure containing copper as the oxide superconductor containing copper. Promising combinations of normal oxide materials. For example, a superconducting oxide composed of Y-Ba-Cu-O is used as the superconducting layer in the channel layer, and Ln-B is used as the normal conductor of the channel layer.
a-Cu-O or Y-Ba-Cu-O, wherein L
n is a rare earth element except Pr, and Y or Ln and B
An oxide material having a composition ratio of a in the range of 1.3: 3.7 to 1.5: 1.5 is used. As a normal conductive material (Y
-Pr) -Ba-Cu-O, and the composition ratio of Y and Pr may be 1: 1 or less.
【０００８】（２）電界効果型の超電導三端子素子を電
気伝導性材料から成るチャネル層、超伝導体から成るソ
ース電極およびドレイン電極、絶縁体薄膜、および良導
体から成るゲート電極によって構成する。ソース電極と
ドレイン電極の間のチャネル層の部分の上部または下部
に絶縁体膜を介して良導体からなるゲート電極を配置す
る。このような三端子素子において、チャネル層が、キ
ャリヤ密度の異なる２種類の常伝導材料を交互に積層し
た構造を持つように構成する。ここで各層の境界の面は
ソース電極とドレイン電極を結ぶ方向に対して平行で、
かつ絶縁体薄膜とチャネル層の界面に対して平行である
ことが望ましい。チャネル層を形成する２種類の材料と
しては、良好な界面を形成でき、かつ多層のエピタキシ
ャル成長が可能な材料として、銅を含む電気伝導性酸化
物が考えられる。第一の材料として、Ｌｎ−Ｂａ−Ｃｕ
−ＯまたはＹ−Ｂａ−Ｃｕ−Ｏから成る材料（ＬｎはＰ
ｒを除く希土類元素）でＬｎもしくはＹとＢａの組成比
が１．３：１．７から１．５：１．５の範囲のものを用
い、第二の材料として（Ｙ・Ｐｒ）−Ｂａ−Ｃｕ−Ｏか
ら成る材料でＹとＰｒの組成比が１：１以下であるもの
を用いて上記チャネル層を構成できる。チャネル層をこ
のような材料で構成すると、超電導電極の材料として銅
を含む酸化物超伝導体を用いる場合、界面の整合性がよ
い。超伝導体として非酸化物を用いる場合は、チャネル
としては、超格子構造をもつ半導体、例えばホウ素のド
ープ量の異なるシリコンを交互に積層した構造、または
ＧａＡｓとＡｌxＧａ1-xＡｓの超格子構造等を用いても
よい。(2) A field effect type superconducting three-terminal element is constituted by a channel layer made of an electrically conductive material, source and drain electrodes made of a superconductor, an insulator thin film, and a gate electrode made of a good conductor. A gate electrode made of a good conductor is arranged above or below the portion of the channel layer between the source electrode and the drain electrode with an insulator film interposed therebetween. In such a three-terminal element, the channel layer has a structure in which two kinds of normal conductive materials having different carrier densities are alternately laminated. Here, the boundary surface of each layer is parallel to the direction connecting the source electrode and the drain electrode,
Further, it is desirable that it is parallel to the interface between the insulator thin film and the channel layer. As the two kinds of materials forming the channel layer, an electrically conductive oxide containing copper is considered as a material capable of forming a good interface and capable of performing epitaxial growth of multiple layers. As a first material, Ln-Ba-Cu
-O or Y-Ba-Cu-O (Ln is P
(rare earth elements other than r) having a composition ratio of Ln or Y to Ba in the range of 1.3: 1.7 to 1.5: 1.5 and (Y · Pr) -Ba as the second material The channel layer can be formed by using a material composed of —Cu—O and having a composition ratio of Y and Pr of 1: 1 or less. When the channel layer is made of such a material, the interface consistency is good when an oxide superconductor containing copper is used as the material of the superconducting electrode. When a non-oxide is used as the superconductor, the channel has a semiconductor having a superlattice structure, for example, a structure in which silicon having different doping amounts of boron is alternately stacked, or a superstructure of GaAs and Al x Ga 1-x As. A lattice structure or the like may be used.
【０００９】[0009]
【作用】以上の超電導三端子素子の構造においては、チ
ャネル層において超電導電流の経路が複数存在する。Ｓ
ｕＦＥＴ型の素子では超電導層が超電導電流の経路とな
る。ＪＯＦＥＴ型の素子では、超電導キャリヤの染みだ
しはキャリヤ密度の１／ｎ乗（ｎはキャリヤ系の次元）
に比例するので、主にキャリヤ密度の大きい材料の領域
が超電導電流の経路になる。In the structure of the superconducting three-terminal element described above, there are a plurality of superconducting current paths in the channel layer. S
In the uFET type device, the superconducting layer serves as a path for the superconducting current. In the JOFET type element, the exudation of superconducting carriers is the carrier density raised to the 1 / nth power (n is the dimension of the carrier system).
Since it is proportional to, the region of the material having a high carrier density becomes the path of the superconducting current.
【００１０】ゲート電極に電圧を印加すると、絶縁体膜
を介して電界がチャネル層に侵入し、チャネル層のキャ
リヤ密度が変化する。常伝導層のキャリヤが正孔である
場合、ゲートに正の電圧を印加すると、チャネル層の中
で絶縁体界面に近い部分、ほとんどキャリヤの存在しな
い空乏層ができる。超電導状態を保っているチャネルの
伝導層の枚数を決めることができる。したがってチャネ
ルの伝導層の枚数をｎとすると超電導の枚数０枚からｎ
枚までｎ＋１の状態を区別することができる。各状態は
素子特性としてソース・ドレイン間の臨界電流に反映さ
れる。各層の担う超電導電流が仮に等しいとしてこれを
Icとおくと、ソース・ドレイン間の臨界電流IcSDは、Ic
の整数倍になる。従ってIcSDはゲート電圧に対して階段
状に変化することになる。When a voltage is applied to the gate electrode, an electric field penetrates into the channel layer through the insulator film, and the carrier density of the channel layer changes. When the carriers in the normal conductive layer are holes, when a positive voltage is applied to the gate, a depletion layer where almost no carriers exist is formed in the channel layer near the insulator interface. It is possible to determine the number of conductive layers of the channel that maintains the superconducting state. Therefore, if the number of conductive layers in the channel is n, the number of superconducting layers is 0 to n.
It is possible to distinguish up to n + 1 states. Each state is reflected in the critical current between the source and drain as a device characteristic. Assuming that the superconducting currents carried by each layer are equal,
When I c is set, the critical current I cSD between the source and drain is I c
Becomes an integral multiple of. Therefore, I cSD changes stepwise with respect to the gate voltage.
【００１１】[0011]
【実施例】以下、この発明の実施例を示す。本発明の第
１の実施例を図１に示す。図において１はソース電極、
２はドレイン電極、３は絶縁膜、４はゲート電極、５は
常伝導体、６は超伝導体、８は基板である。EXAMPLES Examples of the present invention will be shown below. A first embodiment of the present invention is shown in FIG. In the figure, 1 is a source electrode,
Reference numeral 2 is a drain electrode, 3 is an insulating film, 4 is a gate electrode, 5 is a normal conductor, 6 is a superconductor, and 8 is a substrate.
【００１２】基板として（１００）面方位の基板を用
い、チャネルとしては超電導層として（００１）方位の
Ｙ−Ｂａ−Ｃｕ−Ｏ酸化物薄膜、常伝導層として（００
１）方位のＰｒ−Ｂａ−Ｃｕ−Ｏ酸化物常伝導薄膜を交
互に積層した膜を分子線エピタキシ法で形成する。Ｙ−
Ｂａ−Ｃｕ−Ｏ層、Ｐｒ−Ｂａ−Ｃｕ−Ｏ層とも約１．
２ナノメータの単位格子の厚さとし、Ｙ−Ｂａ−Ｃｕ−
Ｏ層を３層、Ｐｒ−Ｂａ−Ｃｕ−Ｏ層を４層とする。形
成した積層膜に対しドライエッチングを行い、ソース電
極およびドレイン電極を形成する部分を除去し、エッチ
ングを受けた多層膜の断面を酸素プラズマにさらして酸
化した後に銀のソース電極およびドレイン電極を真空蒸
着法で形成する。チャネルの上部の絶縁膜としてＳｒＴ
ｉＯ3薄膜をレーザー蒸着法で形成する。更にその上に
ゲート電極を真空蒸着によって形成する。A substrate having a (100) plane orientation is used as a substrate, a superconducting layer is used as a channel, a (001) orientation Y-Ba-Cu-O oxide thin film, and a normal conduction layer is (00).
1) A film obtained by alternately stacking Pr-Ba-Cu-O oxide normal-conducting thin films having an orientation is formed by a molecular beam epitaxy method. Y-
Both the Ba-Cu-O layer and the Pr-Ba-Cu-O layer are about 1.
The thickness of the unit cell is 2 nanometers, and Y-Ba-Cu-
The O layer has three layers and the Pr—Ba—Cu—O layer has four layers. The formed laminated film is dry-etched to remove the portions where the source and drain electrodes are to be formed, and the cross-section of the etched multilayer film is exposed to oxygen plasma for oxidation and then the silver source and drain electrodes are vacuumed. It is formed by vapor deposition. SrT as an insulating film above the channel
An iO 3 thin film is formed by a laser deposition method. Further, a gate electrode is formed thereon by vacuum vapor deposition.
【００１３】上記の素子の典型的な特性例を図５に示
す。ゲート電極に電圧を印加することで、ソース・ドレ
イン間の超電導臨界電流が変化する。この場合、チャネ
ル中の超電導層は３層あり、順次ゲート電極の電圧の影
響を受ける。超電導層一層が担う超電導臨界電流をＩc
とすると、ソースとドレインの間の超電導電流は、図６
に示すように３Ｉc、２Ｉc、Ｉc、０の４つの値をとり
得る。すなわちゲート電圧に対して、離散的なソース・
ドレイン間臨界電流値が得られる。FIG. 5 shows a typical characteristic example of the above element. By applying a voltage to the gate electrode, the superconducting critical current between the source and drain changes. In this case, there are three superconducting layers in the channel, which are successively affected by the voltage of the gate electrode. The superconducting critical current carried by one layer of the superconducting layer is I c
Then, the superconducting current between the source and drain is
As shown in FIG. 3, four values of 3I c , 2I c , I c , and 0 can be taken. That is, with respect to the gate voltage,
The critical current value between drains can be obtained.
【００１４】ソース・ドレイン間に負荷を接続した場
合、負荷曲線は、図５に示したようになる。ソース・ド
レイン電流およびソース・ドレイン電圧は図５中で示し
たような、４つの状態をとり得る。これらの状態は、ゲ
ート電圧に依存して、離散的に現れるので、ゲート電圧
によって４通りの出力状態を設定することができる。When a load is connected between the source and the drain, the load curve is as shown in FIG. The source / drain current and the source / drain voltage can take four states as shown in FIG. Since these states appear discretely depending on the gate voltage, four output states can be set by the gate voltage.
【００１５】本発明の第２の実施例を図２に示す。A second embodiment of the present invention is shown in FIG.
【００１６】上記実施例１と同様にＹ−Ｂａ−Ｃｕ−Ｏ
およびＰｒ−Ｂａ−Ｃｕ−Ｏから成る積層膜を形成した
のち、ソース電極およびドレイン電極を、図２のように
積層膜の上から銀を真空蒸着して形成する。チャネルの
上部の絶縁膜として、ＳｒＴｉＯ3をレーザ蒸着法によ
って１００ｎｍ形成し、その上にゲート電極を真空蒸着
によって形成する。As in Example 1, Y-Ba-Cu-O
After forming a laminated film made of and Pr-Ba-Cu-O, a source electrode and a drain electrode are formed by vacuum-depositing silver on the laminated film as shown in FIG. As the insulating film above the channel, SrTiO 3 is formed to a thickness of 100 nm by a laser deposition method, and a gate electrode is formed thereon by vacuum deposition.
【００１７】ゲート電圧がゼロの場合は、チャネルで
は、Ｙ−Ｂａ−Ｃｕ−Ｏ層だけでなく、超電導近接効果
によりＰｒ−Ｂａ−Ｃｕ−Ｏ層も含めた全体が超電導状
態になっている。ソース・ドレイン間の超電導電流は、
主にＹ−Ｂａ−Ｃｕ−Ｏ層を通じて流れる。ゲート電極
に正の電圧を印加すると、チャネル中の３つの超電導層
が順次にゲート電圧の影響を受けて、常伝導状態に転移
する。その結果、図６に示すような離散的なソース・ド
レイン間の臨界電流値が得られる。When the gate voltage is zero, in the channel, not only the Y-Ba-Cu-O layer but also the Pr-Ba-Cu-O layer is in a superconducting state due to the superconducting proximity effect. The superconducting current between the source and drain is
It flows mainly through the Y-Ba-Cu-O layer. When a positive voltage is applied to the gate electrode, the three superconducting layers in the channel are sequentially affected by the gate voltage and transition to the normal conduction state. As a result, a discrete source-drain critical current value as shown in FIG. 6 is obtained.
【００１８】図３は本発明の第３の実施例を示す図であ
り、図３において７および８は常伝導体であり、８に用
いる常伝導体のキャリヤ密度が７に用いる常伝導体のキ
ャリヤ密度より大きいものにする。例えば８としてキャ
リヤ密度３×１０21／ｃｍ3のＬａ2-xＢａxＣｕ
3Ｏ7-y、７としてキャリヤ密度１×１０19／ｃｍ3のＰ
ｒＢａ2Ｃｕ3Ｏ7-zを用いる。ＳｒＴｉＯ3（１１０）基
板の上に、（１１０）配向のＬａ2-xＢａxＣｕ3Ｏ7-yお
よび（１１０）配向のＰｒＢａ2Ｃｕ3Ｏ7-zを交互にレ
ーザー蒸着によって成膜する。Ｌａ2-xＢａxＣｕ3Ｏ7-y
層を３層とし、これをはさむ形でＰｒＢａ2Ｃｕ3Ｏ7-z
を４層形成する。形成した積層膜に対して、ソース電極
およびドレイン電極を形成する部分をイオンビームエッ
チングによって除去し、この部分に超伝導体ＨｏＢａ2
Ｃｕ3Ｏ7-xをプラズマ中の反応性蒸着によって形成す
る。常伝導層の部分に対してＳｒＴｉＯ3絶縁膜をレー
ザ蒸着し、その上からＡｕのゲート電極を形成する。２
つの超電導層の各々に銀電極を形成し、ソースおよびド
レイン電極とする。この場合、Ｌａ2-xＢａxＣｕ3Ｏ7-y
層の部分が、ソース・ドレイン間の超電導電流の経路と
なる。ゲート電極の電圧によって、各Ｌａ2-xＢａxＣｕ
3Ｏ7-y層が順次にキャリヤ密度変調をうけ、超電導電流
を流さなくなる。したがって、本素子は上記実施例１と
同様に、図５および図６で示すような特性を示し、ゲー
ト電圧による離散的な４状態の制御が可能になる。常伝
導体７として分子線エピタキシ法で形成したＧａＡｓま
たはシリコン単結晶、常伝導体８としてＡｌ0.3Ｇａ0.7
Ａｓまたはホウ素をドープしたシリコンを用い、超伝導
体５としてＮｂＮを用いてもよい。FIG. 3 is a diagram showing a third embodiment of the present invention. In FIG. 3, 7 and 8 are normal conductors, and the carrier density of the normal conductor used for 8 is that of the normal conductor used for 7. It should be higher than the carrier density. For example, 8 is La 2−x Ba x Cu with a carrier density of 3 × 10 21 / cm 3.
3 O 7-y , P with carrier density of 1 × 10 19 / cm 3 as 7
rBa 2 Cu 3 O 7-z is used. La -x Ba x Cu 3 O 7-y with (110) orientation and PrBa 2 Cu 3 O 7-z with (110) orientation are alternately deposited on a SrTiO 3 (110) substrate by laser deposition. . La 2-x Ba x Cu 3 O 7-y
The number of layers is three, and the layers are sandwiched by PrBa 2 Cu 3 O 7-z.
4 layers are formed. Ion beam etching is performed to remove portions of the formed laminated film where source and drain electrodes are to be formed, and the superconductor HoBa 2 is formed in these portions.
Cu 3 O 7-x is formed by reactive vapor deposition in plasma. An SrTiO 3 insulating film is laser-deposited on the portion of the normal conductive layer, and an Au gate electrode is formed on the SrTiO 3 insulating film. Two
A silver electrode is formed on each of the two superconducting layers to serve as a source and drain electrode. In this case, La 2-x Ba x Cu 3 O 7-y
The layer portion serves as a path for the superconducting current between the source and the drain. Depending on the voltage of the gate electrode, each La 2−x Ba x Cu
The 3 O 7-y layers are sequentially subjected to carrier density modulation, and the superconducting current does not flow. Therefore, this device exhibits the characteristics as shown in FIGS. 5 and 6 as in the case of the first embodiment, and it becomes possible to control the discrete four states by the gate voltage. The normal conductor 7 is a GaAs or silicon single crystal formed by a molecular beam epitaxy method, and the normal conductor 8 is Al 0.3 Ga 0.7.
Alternatively, NbN may be used as the superconductor 5 by using silicon doped with As or boron.
【００１９】本発明の第４の実施例を図４に示す。A fourth embodiment of the present invention is shown in FIG.
【００２０】実施例３と同様に３層のＬａ2-xＢａxＣｕ
3Ｏ7-y層と４層のＰｒＢａ2Ｃｕ3Ｏ7-z層からなる積層
膜を形成する。さらにその上に超電導性を有するＨｏＢ
ａ2Ｃｕ3Ｏ7-x薄膜をプラズマ中の反応性蒸着によって
形成する。得られた積層膜に対して電子線描画法および
イオンビームエッチング法により溝を形成して、ＨｏＢ
ａ2Ｃｕ3Ｏ7-x層を分断する。溝の底部にレーザー蒸着
法によりＳｒＴｉＯ3絶縁膜を成膜する。さらに真空蒸
着法によりソース電極、ドレイン電極およびゲート電極
を形成する。超電導薄膜の下のＬａ2-xＢａxＣｕ3Ｏ7-y
とＰｒＢａ2Ｃｕ3Ｏ7-zの積層膜は超電導近接効果によ
り、全体が超電導状態になる。ゲート電圧がゼロの場
合、チャネルの部分では、キャリヤの多いＬａ2-xＢａx
Ｃｕ3Ｏ7-y層だけが超電導近接効果により超電導状態に
なる。ゲートに電圧を印加すると、ゲートのＬａ2-xＢ
ａxＣｕ3Ｏ7-y層が順次にゲート電極からの電界の影響
を受けて常伝導状態になる。その結果図６で示されるよ
うにゲート電圧による離散的な臨界電流の制御が可能に
なる。As in Example 3, three layers of La 2−x Ba x Cu were formed.
A laminated film including a 3 O 7-y layer and four PrBa 2 Cu 3 O 7-z layers is formed. Furthermore, HoB which has superconductivity on it
An a 2 Cu 3 O 7-x thin film is formed by reactive vapor deposition in plasma. Grooves are formed in the obtained laminated film by an electron beam drawing method and an ion beam etching method, and HoB
The a 2 Cu 3 O 7-x layer is divided. An SrTiO 3 insulating film is formed on the bottom of the groove by laser deposition. Further, a source electrode, a drain electrode and a gate electrode are formed by a vacuum evaporation method. La 2-x Ba x Cu 3 O 7-y under superconducting thin film
The laminated film of PrBa 2 Cu 3 O 7-z and PrBa 2 Cu 3 O 7-z are entirely in a superconducting state due to the superconducting proximity effect. When the gate voltage is zero, in the channel part, La 2−x Ba x , which has a large number of carriers,
Only the Cu 3 O 7-y layer becomes superconducting due to the superconducting proximity effect. When voltage is applied to the gate, La 2-x B of the gate
The a x Cu 3 O 7-y layer is sequentially affected by the electric field from the gate electrode and becomes a normal conduction state. As a result, it becomes possible to control the discrete critical current by the gate voltage as shown in FIG.
【００２１】[0021]
【発明の効果】絶縁ゲートを介して超電導電流を制御す
る電界効果形三端子素子に対して、チャネル部分にゲー
ト絶縁膜と平行に複数の導電面を有することによって、
ソース・ドレイン間の超電導電流を段階的に制御するこ
とができる。その結果単一素子で複数の状態を持たせた
多値論理の回路の構成が可能になる。EFFECTS OF THE INVENTION For a field effect type three-terminal element for controlling superconducting current through an insulated gate, a channel portion has a plurality of conductive surfaces in parallel with a gate insulating film.
The superconducting current between the source and drain can be controlled stepwise. As a result, it becomes possible to configure a multivalued logic circuit having a plurality of states with a single element.
【図１】本発明の超電導三端子素子の構造の一例を示す
断面図である。FIG. 1 is a cross-sectional view showing an example of the structure of a superconducting three-terminal element of the present invention.
【図２】本発明の超電導三端子素子の構造の一例を示す
断面図である。FIG. 2 is a sectional view showing an example of the structure of a superconducting three-terminal element of the present invention.
【図３】本発明の超電導三端子素子の構造の一例を示す
断面図である。FIG. 3 is a cross-sectional view showing an example of the structure of a superconducting three-terminal element of the present invention.
【図４】本発明の超電導三端子素子の構造の一例を示す
断面図である。FIG. 4 is a sectional view showing an example of the structure of a superconducting three-terminal element of the present invention.
【図５】本発明の超電導三端子素子のソース・ドレイン
間の電圧電流特性と、負荷を接続した場合の動作点を示
す図である。FIG. 5 is a diagram showing a voltage-current characteristic between a source and a drain of the superconducting three-terminal element of the present invention, and an operating point when a load is connected.
【図６】本発明の超電導三端子素子のソース・ドレイン
間の超電導臨界電流のゲート電圧依存性を示す図であ
る。FIG. 6 is a diagram showing the gate voltage dependence of the superconducting critical current between the source and drain of the superconducting three-terminal device of the present invention.
１ ソース電極、 ２ ドレイン電極、 ３ ゲート絶縁膜、 ４ ゲート電極、 ５ 超電導体、 ６ 常伝導体、 ７ 常伝導体、 ８ 常伝導体、 ９ 基板。 1 source electrode, 2 drain electrode, 3 gate insulating film, 4 gate electrode, 5 superconductor, 6 normal conductor, 7 normal conductor, 8 normal conductor, 9 substrate.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 ▲高▼木 一正 東京都国分寺市東恋ケ窪１丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 塚本 晃 東京都国分寺市東恋ケ窪１丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 岡本 政邦 東京都国分寺市東恋ケ窪１丁目280番地 株式会社日立製作所中央研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor ▲ Kazumasa Takagi 1-280, Higashi Koikeku, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Akira Tsukamoto 1-280, Higashi Koikeku, Kokubunji, Tokyo Central Research Laboratory, Hitachi, Ltd. (72) Inventor Masakuni Okamoto 1-280, Higashi Koigokubo, Kokubunji, Tokyo Metropolitan Research Laboratory, Hitachi, Ltd.
Claims (5)
れたソース電極およびドレイン電極と、ソース電極およ
びドレイン電極の間に位置するチャネル層の上部または
下部に、絶縁膜を介して形成されたゲート電極を設ける
ことによって構成される超電導三端子素子において、上
記チャネル層は、超電導層と常電導層を交互に積層した
多層膜で構成されている事を特徴とする。1. A channel layer, a source electrode and a drain electrode formed at both ends of the channel layer, and an upper portion or a lower portion of the channel layer located between the source electrode and the drain electrode with an insulating film interposed therebetween. In the superconducting three-terminal element configured by providing the gate electrode, the channel layer is characterized by being composed of a multilayer film in which superconducting layers and normal conducting layers are alternately laminated.
層中の超電導層として銅を含む酸化物超電導材料を用
い、チャネル層の常伝導体としてＬｎ−Ｂａ−Ｃｕ−Ｏ
またはＹ−Ｂａ−Ｃｕ−Ｏから成り、該ＬｎがＰｒを除
く１種類もしくは複数の希土類元素からなり、Ｙまたは
ＬｎとＢａの組成比が、１．３：３．７から１．５：
１．５の範囲にあり、ＬｎとＢａまたはＹとＢａをあわ
せた組成とＣｕ組成の比が１：１である酸化物材料を用
いたことを特徴とする超電導三端子素子。2. The oxide superconducting material containing copper is used as the superconducting layer in the channel layer according to claim 1, and Ln-Ba-Cu-O is used as the normal conductor of the channel layer.
Alternatively, it is composed of Y—Ba—Cu—O, Ln is composed of one or more rare earth elements other than Pr, and the composition ratio of Y or Ln and Ba is 1.3: 3.7 to 1.5:
A superconducting three-terminal device, characterized in that an oxide material having a ratio of a composition of Cu and a composition of Ln and Ba or a composition of Y and Ba in the range of 1.5 is 1: 1.
層中の超電導層として銅を含む酸化物超電導材料を用
い、チャネル層中の常伝導層が（Ｙ・Ｐｒ）−Ｂａ−Ｃ
ｕ−Ｏから成り、ＹとＰｒの組成比が１：１以下である
ことを特徴とする超電導三端子素子。3. The oxide superconducting material containing copper is used as the superconducting layer in the channel layer according to claim 1, and the normal conducting layer in the channel layer is (Y.Pr) -Ba-C.
A superconducting three-terminal device comprising u-O and having a composition ratio of Y and Pr of 1: 1 or less.
ャネルの両端に超電導体を用いて形成されたソースおよ
びドレイン電極と、ソースおよびドレイン電極の間に位
置する部分のチャネル層の上部または下部に、絶縁膜を
介して形成したゲート電極によって構成される超電導三
端子素子において、チャネル層がキャリヤ密度の異なる
２種類以上の常伝導体から成る多層膜によって構成され
ている事を特徴とする超電導三端子素子。4. A channel layer made of an electrically conductive material, source and drain electrodes formed by using superconductors at both ends of the channel, and an upper part or a lower part of the channel layer located between the source and drain electrodes. In a superconducting three-terminal element composed of a gate electrode formed through an insulating film, the channel layer is composed of a multilayer film composed of two or more kinds of normal conductors having different carrier densities. Three-terminal element.
層がＬｎ−Ｂａ−Ｃｕ−ＯまたはＹ−Ｂａ−Ｃｕ−Ｏか
ら成る第一の酸化物材料と、（Ｙ・Ｐｒ）−Ｂａ−Ｃｕ
−Ｏから成る第二の酸化物材料の積層構造を有し、該Ｌ
ｎはＰｒを除く１種類もしくは複数の希土類元素を表
し、第一の酸化物材料においてＬｎもしくはＹとＢａと
のの組成比が１．３：１．７の範囲にあり、第二の酸化
物材料においてＹとＰｒの組成比が１：１以下であるこ
とを特徴とする超電導三端子素子。5. The first oxide material according to claim 3, wherein the channel layer is made of Ln-Ba-Cu-O or Y-Ba-Cu-O, and (Y.Pr) -Ba-. Cu
-O has a laminated structure of a second oxide material,
n represents one or more rare earth elements other than Pr, and the composition ratio of Ln or Y and Ba in the first oxide material is in the range of 1.3: 1.7, and the second oxide A superconducting three-terminal element, characterized in that the composition ratio of Y and Pr in the material is 1: 1 or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4292441A JPH0831625B2 (en) | 1992-10-30 | 1992-10-30 | Superconducting 3-terminal element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4292441A JPH0831625B2 (en) | 1992-10-30 | 1992-10-30 | Superconducting 3-terminal element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06151988A true JPH06151988A (en) | 1994-05-31 |
| JPH0831625B2 JPH0831625B2 (en) | 1996-03-27 |
Family
ID=17781839
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4292441A Expired - Fee Related JPH0831625B2 (en) | 1992-10-30 | 1992-10-30 | Superconducting 3-terminal element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0831625B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100293400B1 (en) * | 1996-09-03 | 2001-07-12 | 포만 제프리 엘 | HIGH TEMPERATURE SUPERCONDUCTIVITY IN STRAINED Si/SiGe |
| WO2021190939A1 (en) * | 2020-03-26 | 2021-09-30 | International Business Machines Corporation | Operating a superconducting channel by electron injection |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6448477A (en) * | 1987-08-19 | 1989-02-22 | Mitsubishi Electric Corp | Superconductive three-terminal element |
| JPH01102974A (en) * | 1987-10-16 | 1989-04-20 | Hitachi Ltd | Superconducting device |
| JPH01265577A (en) * | 1988-04-15 | 1989-10-23 | Seiko Epson Corp | Josephson field effect transistor |
| JPH06237023A (en) * | 1991-03-22 | 1994-08-23 | Bull Sa | Manufacture of superconductive field-effect transistor and multilayered structure for use therein |
-
1992
- 1992-10-30 JP JP4292441A patent/JPH0831625B2/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6448477A (en) * | 1987-08-19 | 1989-02-22 | Mitsubishi Electric Corp | Superconductive three-terminal element |
| JPH01102974A (en) * | 1987-10-16 | 1989-04-20 | Hitachi Ltd | Superconducting device |
| JPH01265577A (en) * | 1988-04-15 | 1989-10-23 | Seiko Epson Corp | Josephson field effect transistor |
| JPH06237023A (en) * | 1991-03-22 | 1994-08-23 | Bull Sa | Manufacture of superconductive field-effect transistor and multilayered structure for use therein |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100293400B1 (en) * | 1996-09-03 | 2001-07-12 | 포만 제프리 엘 | HIGH TEMPERATURE SUPERCONDUCTIVITY IN STRAINED Si/SiGe |
| WO2021190939A1 (en) * | 2020-03-26 | 2021-09-30 | International Business Machines Corporation | Operating a superconducting channel by electron injection |
| US11165429B2 (en) | 2020-03-26 | 2021-11-02 | International Business Machines Corporation | Operating a superconducting channel by electron injection |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0831625B2 (en) | 1996-03-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0624258B2 (en) | Field effect device with superconducting channel | |
| CA2051048C (en) | Superconducting device having a reduced thickness of oxide superconducting layer and method for manufacturing the same | |
| US5106822A (en) | Transistor with superconducting collector, base, and emitter separated by non-superconducting barrier layers | |
| US5828079A (en) | Field-effect type superconducting device including bi-base oxide compound containing copper | |
| JPH06151988A (en) | Superconducting three-terminal element | |
| US5304817A (en) | Superconductive circuit with film-layered josephson junction and process of fabrication thereof | |
| JP3123164B2 (en) | Superconducting device | |
| JPH06112538A (en) | Superconducting element | |
| US20050092981A1 (en) | Superconducting integrated circuit and methods of forming same | |
| JP2867956B2 (en) | Superconducting transistor | |
| JP2624666B2 (en) | Superconducting element | |
| JP2597745B2 (en) | Superconducting element and fabrication method | |
| EP0565452B1 (en) | Superconducting device having a superconducting channel formed of oxide superconductor material | |
| JP3221037B2 (en) | Current modulator | |
| JP2614939B2 (en) | Superconducting element and fabrication method | |
| JP3076503B2 (en) | Superconducting element and method of manufacturing the same | |
| JP3203799B2 (en) | Superconducting three-terminal element | |
| JPH06204577A (en) | Superconducting device | |
| Sweeny et al. | Materials and fabrication processes for Nb-Si-Nb SNAP devices | |
| JP2701732B2 (en) | Superconducting three-terminal element | |
| Yoshida et al. | Interface-engineered junctions with YbBaCuO as the counter-electrode | |
| JPH0621521A (en) | Current modulating device | |
| JPH0587995B2 (en) | ||
| JPH065935A (en) | Superconductor device | |
| JPH06216419A (en) | Superconducting field-effect transistor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313115 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| LAPS | Cancellation because of no payment of annual fees |