JPH06103701B2 - Semiconductor device mounting body - Google Patents
Semiconductor device mounting bodyInfo
- Publication number
- JPH06103701B2 JPH06103701B2 JP63058753A JP5875388A JPH06103701B2 JP H06103701 B2 JPH06103701 B2 JP H06103701B2 JP 63058753 A JP63058753 A JP 63058753A JP 5875388 A JP5875388 A JP 5875388A JP H06103701 B2 JPH06103701 B2 JP H06103701B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- substrate
- conductive adhesive
- electrode
- terminal electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Wire Bonding (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、半導体装置と基板上の端子電極部との電気的
接続に関するものであり、特に、導電性接着剤を用いた
フェースダウンボンディング法に係る半導体装置に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to electrical connection between a semiconductor device and a terminal electrode portion on a substrate, and particularly to a face-down bonding method using a conductive adhesive. The present invention relates to a semiconductor device.
従来の技術 従来、電子部品の接続端子と基板上の回路パターン端子
との接続には半田付けがよく利用されていたが、近年、
例えばICフラットパッケージ等の小型化と、接続端子の
増加により、接続端子間、いわゆるピッチ間隔が次第に
狭くなり、従来の半田付け技術で対処することが次第に
困難になって来た。2. Description of the Related Art Conventionally, soldering was often used to connect a connection terminal of an electronic component and a circuit pattern terminal on a board.
For example, due to the miniaturization of IC flat packages and the like, and the increase in the number of connection terminals, the so-called pitch interval between the connection terminals is gradually narrowed, and it has become increasingly difficult to cope with this with conventional soldering technology.
そこで、最近では裸の半導体装置を基板上の端子電極部
に直付けして実装面積の効率的使用を図ろうとする方法
が考案されてきた。なかでも、半導体装置を基板上に接
続するに際し、半導体装置を下向きにして、あらかじめ
半導体装置の電極パッド上にCr,CuおよびAuの３層の金
属蒸着膜部を形成し、更にレジストをかけて半田をメッ
キや蒸着によって形成した後、余分なレジストと金属蒸
着膜を除去して形成したバンプ電極を高温に加熱して融
着する方法が、接続後の機械的強度が強く、接続の回数
も１回で済むことなどから有益な方法であるとされてい
る（例えば工業調査会,1980年１月15日発行，日本マイ
クロエレクトロニクス協会編，『IC化実装技術』）。Therefore, recently, a method has been devised in which a bare semiconductor device is directly attached to a terminal electrode portion on a substrate to efficiently use a mounting area. Among them, when connecting the semiconductor device to the substrate, face down the semiconductor device, form a metal vapor deposition film part of three layers of Cr, Cu and Au on the electrode pad of the semiconductor device in advance, and apply a resist. After solder is formed by plating or vapor deposition, the excess resist and metal vapor deposition film are removed and the bump electrode formed is heated to a high temperature and fused. It is said to be a useful method because it only needs to be done once (for example, Industrial Research Institute, published on January 15, 1980, edited by Japan Microelectronics Association, "IC implementation technology").
以下図面を参照しながら、上述した従来の半田バンプに
よる半導体装置の一例について説明する。Hereinafter, an example of a semiconductor device using the above-described conventional solder bump will be described with reference to the drawings.
第３図は従来の半田バンプによる半導体装置の概略説明
図である。第３図において、７は半導体装置であり、８
は半田バンプ電極である。９は端子電極部であり、10は
基板である。FIG. 3 is a schematic explanatory view of a conventional semiconductor device using solder bumps. In FIG. 3, 7 is a semiconductor device, and 8
Is a solder bump electrode. Reference numeral 9 is a terminal electrode portion, and 10 is a substrate.
以上のように構成された半田バンプによる半導体装置に
ついて、以下その概略について説明する。The outline of the semiconductor device using the solder bumps configured as described above will be described below.
まず、半導体装置７のAlからなる電極パッド部にあらか
じめ半田バンプ電極８を形成しておき、この半導体装置
７を下向きにして基板10の端子電極部９に位置合せを行
った後、200〜300℃の高温に加熱して半田バンプ電極８
を溶融し、基板10の端子電極部９に融着させることによ
って第３図に示す半導体装置を得るものである。First, the solder bump electrode 8 is formed in advance on the electrode pad portion made of Al of the semiconductor device 7, the semiconductor device 7 is faced downward, and the terminal electrode portion 9 of the substrate 10 is aligned. Solder bump electrode 8 by heating to a high temperature of ℃
Is melted and fused to the terminal electrode portion 9 of the substrate 10 to obtain the semiconductor device shown in FIG.
発明が解決しようとする課題 しかしながら上記のような半田バンプ電極による半導体
装置においては、 （１）半田を溶融する際に高温に加熱する必要があり、
熱応力の影響を受け易い。However, in the semiconductor device using the solder bump electrodes as described above, (1) it is necessary to heat the solder to a high temperature when melting the solder,
It is easily affected by thermal stress.
（２）半田による接続のために基板側の端子電極部が半
田接続可能なものである必要があり、汎用性に欠ける。(2) The terminal electrode portion on the substrate side needs to be connectable by solder for connection by solder, which lacks versatility.
（３）半田バンプ電極を形成する半田が加熱溶融する際
に流れ、ショートが発生する危険がある。(3) When the solder forming the solder bump electrodes is heated and melted, there is a risk of causing a short circuit.
（４）熱膨張係数の異なるSiと基板とを硬度の高い半田
のみで接続しているため、熱応力に対して脆い。(4) Since Si having a different coefficient of thermal expansion and the substrate are connected only by solder having high hardness, they are brittle against thermal stress.
などといった課題を有していた。Had problems such as.
本発明は上記の課題に鑑みてなされたものであり、その
目的とする所は、半導体装置と実装基板とを信頼性良く
電気的接続を行うことのできる半導体装置を提供するも
のである。The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device capable of reliable electrical connection between a semiconductor device and a mounting substrate.
課題を解決するための手段 本発明は上記の課題を解決するため、半導体装置の基板
上の端子電極部への実装構造において、半導体装置の電
極パッド部上にバンプ電極を備え、前記バンプ電極が可
撓性を有する導電性接着剤を介して基板上の端子電極部
に接続される実装構造を特徴として半導体装置の電気的
な接続を実現しようとするものである。Means for Solving the Problems In order to solve the above problems, the present invention provides a bump electrode on an electrode pad portion of a semiconductor device in a mounting structure for a terminal electrode portion on a substrate of a semiconductor device, wherein the bump electrode is It is intended to realize electrical connection of a semiconductor device, which is characterized by a mounting structure which is connected to a terminal electrode portion on a substrate through a flexible conductive adhesive.
作用 本発明は上記した方法によって、半導体装置の電極パッ
ド部にあらかじめ形成したバップ電極を可撓性を有する
導電性接着剤を介して基板上の端子電極に接続すること
により、応力に対して安定で、信頼性の高い半導体装置
の電気的な接続が実現できる。The present invention is stable against stress by connecting the BAP electrode previously formed on the electrode pad portion of the semiconductor device to the terminal electrode on the substrate through the conductive adhesive having flexibility by the method described above. Thus, highly reliable electrical connection of the semiconductor device can be realized.
実施例 以下、本発明の一実施例の半導体装置について、図面を
参照しながら説明する。Example Hereinafter, a semiconductor device of an example of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例における半導体装置による接
続部拡大図であり、第２図は、本発明の一実施例におけ
る半導体装置の概略説明図である。FIG. 1 is an enlarged view of a connecting portion of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a schematic explanatory view of a semiconductor device according to an embodiment of the present invention.
第１図および第２図において、１は半導体装置であり、
２は電極パッド部である。３はAuからなるバンプ電極で
あり、４はシリコーン系の導電性接着剤である。５は端
子電極部であり、６は基板である。In FIGS. 1 and 2, 1 is a semiconductor device,
2 is an electrode pad part. 3 is a bump electrode made of Au, and 4 is a silicone-based conductive adhesive. Reference numeral 5 is a terminal electrode portion, and 6 is a substrate.
以上のように構成された半導体装置について、以下図面
を用いて説明する。The semiconductor device configured as described above will be described below with reference to the drawings.
まず、半導体装置１の電極パッド部２上にあらかじめバ
ンプ電極３を形成しておき、このバンプ電極３に転写や
印刷によって、可撓性を有する導電性接着剤４を形成す
る。そして、この半導体装置１を下向きにした基板６の
端子電極部５に位置合せを行い、基板６上に半導体装置
１を載置した後、加熱により導電性接着剤４を硬化させ
ることによって、第１図および第２図に示す様に、バン
プ電極３が導電性接着剤４を介して基板６の端子電極５
に電気的接続された実装構造が得られる。First, the bump electrode 3 is previously formed on the electrode pad portion 2 of the semiconductor device 1, and the conductive adhesive 4 having flexibility is formed on the bump electrode 3 by transfer or printing. Then, the semiconductor device 1 is aligned with the terminal electrode portion 5 of the substrate 6 facing downward, the semiconductor device 1 is placed on the substrate 6, and then the conductive adhesive 4 is cured by heating, As shown in FIG. 1 and FIG. 2, the bump electrode 3 is connected to the terminal electrode 5 of the substrate 6 via the conductive adhesive 4.
A mounting structure electrically connected to is obtained.
このとき、導電性接着剤４には可撓性を有するシリコー
ン系を用いているため、半導体素子１を構成するSi基板
と基板６を構成するたとえばアルミナ基板との熱膨張係
数の差からくる熱応力を緩和することができ、接続部の
安定性が向上できる。At this time, since a flexible silicone-based material is used for the conductive adhesive 4, heat generated by the difference in thermal expansion coefficient between the Si substrate forming the semiconductor element 1 and the alumina substrate forming the substrate 6 is used. The stress can be relieved and the stability of the connection can be improved.
また、導電性接着剤４の加熱硬化は、半田バンプによる
接続に比べて低温で行えるため、熱硬化時の熱応力によ
る影響を軽減することができ、極めて安定な接続が得ら
れる。Further, since the heat curing of the conductive adhesive 4 can be performed at a lower temperature than the connection by the solder bump, the influence of the thermal stress at the time of the heat curing can be reduced, and the extremely stable connection can be obtained.
さらに、バンプ電極３と基板６の端子電極部５の電気的
接続は導電性接着剤４による接着によって行うため、基
板６の端子電極部５の材質は配線材料であればいかなる
ものでもよい。Furthermore, since the electrical connection between the bump electrodes 3 and the terminal electrode portions 5 of the substrate 6 is performed by adhesion with the conductive adhesive 4, the material of the terminal electrode portions 5 of the substrate 6 may be any wiring material.
以上のようにして、半導体装置１と基板６を極めて安定
に、かつ、汎用性のある方法での実装構造が可能とな
る。As described above, the semiconductor device 1 and the substrate 6 can be mounted extremely stably and in a versatile manner.
なお、実施例においてバンプ電極３をAuよりなるものと
したが、その材質はAuに限られるものでなく、たとえ
ば、Cuなどの他の金属により形成してもよい。Although the bump electrode 3 is made of Au in the embodiment, the material is not limited to Au and may be made of other metal such as Cu.
また、バンプ電極３の形成は、従来のメッキによる形成
方法によるものに限られたものでなく、いかなる方法に
よる形成を行ったものでもよい。The formation of the bump electrodes 3 is not limited to the conventional plating method, but any method may be used.
さらに、導電性接着剤４の材質は、シリコーン系の導電
性接着剤に限られたものでなく、可撓性を付与したもの
であれば何でもよく、たとえば、エポキシ系，ポリイミ
ド系，アクリル系あるいはフェノール系などの導電性接
着剤を用いることもできる。Further, the material of the conductive adhesive 4 is not limited to the silicone-based conductive adhesive, and may be any material as long as it has flexibility, such as epoxy-based, polyimide-based, acrylic-based or A conductive adhesive such as a phenol-based adhesive can also be used.
また、実施例において導電性接着剤４をバンプ電極３上
に形成するとしたが、導電性接着剤４を基板６上の端子
電極部５側に印刷や転写法などを用いて形成してもよ
い。In addition, although the conductive adhesive 4 is formed on the bump electrodes 3 in the embodiment, the conductive adhesive 4 may be formed on the terminal electrode portion 5 side of the substrate 6 by using a printing method or a transfer method. .
さらに、導電性接着剤４に分散する導電フィラーについ
ては、Ag,Au,Ni,Cなどの粉体を、単体もしくは組み合せ
て用いることができ、その粒径，形は特に限定されるも
のでない。Further, as the conductive filler dispersed in the conductive adhesive 4, powders of Ag, Au, Ni, C and the like can be used alone or in combination, and the particle size and shape are not particularly limited.
発明の効果 以上に説明したように、本発明の半導体装置によれば、
可撓性を有する導電性接着剤によって半導体装置の電極
パッド部上に形成したバンプ電極と基板上の端子電極と
を接着状態で電気的接続を行うことができ、接続時の処
理温度が低く、応力に対して極めて安定で信頼性の高い
電気的接続か実現でき、極めて実用価値が高いものであ
る。Effects of the Invention As described above, according to the semiconductor device of the present invention,
It is possible to electrically connect the bump electrode formed on the electrode pad portion of the semiconductor device and the terminal electrode on the substrate with the conductive adhesive having flexibility in an adhesive state, and the processing temperature at the time of connection is low, It is possible to realize an electrical connection that is extremely stable and highly reliable against stress, and is of extremely high practical value.
第１図は本発明の一実施例における半導体装置による接
続部拡大図、第２図は本発明の一実施例における半導体
装置の概略説明図、第３図は従来の半田バンプによる半
導体装置の概略説明図である。 1,7……半導体装置、２……電極パッド部、３……バン
プ電極、４……導電性接着剤、5,9……端子電極部、6,1
0……基板、８……半田バンプ電極。FIG. 1 is an enlarged view of a connecting portion of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a schematic explanatory view of a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a schematic view of a conventional semiconductor device using solder bumps. FIG. 1,7 ... Semiconductor device, 2 ... Electrode pad, 3 ... Bump electrode, 4 ... Conductive adhesive, 5,9 ... Terminal electrode, 6,1
0: substrate, 8: solder bump electrode.
Claims (3)
た構成であって、前記半導体装置の電極パッド部上にバ
ンプ電極を備え、前記バンプ電極が可撓性を有する導電
性接着剤を介して前記基板上の前記端子電極部に電気的
接続されることを特徴とする半導体装置の実装体。1. A structure in which a semiconductor device is mounted on a terminal electrode portion on a substrate, a bump electrode is provided on an electrode pad portion of the semiconductor device, and the bump electrode comprises a flexible conductive adhesive. A semiconductor device mounting body, which is electrically connected to the terminal electrode portion on the substrate via the semiconductor device mounting body.
る請求項１記載の半導体装置の実装体。2. The semiconductor device package according to claim 1, wherein the bump electrode is made of Au.
系、アクリル系、フェノール系あるいはシリコーン系の
導電性接着剤に可撓性を付与したものからなることを特
徴とする請求項１記載の半導体装置の実装体。3. The conductive adhesive is an epoxy-based, polyimide-based, acrylic-based, phenol-based or silicone-based conductive adhesive to which flexibility is imparted. Semiconductor device mounting body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63058753A JPH06103701B2 (en) | 1988-03-11 | 1988-03-11 | Semiconductor device mounting body |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63058753A JPH06103701B2 (en) | 1988-03-11 | 1988-03-11 | Semiconductor device mounting body |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01232735A JPH01232735A (en) | 1989-09-18 |
| JPH06103701B2 true JPH06103701B2 (en) | 1994-12-14 |
Family
ID=13093299
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63058753A Expired - Lifetime JPH06103701B2 (en) | 1988-03-11 | 1988-03-11 | Semiconductor device mounting body |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06103701B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH085550Y2 (en) * | 1989-10-23 | 1996-02-14 | シャープ株式会社 | Semiconductor device |
| DE69942824D1 (en) | 1998-08-28 | 2010-11-18 | Panasonic Corp | CONDUCTIVE PASTE, THIS USING ELECTRICALLY CONDUCTIVE STRUCTURE, ELECTRICAL COMPONENT, MODULE, PCB, METHOD OF ELECTRIC CONNECTION, METHOD FOR PRODUCING A PCB HE |
| JP2004271312A (en) | 2003-03-07 | 2004-09-30 | Denso Corp | Capacitance-type semiconductor sensor device |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51104261A (en) * | 1975-03-12 | 1976-09-14 | Suwa Seikosha Kk | |
| JPS52113196A (en) * | 1976-03-18 | 1977-09-22 | Seiko Epson Corp | Liquid crystal unit |
| JPS5353261A (en) * | 1976-10-26 | 1978-05-15 | Seiko Epson Corp | Electronic device |
| JPS5577164A (en) * | 1978-12-07 | 1980-06-10 | Nec Corp | Semiconductor device |
| JPS5838769A (en) * | 1981-08-31 | 1983-03-07 | Suriibondo:Kk | Thixotropic ultraviolet-curing adhesive composition |
| JPS58182685A (en) * | 1982-04-20 | 1983-10-25 | セイコーエプソン株式会社 | Vertical energization agent for display panel |
| JPS5964886A (en) * | 1982-10-05 | 1984-04-12 | 松下電器産業株式会社 | Display cell |
| JPS604230A (en) * | 1983-06-21 | 1985-01-10 | Sharp Corp | Bonding method of semiconductor chip |
| JPS60170176A (en) * | 1984-02-10 | 1985-09-03 | ソニ−ケミカル株式会社 | Connecting structure with transparent conductive film |
| JPS60140832A (en) * | 1983-12-28 | 1985-07-25 | Fujitsu Ltd | Semiconductor device |
| JPS6155809A (en) * | 1984-08-27 | 1986-03-20 | 日立化成工業株式会社 | Conductive adhesive film wind |
| US4661192A (en) * | 1985-08-22 | 1987-04-28 | Motorola, Inc. | Low cost integrated circuit bonding process |
| JPS6290938A (en) * | 1985-10-17 | 1987-04-25 | Matsushita Electric Ind Co Ltd | Semiconductor device |
| JPS6297340A (en) * | 1985-10-23 | 1987-05-06 | Matsushita Electric Ind Co Ltd | Electrical connecting method for ic chip |
| JPS6289177U (en) * | 1985-11-22 | 1987-06-08 | ||
| JPS62118265U (en) * | 1986-01-17 | 1987-07-27 | ||
| JPS62210649A (en) * | 1986-03-12 | 1987-09-16 | Toshiba Corp | Semiconductor device and manufacture thereof |
| JPS62244142A (en) * | 1986-04-16 | 1987-10-24 | Matsushita Electric Ind Co Ltd | Electrical connection method for semiconductor element |
-
1988
- 1988-03-11 JP JP63058753A patent/JPH06103701B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01232735A (en) | 1989-09-18 |
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