JPH05855B2 - - Google Patents
Info
- Publication number
- JPH05855B2 JPH05855B2 JP21502088A JP21502088A JPH05855B2 JP H05855 B2 JPH05855 B2 JP H05855B2 JP 21502088 A JP21502088 A JP 21502088A JP 21502088 A JP21502088 A JP 21502088A JP H05855 B2 JPH05855 B2 JP H05855B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- adhesive
- conductor
- board
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 claims description 39
- 239000004020 conductor Substances 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 238000004070 electrodeposition Methods 0.000 claims description 9
- 239000000853 adhesive Substances 0.000 description 23
- 230000001070 adhesive effect Effects 0.000 description 23
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 13
- 229910052802 copper Inorganic materials 0.000 description 10
- 239000010949 copper Substances 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 239000013039 cover film Substances 0.000 description 7
- 210000001787 dendrite Anatomy 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 7
- 239000010931 gold Substances 0.000 description 6
- 239000012943 hotmelt Substances 0.000 description 5
- 238000007747 plating Methods 0.000 description 5
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 239000004831 Hot glue Substances 0.000 description 3
- 238000003848 UV Light-Curing Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 229920006267 polyester film Polymers 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002923 metal particle Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005868 electrolysis reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005242 forging Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000010019 resist printing Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Wire Bonding (AREA)
Description
［産業上の利用分野］
本発明は、ICチツプを回路基板上に実装する
方法に関し、詳しくは接着剤によりICチツプを
回路基板上に接着するとともに、基板回路の導体
上に生成した金属突起物を介して電気的に接続す
ることにより、簡便で安価かつ適用範囲の多様性
に優れた工程を実現したICチツプ実装方法に関
する。
［従来の技術］
ベアICチツプをプリント基板に実装する場合、
チツプの電極部と基板の導体部と間を電気的に接
続することが必要であるが、この方法として、従
来、大別してワイヤボンデイング法と、ワイヤレ
スボンデイング法がある。
ワイヤボンデイング法とは、基板の導体パター
ンとICチツプの電極パツドとをボンデイングワ
イヤにより接続するものである。ICチツプおよ
び基板に対するボンデイングワイヤ両端の接合
は、熱圧着や超音波溶接等により行なわれる。
ワイヤレスボンデイング法とは、ワイヤによら
ず、バンプ等を介してICチツプを基板に直接接
続させるものであり、半田バンプを用いるフリツ
プチツプ方式、Auビームリードを用いるビーム
リード方式、導電ペースト接着方式、導電ゴムコ
ネクタ接続方式、導電ペースト印刷法などが知ら
れている。また、フレキシブルテープにチツプを
実装するTAB（テープ・オートメーテツド・ボン
デイング）方式、特に、ポリイミドフイルムの基
板にAuバンプを介して接続するテープキヤリア
方式、なども注目されてきている。
［発明が解決しようとする課題］
しかしながら、ワイヤボンデイング法はガラ
スやセラミツク等のリジツトな基板に対して有効
ではあるが、フレキシブルプリント配線基板に適
用するのが困難である、各ボンデイングワイヤ
毎に接続するため実装に時間がかかる、熱圧着
に使用するキヤピラリの大きさや作業性の点で導
体線の幅が100μm以上に限定される、ICチツプ
が不良の場合のリペアに困難性を有する、Au
線等のボンデイングワイヤのルーピング（湾曲）
のため全体が厚くなる等の欠点を有する。
また、上記従来のワイヤレスボンデイング法に
おいては、バンプやビームリード等を設ける必
要がありコストが高くつく、リペアも困難であ
りICチツプが不良の場合は基板ごと廃棄するし
かない、ICチツプの電極パツドはチツプの外
周部分にしか設けることができない、TAB方式
の場合はさらに、フイルム状の基板に限定さ
れ、その厚みおよび幅もそれぞれ125〜100μmお
よび35〜70mmに限定される。接合時の加熱温度
も高く、例えば400℃で２〜５秒程度加熱するこ
とを要する。アウタリードを用いる場合は全体
として大きくなつてしまう、などの欠点がある。
本発明の目的は、このような従来技術の欠点に
鑑み、バンプや高熱プロセスを要せず、簡便、安
価かつスピーデイに実装でき、しかも電極パツド
間隔の小さいICチツプにも適用できるICチツプ
の実装方法を提供することにある。
［課題を解決するための手段］
以下、図面を用いて本発明を説明する。
第１図は本発明のICチツプ実装方法を示す説
明図である。同図ａ〜ｃに示すように本発明で
は、回路１が形成された基板２上にICチツプを
実装してその電極パツドを基板２の回路１に接続
するICチツプの実装方法において、回路１を形
成する導体３上の、該電極パツドに対する接続部
分４の表面に、針状または塊状の金属突起物５を
電着により生成し（同図ｂ）、そしてICチツプ６
を基板２に接着材７により接着する（同図ｃ）こ
とにより、第２図に拡大して示すように、金属突
起物５を介して基板２の導体３と該電極パツドと
の導通をとるようにしている。
回路１は、導体３の材料として銅、亜鉛、ニツ
ケル等を用い、これを基板２の片面あるいは両面
に積層し、露光、現像およびエツチングを行なう
ことにより形成することができる。また、銀、銅
等をペースト印刷することによつても形成され
る。
基板２としては、リジツトプリント配線板、フ
レキシブルプリント配線板、あるいは両面スルホ
ール型の基板のいずれをも用いることができる。
金属突起物（ノジユール）５としては、電着に
より導体３上に生成されるデンドライトが好まし
い。デンドライトの材料としては、銅、ニツケ
ル、亜鉛、金、銀等の金属が適している。また、
銅、ニツケル等のデンドライトの上にさらに金め
つき、白金めつき等を例えば0.05μm程度施すこ
とも可能であり、これは、相手側の導体との密着
性を向上させる上からも、また防錆の点でも好ま
しい。
デンドライトの生成は、これに適しためつき溶
中で、導体３を陰極として電着によりこぶ付めつ
きを行なつて形成する。電着方法としては、例え
ば、電解銅粉法という特殊電着条件を用いること
ができ、この場合、硫酸が100g／±10g／、
銅濃度が8g／±1g／のめつき溶を用い、５
〜30A／ｄm2の電流密度で３〜10分電解した後、
さらに１〜5A／ｄm2で１〜10分電解を行なうこ
とにより、粒径1μm±0.1μmの微細銅粒から成り
高さ10μm±3μmの金属突起物５を導体３表面上
に均一に形成することができる。ここで、電流密
度が40A／ｄm2以上になると導体３以外の部分に
も銅が付着しシヨートの原因となるので好ましく
ない。また、電着は接続部分４（図中、円の内側
の導体３部分）にのみ生ずればよく、このため、
例えば、電着処理前に、電着不要部分をレジスト
印刷やカバーフイルムにより被覆することが行な
われる。
ICチツプ６は基板２との接着は例えば、UV硬
化接着剤、アロンアルフア（商品名）等の瞬間接
着剤、またはホツトメルトタイプ（例えば厚さ
15μmのシート状のもの）の接着剤を基板２の接
続部分４を含む部分に塗布あるいは配置し、IC
チツプ６の電極パツドを接続部分４に正しく位置
合せしてから、例えば20〜30Kg／cm2で加圧し、接
着剤を硬化させることにより行なう。UV硬化接
着剤を使用した場合は、例えば、上記加圧下にお
いて、1200mJ／cm2のUV露光を２分間行なつて
硬化させる。アロンアルフア（商品名）を用いた
場合は、加圧のみで足りる。ホツトメルトタイプ
の接着剤の場合は、例えば上記加圧下において
200℃で５秒間加熱する。
［作用］
この構成において、第２図に示すようにICチ
ツプ６の電極パツドは導体３の接続部分４表面に
生成されたデンドライト等の金属突起物５に圧着
されるため、ICチツプ６は金属突起物５を介し
て良好な導通を得て基板２の回路に接続され実装
される。この際、バンプ等の形成、ボンデイング
ワイヤの接続、高熱プロセス等を必要とせず、簡
便な工程により安価かつスピーデイに実装が行な
われる。また、デンドライトは導体３の上部表面
に大きく成長し、側面にはほとんど成長しないよ
うに生成することができ、導体３間あるいはIC
チツプ６の電極パツド間の間隔が100μmピツチ程
度に小さい場合でもシヨートの危険性なく実装さ
れる。さらにICチツプ６の電極パツドがチツプ
の周辺部にある必要はなく、内側にある場合で
も、カバーフイルム等による被覆処理が適宜行な
われ、金属突起物５の形成位置が制御されて、正
しい接続が行なわれる。
なお、上述のような接続方法は、ICチツプと
の接続以外にも、例えば、液晶パネルやセラミツ
ク等のリジツド回路板とフレキシブルプリント配
線板との接続にも利用できる。このような場合、
従来はホツトメルトタイプ等の接着剤中にニツケ
ル粒子やハンダボール等の導電性金属粒子を混入
させた異方性導電フイルムを用いて、180℃程度
に加熱し15Kg／cm2程度に加圧して接着し、双方の
電極部にはさまれた導電性金属粒子により導通を
とる方式を用いていた。しかし、異方性導電膜は
接触抵抗が0.5Ω（0.1×３mm）と高く、かつ経時変
化によりさらに増加する傾向にある。また、フア
インピツチになると電極間の絶縁抵抗も少なくな
り、電極の密度は５本／mm〜６本／mmが実用上の
限界であつた。これに対し、本発明で用いられる
上記接続方法によれば、例えばホツトメルト接着
剤を用いて、銅電極同志を接続（接触部分の径は
0.8mmφ）した場合で0.001Ωと非常に小さく、か
つ電極の密度も10本／mmの高密度接続が可能であ
る。また、隣接電極間の絶縁抵抗も電極間隔が
100μmの場合1010Ω以上であり、長期使用によつ
ても変化せず信頼性が高い。
［実施例］
以下、本発明の実施例を説明する。
実施例 １
第３図ａおよびｂに示すように、25μm厚のポ
リエステルフイルム８に18μm厚の電解銅箔９を
ラミネートしてエツチングによりパターニング
（回路形成）した基板を用い、金属突起物を生成
すべき回路の各接続部分４（0.9×1.0mm）を残し
てポリエステルのカバーフイルム１０（厚さ
25μm）で被覆した後、硫酸濃度100g／、銅濃
度8g／のめつき溶中で電流密度8A／ｄm2で５
分、さらに電流密度4A／ｄm2で５分電着するこ
とにより回路の各接続部分の銅のデンドライトを
成長させ上記カバーフイルム１０の上面より
10μm程度突き出るように突起（ノジユール）５
を形成し、さらにその上に防錆のための金メツキ
を0.05μmの厚さで形成した。
次に、第４図に示すように、UV硬化型接着剤
７を上記接続部分を含む部分に塗布し、チツプサ
イズが4.8×6.0mmであつて、第５図に示すように
パツド部１１がアルミニウム蒸着部１２を１〜
2μm厚のパツシベーシヨン（液状ポリイミド被
覆）１３により絶縁されていない部分（110μm×
110μm）として400μmピツチで形成された、ベア
ICチツプ６を位置合せしてから、10Kg／cm2の加
圧下において、1200mJ／cm2で２分間UV露光す
ることにより、塗布した接着剤７を硬化させてベ
アICチツプ６を実装した。
そして、第４図ａに示す各電極12〜15間の抵抗
を測定した。ただし、ICチツプ自体の各パツド
間の抵抗値は0.3Ωであつた。この結果を、電極
１４および１５間を、電極１５および１６間を
、電極１９および１７間をとして、また、上
記の全手順は２回行ない、No.１、No.２として第１
表に示す。
[Industrial Application Field] The present invention relates to a method for mounting an IC chip on a circuit board, and more specifically, the invention relates to a method for mounting an IC chip on a circuit board using an adhesive, and a method for mounting an IC chip on a circuit board using an adhesive, as well as a method for mounting a metal protrusion on a conductor of a circuit board. This invention relates to an IC chip mounting method that realizes a process that is simple, inexpensive, and has excellent versatility in terms of application by electrically connecting via an IC chip. [Conventional technology] When mounting a bare IC chip on a printed circuit board,
It is necessary to electrically connect the electrode portions of the chip and the conductor portions of the substrate, and conventional methods for this can be roughly divided into wire bonding methods and wireless bonding methods. The wire bonding method is a method of connecting a conductor pattern on a substrate and an electrode pad of an IC chip using a bonding wire. Both ends of the bonding wire are bonded to the IC chip and the substrate by thermocompression bonding, ultrasonic welding, or the like. Wireless bonding is a method in which an IC chip is directly connected to a substrate through bumps, etc., without using wires, and includes the flip-chip method using solder bumps, the beam lead method using Au beam leads, the conductive paste bonding method, and the conductive bonding method. Rubber connector connection methods, conductive paste printing methods, etc. are known. In addition, the TAB (tape automated bonding) method, in which chips are mounted on flexible tape, and in particular, the tape carrier method, in which chips are connected to polyimide film substrates via Au bumps, are attracting attention. [Problems to be Solved by the Invention] However, although the wire bonding method is effective for rigid substrates such as glass and ceramics, it is difficult to apply it to flexible printed wiring boards because it requires connection for each bonding wire. Au
Looping (curving) of bonding wire such as wire
Therefore, it has disadvantages such as the overall thickness. In addition, in the conventional wireless bonding method described above, it is necessary to provide bumps, beam leads, etc., which is expensive, and repair is difficult, and if the IC chip is defective, the entire board must be discarded. can only be provided on the outer periphery of the chip. In the case of the TAB method, the substrate is further limited to a film-like substrate, and its thickness and width are also limited to 125 to 100 μm and 35 to 70 mm, respectively. The heating temperature during bonding is also high, for example, heating at 400° C. for about 2 to 5 seconds is required. When using an outer lead, there is a drawback that the overall size becomes larger. In view of the shortcomings of the prior art, an object of the present invention is to provide an IC chip mounting method that does not require bumps or high-temperature processes, can be mounted simply, inexpensively, and quickly, and can also be applied to IC chips with small electrode pad spacing. The purpose is to provide a method. [Means for Solving the Problems] The present invention will be described below with reference to the drawings. FIG. 1 is an explanatory diagram showing the IC chip mounting method of the present invention. As shown in Figures a to c, in the present invention, the IC chip is mounted on a substrate 2 on which a circuit 1 is formed, and its electrode pads are connected to the circuit 1 on the substrate 2. A needle-like or block-like metal protrusion 5 is formed by electrodeposition on the surface of the connection part 4 to the electrode pad on the conductor 3 forming the electrode pad (FIG. 1b), and then an IC chip 6 is formed.
By bonding the electrode pad to the substrate 2 with an adhesive 7 (FIG. 2c), conduction is established between the conductor 3 of the substrate 2 and the electrode pad through the metal protrusion 5, as shown in an enlarged view in FIG. That's what I do. The circuit 1 can be formed by using copper, zinc, nickel, or the like as the material for the conductor 3, laminating it on one or both sides of the substrate 2, and performing exposure, development, and etching. It can also be formed by paste printing silver, copper, etc. As the substrate 2, any of a rigid printed wiring board, a flexible printed wiring board, or a double-sided through-hole type board can be used. The metal protrusions (nodule) 5 are preferably dendrites produced on the conductor 3 by electrodeposition. Suitable materials for the dendrite include metals such as copper, nickel, zinc, gold, and silver. Also,
It is also possible to further apply gold plating, platinum plating, etc. to a thickness of about 0.05 μm on dendrites such as copper and nickel. It is also preferable in terms of rust. The dendrites are formed by electrodeposition using the conductor 3 as a cathode in a suitable forging melt. As an electrodeposition method, for example, special electrodeposition conditions called electrolytic copper powder method can be used, in which case sulfuric acid is 100g/±10g/,
Using a plating solution with a copper concentration of 8g/±1g/5
After electrolysis for 3-10 minutes at a current density of ~30A/ dm2 ,
By further electrolyzing at 1 to 5 A/ dm2 for 1 to 10 minutes, metal protrusions 5 made of fine copper grains with a grain size of 1 μm±0.1 μm and having a height of 10 μm±3 μm are uniformly formed on the surface of the conductor 3. be able to. Here, if the current density exceeds 40 A/dm 2 , copper will adhere to parts other than the conductor 3 and cause shoots, which is not preferable. In addition, electrodeposition only needs to occur on the connection part 4 (the conductor 3 part inside the circle in the figure), and therefore,
For example, before the electrodeposition process, parts not required for electrodeposition are covered with resist printing or a cover film. The IC chip 6 can be bonded to the substrate 2 using, for example, a UV curing adhesive, an instant adhesive such as Aron Alpha (trade name), or a hot melt type (for example,
Apply or place adhesive (15 μm sheet adhesive) on the part of the board 2 including the connection part 4, and then
This is done by properly aligning the electrode pads of the chip 6 with the connecting portion 4 and applying pressure, for example, 20 to 30 kg/cm 2 to harden the adhesive. When a UV curing adhesive is used, it is cured by, for example, UV exposure of 1200 mJ/cm 2 for 2 minutes under the above-mentioned pressure. When Aron Alpha (trade name) is used, pressurization alone is sufficient. In the case of hot melt type adhesives, for example, under the above pressure,
Heat at 200℃ for 5 seconds. [Function] In this configuration, as shown in FIG. 2, the electrode pads of the IC chip 6 are crimped to the metal protrusions 5 such as dendrites formed on the surface of the connection portion 4 of the conductor 3, so the IC chip 6 is attached to the metal protrusion 5. Good conduction is obtained through the protrusion 5 and the circuit is connected to the circuit on the board 2 and mounted. At this time, there is no need for formation of bumps, etc., connection of bonding wires, high-temperature processes, etc., and the mounting can be carried out quickly and inexpensively through simple steps. In addition, dendrites can grow largely on the upper surface of the conductor 3 and hardly grow on the sides, and can be generated between the conductors 3 or the IC.
Even if the spacing between the electrode pads of the chip 6 is as small as 100 μm, it can be mounted without the risk of shoots. Furthermore, the electrode pads of the IC chip 6 do not need to be located on the periphery of the chip; even if they are located inside, the electrode pads of the IC chip 6 are coated with a cover film, etc., as appropriate, and the formation position of the metal protrusions 5 is controlled to ensure correct connection. It is done. Note that the above-described connection method can be used not only for connection with an IC chip but also for connection between a liquid crystal panel, a rigid circuit board such as a ceramic, and a flexible printed wiring board, for example. In such a case,
Conventionally, an anisotropic conductive film made by mixing conductive metal particles such as nickel particles or solder balls into a hot-melt type adhesive is used, heated to about 180℃ and pressurized to about 15kg/ cm2 . A method was used in which conductive metal particles were glued together and sandwiched between both electrodes to establish continuity. However, the anisotropic conductive film has a high contact resistance of 0.5Ω (0.1×3 mm), and tends to further increase with time. Further, when the pitch becomes fine, the insulation resistance between the electrodes decreases, and the practical limit of the electrode density is 5/mm to 6/mm. On the other hand, according to the above connection method used in the present invention, copper electrodes are connected to each other using, for example, hot melt adhesive (the diameter of the contact portion is
0.8mmφ), it is extremely small at 0.001Ω, and high-density connections with an electrode density of 10 electrodes/mm are possible. In addition, the insulation resistance between adjacent electrodes also varies depending on the electrode spacing.
In the case of 100 μm, it is 10 10 Ω or more, and does not change even after long-term use and is highly reliable. [Examples] Examples of the present invention will be described below. Example 1 As shown in FIGS. 3a and 3b, metal protrusions were generated using a substrate in which an 18 μm thick electrolytic copper foil 9 was laminated onto a 25 μm thick polyester film 8 and patterned (circuit formation) by etching. A polyester cover film 10 (thickness
25 μm), then plated with a current density of 8 A/dm 2 in a plating solution with a sulfuric acid concentration of 100 g/m and a copper concentration of 8 g/m2.
By electrodepositing for 5 minutes at a current density of 4 A/dm 2 , copper dendrites at each connection part of the circuit are grown from the upper surface of the cover film 10.
Protrusion (nodule) 5 to protrude about 10μm
was formed, and gold plating was further formed to a thickness of 0.05 μm for rust prevention. Next, as shown in FIG. 4, UV curable adhesive 7 is applied to the area including the connection part, and the chip size is 4.8 x 6.0 mm, and the pad part 11 is made of aluminum as shown in FIG. The vapor deposition part 12 is 1~
The part not insulated by the 2 μm thick passivation (liquid polyimide coating) 13 (110 μm x
110μm) and 400μm pitch, bare
After the IC chip 6 was aligned, the applied adhesive 7 was cured by UV exposure at 1200 mJ/cm 2 for 2 minutes under a pressure of 10 Kg/cm 2 and the bare IC chip 6 was mounted. Then, the resistance between each electrode 12 to 15 shown in FIG. 4a was measured. However, the resistance value between each pad of the IC chip itself was 0.3Ω. This result was calculated between electrodes 14 and 15, between electrodes 15 and 16, and between electrodes 19 and 17.The above procedure was performed twice, and the first
Shown in the table.
【表】
実施例 ２
接着剤として瞬間接着剤を用い、加圧のみを加
えて硬化した以外は実施例１と同じ方法でベア
ICチツプの実装を２回行なつた。この結果を実
施例１と同様にして第１表に示す。
実施例 ３
接着剤としてホツトメルト型接着剤を用い、10
Kg／cm2の加圧下において、180℃で10秒間加熱し
た以外は実施例１と同じ方法でベアICチツプの
実装を３回行なつた。この結果を実施例１と同様
にして第１表に示す。
実施例 ４
ポリエステルフイルム８およびポリエステルの
カバーフイルム１０の代わりにポリイミドフイル
ムおよびポリイミドのカバーフイルムを用い、か
つ接着剤としてホツトメルトタイプのもの
（15μm厚のシート状）を用いて10Kg／cm2の加圧下
において、180°で10秒間加熱し硬化した以外は実
施例１と同様にしてベアICチツプの実装を行な
つた。
次に、実施例１と同様の各電極間（端子間）の
接触抵抗を、ここでは−65℃での30分間の冷却お
よび125℃での30分間の加熱を１サイクルとして
この冷熱サイクルを10サイクル、20サイクルおよ
び30サイクルを行なつた場合の変化として測定し
た。その結果を第２表に示す。[Table] Example 2 A bare adhesive was used in the same manner as in Example 1, except that instant adhesive was used as the adhesive and it was cured by applying only pressure.
I mounted the IC chip twice. The results are shown in Table 1 in the same manner as in Example 1. Example 3 Using hot melt adhesive as adhesive, 10
A bare IC chip was mounted three times in the same manner as in Example 1, except that it was heated at 180° C. for 10 seconds under a pressure of Kg/cm 2 . The results are shown in Table 1 in the same manner as in Example 1. Example 4 A polyimide film and a polyimide cover film were used in place of the polyester film 8 and the polyester cover film 10, and a hot melt type adhesive (15 μm thick sheet) was used, and a stress of 10 Kg/cm 2 was applied. A bare IC chip was mounted in the same manner as in Example 1, except that it was cured by heating at 180° for 10 seconds under pressure. Next, the contact resistance between each electrode (between terminals) as in Example 1 was determined by 10 cycles of this cooling/heating cycle, where one cycle was cooling at -65°C for 30 minutes and heating at 125°C for 30 minutes. The change was measured after 20 cycles, 20 cycles, and 30 cycles. The results are shown in Table 2.
【表】
第１表および第２表からわかるように、本実装
方法によれば、実用上十分な接触抵抗値（導通）
が得られ、また、冷却および加熱に対する耐久性
も、少なくともホツトメルトタイプ接着剤を使用
した場合においては十分であることがわかる。
［発明の効果］
以上説明したように本発明によれば、以下のよ
うな効果を奏する。
(1) 接続のためのバンプ等を設ける必要がないの
で、実装されるICチツプに制約がなく、実装
費用も安価である。
(2) あらゆる基板に適用でき、耐熱性の低いフイ
ルムにも使用できて、費用も安価である。
(3) ICチツプが不良であつても、接着剤を溶剤
で溶かす等により、リベアが容易に行なえる。
(4) UV硬化接着剤、瞬間接着剤等により、高熱
を付与する必要なく実装が行なえる。ホツトメ
ルトタイプの接着剤によつても、180℃で10秒
程度の加熱でよい。
(5) 電極間隔が100μmピツチ程度の高密度な場合
でも実装可能である。
(6) ICチツプの全電極パツドを一度に接続する
ため短時間で実装できる。
(7) ICチツプの内側に電極パツドがある場合で
も接続し実装することができる。[Table] As can be seen from Tables 1 and 2, this mounting method provides a practically sufficient contact resistance value (continuity).
It can be seen that the durability against cooling and heating is also sufficient, at least when a hot melt type adhesive is used. [Effects of the Invention] As explained above, according to the present invention, the following effects are achieved. (1) Since there is no need to provide bumps or the like for connection, there are no restrictions on the IC chips that can be mounted, and the mounting cost is low. (2) It can be applied to any substrate, can be used even with films with low heat resistance, and is inexpensive. (3) Even if the IC chip is defective, it can be easily removed by dissolving the adhesive with a solvent. (4) Mounting can be carried out using UV curing adhesives, instant adhesives, etc. without the need to apply high heat. Even with hot-melt adhesives, heating at 180°C for about 10 seconds is sufficient. (5) It can be mounted even in high-density cases where the electrode spacing is approximately 100 μm. (6) Since all electrode pads of the IC chip are connected at once, it can be mounted in a short time. (7) Even if there are electrode pads inside the IC chip, it can be connected and mounted.
第１図ａ〜ｃは、本発明のICチツプ実装方法
を説明するための説明図、第２図は、ICチツプ
を本発明の方法により基板に実装したときの様子
を示す拡大した断面図、第３図ａおよびｂは、本
発明の一実施例で用いる基板の一部を示す平面図
および側面図、第４図ａおよびｂは、本発明の一
実施例により実装されたICチツプの様子を示す
側面図および平面図、そして、第５図は、本発明
の一実施例で用いられるICチツプのパツド部を
示す拡大された断面図である。
１……回路（パターン）、２……基板、３……
導体、４……接続部分、５……金属突起物（ノジ
ユール）、６……ベアICチツプ、７……接着剤、
８……ポリエステルフイルム、９……電解銅箔、
１０……カバーフイルム、１１……パツド部、１
２……アルミニウム蒸着部、１３……パツシベー
シヨン、１４〜１７……電極（端子）。
1a to 1c are explanatory diagrams for explaining the IC chip mounting method of the present invention, and FIG. 2 is an enlarged cross-sectional view showing the state when an IC chip is mounted on a board by the method of the present invention. FIGS. 3a and 3b are a plan view and a side view of a part of a board used in an embodiment of the present invention, and FIGS. 4a and 4b are views of an IC chip mounted in accordance with an embodiment of the present invention. FIG. 5 is an enlarged cross-sectional view showing a pad portion of an IC chip used in one embodiment of the present invention. 1... Circuit (pattern), 2... Board, 3...
Conductor, 4... Connection part, 5... Metal protrusion (nodule), 6... Bare IC chip, 7... Adhesive,
8... Polyester film, 9... Electrolytic copper foil,
10...Cover film, 11...Pad part, 1
2... Aluminum vapor deposition part, 13... Passivation, 14-17... Electrode (terminal).
Claims (1)
してその電極パツドを該基板の回路を形成する導
体上の接続部に接続するICチツプの実装方法に
おいて、該導体上の接続部を除く所定部分を被覆
し、該導体上の接続部表面に針状または塊状の金
属突起物を電着により生成し、該金属突起物が生
成された接続部を含む基板上にICチツプを接着
し、該金属突起物を介して該基板の回路と該電極
パツドとの導通をとることを特徴とするICチツ
プ実装方法。1. In an IC chip mounting method in which an IC chip is mounted on a board on which a circuit is formed and its electrode pads are connected to a connection part on a conductor forming the circuit on the board, a specified part other than the connection part on the conductor is A needle-shaped or block-shaped metal protrusion is generated on the surface of the connection part on the conductor by electrodeposition, an IC chip is adhered to the substrate including the connection part on which the metal protrusion is formed, and An IC chip mounting method characterized by establishing electrical continuity between a circuit on the board and the electrode pad through a metal protrusion.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21502088A JPH0265147A (en) | 1988-08-31 | 1988-08-31 | Ic chip mounting method |
| EP19890108827 EP0360971A3 (en) | 1988-08-31 | 1989-05-17 | Mounting substrate and its production method, and printed wiring board having connector function and its connection method |
| US07/357,030 US5019944A (en) | 1988-08-31 | 1989-05-25 | Mounting substrate and its production method, and printed wiring board having connector function and its connection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21502088A JPH0265147A (en) | 1988-08-31 | 1988-08-31 | Ic chip mounting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0265147A JPH0265147A (en) | 1990-03-05 |
| JPH05855B2 true JPH05855B2 (en) | 1993-01-06 |
Family
ID=16665404
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21502088A Granted JPH0265147A (en) | 1988-08-31 | 1988-08-31 | Ic chip mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0265147A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007103440A (en) * | 2005-09-30 | 2007-04-19 | Mitsui Mining & Smelting Co Ltd | Wiring board and method of manufacturing the same |
| JP2007165816A (en) * | 2005-11-15 | 2007-06-28 | Mitsui Mining & Smelting Co Ltd | Printed wiring board, its manufacturing method, and its using method |
-
1988
- 1988-08-31 JP JP21502088A patent/JPH0265147A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0265147A (en) | 1990-03-05 |
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