JPH056893A - Capillary, manufacture of bump thereby and semiconductor device thereby - Google Patents

Capillary, manufacture of bump thereby and semiconductor device thereby

Info

Publication number
JPH056893A
JPH056893A JP3028511A JP2851191A JPH056893A JP H056893 A JPH056893 A JP H056893A JP 3028511 A JP3028511 A JP 3028511A JP 2851191 A JP2851191 A JP 2851191A JP H056893 A JPH056893 A JP H056893A
Authority
JP
Japan
Prior art keywords
bonding
bump
capillary
wire
ball
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP3028511A
Other languages
Japanese (ja)
Inventor
Shunichi Kuramoto
俊一 藏本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyushu Fujitsu Electronics Ltd
Fujitsu Ltd
Original Assignee
Kyushu Fujitsu Electronics Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyushu Fujitsu Electronics Ltd, Fujitsu Ltd filed Critical Kyushu Fujitsu Electronics Ltd
Priority to JP3028511A priority Critical patent/JPH056893A/en
Publication of JPH056893A publication Critical patent/JPH056893A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4845—Details of ball bonds
    • H01L2224/48451—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H01L2224/78302—Shape
    • H01L2224/78305—Shape of other portions
    • H01L2224/78307—Shape of other portions outside the capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To form a bonding surface of a bump electrode as flat as possible and to reduce an irregularity in a height of a bump in a capillary of a bump manufacturing apparatus, a method for manufacturing the bump thereby and a semiconductor device thereby. CONSTITUTION:A first bonding for pressing a ball 4a of an end of a bonding wire 4 to a pad 2a of a semiconductor chip 2 is conducted by using a capillary 1 having a circular hole 1a in which the wire is inserted in an axial center in such a manner that the shape of its end face is an elliptical shape having a long axis X and a short axis Y. Further, the semiconductor chip having a bump electrode which has a flat bonding surface, is manufactured by a method for manufacturing a bump, comprising a second bonding to be conducted at a position deviated in a long axial direction while applying a vibration from the position of the first bonding, and cutting it from the wire 4.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、バンプ製造装置のキャ
ピラリとそれによるバンプ製造方法及びそれによる半導
体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capillary of a bump manufacturing apparatus, a bump manufacturing method using the same, and a semiconductor device using the same.

【０００２】近年、半導体装置の高集積化、高密度実装
化に伴い、バンブ電極搭載の半導体装置の需要がますま
す増えている。そのため、ウェーハプロセスにおいて製
造されるバンプ電極に対し、バンプ高さのバラツキを少
なくし接合の信頼性を高めることが要望されている。In recent years, with the high integration and high density mounting of semiconductor devices, the demand for semiconductor devices equipped with bump electrodes is ever increasing. Therefore, it is required to reduce the variation in bump height and improve the reliability of bonding with respect to the bump electrode manufactured in the wafer process.

【０００３】[0003]

【従来の技術】図５の要部側断面図及びそのＢ−Ｂ矢視
図に示すように、バンプ製造装置の従来のキャピラリ11
は、軸心にボンディングワイヤを挿通する円形孔11a を
備え、先端面の形状が円形となっている。2. Description of the Related Art As shown in a side sectional view of a main portion of FIG. 5 and a BB arrow view thereof, a conventional capillary 11 of a bump manufacturing apparatus is shown.
Has a circular hole 11a through which the bonding wire is inserted, and the shape of the tip surface is circular.

【０００４】半導体チップのパッドにボールを圧着して
バンプ電極を形成するには、図６の要部平面図に示すよ
うに、半導体チップ12の四辺縁端に配設されているパッ
ド12a の列方向を、バンプ製造装置（図示略）のホーン
13に取り付けてあるキャピラリ11の振動方向Ｘに平行
か、または直交する位置関係にしてステージ（図示略）
に固定し、ステージ（半導体チップ）を回転させずに、
キャピラリ11をパッド12a の中心に順次に移動してボー
ル（真球）14a を圧着する。即ち、図７のボンディング
工程順を示す要部側断面図に示すように、図７の(a) 図
において先ず、トーチ電極15のマイクロアーク放電によ
りボンディングワイヤ14の先端にボール14a を形成し、
図７の(b) 図において第１ボンディングとして目標パッ
ド12a の中心にボール14a を圧着する。つぎに、第２ボ
ンディングを行うがこの第２ボンディングは、図７の
(c) 図に示すようにキャピラリ11を第１ボンディング位
置より振動方向に少しずらした位置で、キャピラリ11に
振動を加えながらボール14aをボンディングワイヤ14か
ら切断し、図７の(d) 図に示すバンプ電極16を形成して
いた。To form a bump electrode by pressure bonding a ball to a pad of a semiconductor chip, as shown in the plan view of the essential part of FIG. Direction of the horn of a bump manufacturing device (not shown)
A stage (not shown) in a positional relationship parallel to or orthogonal to the vibration direction X of the capillary 11 attached to 13
Fixed to, without rotating the stage (semiconductor chip),
The capillaries 11 are sequentially moved to the centers of the pads 12a and the balls (true spheres) 14a are crimped. That is, as shown in the sectional side view of the main part showing the order of the bonding step in FIG. 7, first, in FIG. 7 (a), a ball 14a is formed at the tip of the bonding wire 14 by micro arc discharge of the torch electrode 15,
In FIG. 7B, the ball 14a is pressure-bonded to the center of the target pad 12a as the first bonding. Next, the second bonding is performed. This second bonding is as shown in FIG.
As shown in FIG. 7 (c), at a position where the capillary 11 is slightly displaced in the vibration direction from the first bonding position, the ball 14a is cut from the bonding wire 14 while applying vibration to the capillary 11, and as shown in FIG. The bump electrode 16 shown was formed.

【０００５】[0005]

【発明が解決しようとする課題】しかしながら、このよ
うな上記キャピラリとそれを用いたバンプ電極の製造方
法によれば、ボンディングワイヤを切断する際に図７の
(d) 図に示すようなバンプ電極16にテール部分16a が残
ってしまうことが多く、それがバンプ高さのバラツキと
なっていた。そのため、ＴＡＢのインナーリード等との
接合に際し、接合強度や接合抵抗のバラツキ、テール倒
れによる隣接電極との接触短絡などが生じ、安定した接
合ができないといった問題があった。However, according to the above-described capillary and the method of manufacturing a bump electrode using the same, the bonding wire shown in FIG.
In many cases, the tail portion 16a remains on the bump electrode 16 as shown in (d), which causes variations in bump height. Therefore, when joining the TAB to the inner lead or the like, there are problems that variations in the joining strength and the joining resistance, a contact short circuit with an adjacent electrode due to a tilt of the tail, and the like cannot be performed stably.

【０００６】上記問題点に鑑み、本発明はバンプ電極の
接合面をできるだけ平坦にし、バンプ高さのバラツキを
少なくすることのできるキャピラリ、それによるバンプ
製造方法及びそれによる半導体装置を提供することを目
的とする。In view of the above problems, the present invention provides a capillary capable of making the bonding surface of the bump electrode as flat as possible and reducing variations in bump height, a bump manufacturing method using the same, and a semiconductor device using the same. To aim.

【０００７】[0007]

【課題を解決するための手段】上記目的を達成するため
に、本発明のキャピラリ、それによるバンプ製造方法及
びそれによる半導体装置においては、図１の要部側断面
図及びそのＡ−Ａ矢視図に示すように軸心にボンディン
グワイヤを挿通する円形孔1aを備え、その先端面の形状
が長軸Ｘ、短軸Ｙをもつ楕円形のキャピラリ１を用い、
ボンディングワイヤ先端のボールを半導体チップのパッ
ドに圧着する第１ボンディングを行った後、さらに第２
ボンディングを第１ボンディングの位置から振動を加え
ながら長軸方向にずらした位置で行いボンディングワイ
ヤから切断するバンプ製造方法により、平坦な接合面を
有するバンプ電極を備える半導体装置を製造するように
構成する。In order to achieve the above object, in a capillary of the present invention, a bump manufacturing method using the same, and a semiconductor device using the same, a side sectional view of a main part of FIG. As shown in the figure, an elliptical capillary 1 having a circular hole 1a through which a bonding wire is inserted and having a distal end surface having a major axis X and a minor axis Y is used.
After performing the first bonding in which the ball at the tip of the bonding wire is pressure-bonded to the pad of the semiconductor chip, the second bonding is further performed.
A semiconductor device having a bump electrode having a flat bonding surface is manufactured by a bump manufacturing method in which bonding is performed at a position displaced in the long axis direction while applying vibration from the position of the first bonding and cutting is performed from a bonding wire. .

【０００８】[0008]

【作用】キャピラリの先端面形状を長軸、短軸をもつ楕
円形状にすることにより、キャピラリ先端面の長軸方向
の幅が増えその分だけボールを潰す面積が増えるため、
第１ボンディングを行った後、第２ボンディングを第１
ボンディングの位置から振動を加えながら長軸方向にず
らした位置で行うことでテール部分を潰すことができ、
テール残りの殆どない平坦な接合面を形成し、バンプ高
さのバラツキを少なくすることができる。[Function] By making the shape of the end surface of the capillary an elliptical shape having a long axis and a short axis, the width of the end surface of the capillary in the long axis direction increases and the area for crushing the ball increases accordingly.
After performing the first bonding, the second bonding is performed first.
The tail part can be crushed by performing it at a position shifted in the long axis direction while applying vibration from the bonding position,
By forming a flat joint surface with almost no tail residue, it is possible to reduce variations in bump height.

【０００９】[0009]

【実施例】以下、図面に示した実施例に基づいて本発明
の要旨を詳細に説明する。バンプ電極の形成に用いるキ
ャピラリ１は、図１に示したように軸心にボンディング
ワイヤを挿通する円形孔1aを備え、その先端面の形状を
長軸Ｘ、短軸Ｙをもつ楕円形（あるいは小判形でもよ
い）にする。DESCRIPTION OF THE PREFERRED EMBODIMENTS The gist of the present invention will be described in detail below with reference to the embodiments shown in the drawings. As shown in FIG. 1, the capillary 1 used for forming the bump electrode has a circular hole 1a through which the bonding wire is inserted, and the tip surface of the capillary 1 has an elliptical shape with a major axis X and a minor axis Y (or It may be oval).

【００１０】バンプ電極を製造するには、図２の要部平
面図に示すように、半導体チップ２をステージ（図示
略）に固定し、ホーン３に取り付けてあるキャピラリ１
はその長軸Ｘ方向を振動方向に一致させ、長軸Ｘ方向
（振動方向）と半導体チップ２の四辺縁端に配設されて
いるパッド2aの列方向とを直交させ、キャピラリ１をパ
ッド2aの列方向に順次、平行移動しボンディングワイヤ
（金線）先端のボール4aをパッド2aの中心に圧着する。In order to manufacture the bump electrode, as shown in the plan view of the main part of FIG. 2, the semiconductor chip 2 is fixed to a stage (not shown), and the capillary 1 is attached to the horn 3.
Makes the major axis X direction coincide with the vibration direction, and makes the major axis X direction (vibration direction) orthogonal to the row direction of the pads 2a arranged at the four edge edges of the semiconductor chip 2 to connect the capillaries 1 to the pads 2a. The ball 4a at the tip of the bonding wire (gold wire) is pressed parallel to the center of the pad 2a by moving in parallel in the column direction.

【００１１】いま、さらに詳しく図３のボンディング工
程順を示す要部側断面図を用いて説明する。図３の(a)
図に示すように、先ず、バンプ製造装置のトーチ電極５
とボンディングワイヤ４先端とのマイクロアーク放電に
よりボンディングワイヤ４の先端にボール（真球）4aを
形成し、図３の(b) 図に示すように、第１ボンディング
として目標パッド2aの中心にボール4aを圧着する。Now, the process will be described in more detail with reference to FIG. Figure 3 (a)
As shown in the figure, first, the torch electrode 5 of the bump manufacturing apparatus.
A ball (a true sphere) 4a is formed at the tip of the bonding wire 4 by micro arc discharge between the tip of the bonding wire 4 and the tip of the bonding wire 4, and as shown in FIG. Crimp 4a.

【００１２】つぎに第２ボンディングを行うが、この第
２ボンディングは図３の(c) 図に示すように、第１ボン
ディング位置より長軸Ｘ方向に少しずらした位置で、キ
ャピラリ１に超音波振動を加えながらボール4aをボンデ
ィングワイヤ４から切断し、図３の(d) 図に示すバンプ
電極６を形成する。さらに、他の辺のパッド2aも半導体
チップ２を順次、９０度回転して同様の工程でボールを
圧着しバンプ電極を形成する。Next, the second bonding is carried out. As shown in FIG. 3 (c), this second bonding is performed by ultrasonic waves on the capillary 1 at a position slightly displaced from the first bonding position in the major axis X direction. The ball 4a is cut from the bonding wire 4 while applying vibration to form the bump electrode 6 shown in FIG. 3 (d). Further, the pads 2a on the other sides are also sequentially rotated by 90 degrees and the balls are pressure-bonded in the same process to form bump electrodes.

【００１３】上記説明の方法は、とくにパッドの間隔が
小さい場合に有効であるが、パッドの間隔が比較的大き
い場合は、図４の要部平面図に示すように半導体チップ
２をキャピラリ１の長軸Ｘ方向（振動方向）とパッド2a
の列方向とを４５度に固定し、半導体チップ２を回転さ
せずにキャピラリ１の移動だけでバンプ電極６を形成す
る。The method described above is particularly effective when the pad interval is small, but when the pad interval is relatively large, the semiconductor chip 2 is inserted into the capillary 1 as shown in the plan view of the essential part of FIG. Long axis X direction (vibration direction) and pad 2a
The column direction is fixed at 45 degrees, and the bump electrode 6 is formed only by moving the capillary 1 without rotating the semiconductor chip 2.

【００１４】このように、楕円形状（小判形状）のキャ
ピラリを用いることにより、キャピラリの先端面は長軸
方向の幅（面積）が広くなるため、第１ボンディングの
後、キャピラリを第１ボンディングの位置から長軸方向
に第２ボンディングの位置に移動しその間の振動により
テール部分を潰し、ボールにテール残りの殆どない平坦
な接合面を形成することができ、したがってバンプ高さ
のバラツキを少なくすることができる。As described above, by using the elliptical (oval-shaped) capillary, the width (area) in the major axis direction of the tip end surface of the capillary is widened, so that after the first bonding, the capillary is bonded to the first bonding. From the position to the position of the second bonding in the long axis direction, the tail portion is crushed by the vibration therebetween, and a flat joint surface with almost no tail remaining on the ball can be formed, thus reducing variations in bump height. be able to.

【００１５】[0015]

【発明の効果】以上、詳述したように本発明によれば、
ボールに平坦な接合面を形成し且つバンプ高さのバラツ
キを少なくすることができるため、ＴＡＢのインナーリ
ード等との接合に際し、接合強度や接合抵抗のバラツ
キ、テール倒れによる隣接パッドとの接触短絡などが少
なくなって安定したバンプ接合ができ、信頼度の高いバ
ンプ電極を備える半導体装置を提供することができると
いった産業上極めて有用な効果を発揮する。As described above in detail, according to the present invention,
Since a flat joint surface can be formed on the ball and variations in bump height can be reduced, variations in joint strength and joint resistance during contact with the TAB inner leads, etc., and contact short-circuits with adjacent pads due to tail collapse And so on, stable bump bonding can be performed, and a semiconductor device having a highly reliable bump electrode can be provided, which is extremely useful in the industry.

【図面の簡単な説明】[Brief description of drawings]

【図１】 本発明によるキャピラリの一実施例の要部側
断面図及びそのＡ−Ａ矢視図FIG. 1 is a side sectional view of a main part of an embodiment of a capillary according to the present invention and a view taken along the line AA of FIG.

【図２】 図１によるバンプ電極の製造を示す要部平面
図FIG. 2 is a plan view of a main part showing the manufacture of the bump electrode according to FIG.

【図３】 図２によるボンディング工程順を示す要部側
断面図FIG. 3 is a side sectional view of an essential part showing the sequence of bonding steps according to FIG.

【図４】 図２の他のバンプ電極の製造を示す要部平面
図FIG. 4 is a plan view of a principal part showing the manufacture of another bump electrode of FIG.

【図５】 従来技術によるキャピラリの一実施例の要部
側断面図及びそのＢ−Ｂ矢視図FIG. 5 is a side sectional view of a main part of an embodiment of a capillary according to the prior art and its BB arrow view.

【図６】 図５によるバンプ電極の製造を示す要部平面
図FIG. 6 is a plan view of a principal part showing the manufacture of the bump electrode according to FIG.

【図７】 図６によるボンディング工程順を示す要部側
断面図FIG. 7 is a side sectional view of an essential part showing the sequence of bonding steps according to FIG.

【符号の説明】[Explanation of symbols]

１はキャピラリ 1aは円形孔 ２は半導体チップ 2aはパッド ４はボンディングワイヤ 4aはボール ６はバンプ電極 1 is a capillary 1a is a circular hole 2 is a semiconductor chip 2a is a pad 4 is a bonding wire 4a is a ball 6 is a bump electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項１】 軸心にボンディングワイヤ(4) を挿通す
る円形孔(1a)を備え、先端面の形状が長軸、短軸をもつ
楕円形であることを特徴とするキャピラリ。1. A capillary having a circular hole (1a) through which a bonding wire (4) is inserted, and a distal end surface having an elliptical shape having a major axis and a minor axis. 【請求項２】 請求項１記載のキャピラリ(1) を用いて
ボンディングワイヤ(4) 先端のボール(4a)を半導体チッ
プ(2) のパッド(2a)に圧着する第１ボンディングを行っ
た後、さらに第２ボンディングを第１ボンディングの位
置から振動を加えながら長軸方向にずらした位置で行い
ボンディングワイヤ(4) から切断することを特徴とする
バンプ製造方法。2. The first bonding for crimping the ball (4a) at the tip of the bonding wire (4) to the pad (2a) of the semiconductor chip (2) using the capillary (1) according to claim 1, Furthermore, the bump manufacturing method is characterized in that the second bonding is performed at a position shifted in the major axis direction while applying vibration from the position of the first bonding, and the bonding wire (4) is cut. 【請求項３】 請求項２記載のバンプ製造方法により製
造された平坦な接合面を有するバンプ電極(6) を備える
ことを特徴とする半導体装置。3. A semiconductor device comprising a bump electrode (6) having a flat bonding surface manufactured by the bump manufacturing method according to claim 2.
JP3028511A 1991-02-22 1991-02-22 Capillary, manufacture of bump thereby and semiconductor device thereby Withdrawn JPH056893A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3028511A JPH056893A (en) 1991-02-22 1991-02-22 Capillary, manufacture of bump thereby and semiconductor device thereby

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3028511A JPH056893A (en) 1991-02-22 1991-02-22 Capillary, manufacture of bump thereby and semiconductor device thereby

Publications (1)

Publication Number Publication Date
JPH056893A true JPH056893A (en) 1993-01-14

Family

ID=12250705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3028511A Withdrawn JPH056893A (en) 1991-02-22 1991-02-22 Capillary, manufacture of bump thereby and semiconductor device thereby

Country Status (1)

Country Link
JP (1) JPH056893A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6495773B1 (en) 1995-04-10 2002-12-17 Fujitsu Limited Wire bonded device with ball-shaped bonds
JP2005123268A (en) * 2003-10-14 2005-05-12 Seiko Epson Corp Optical element and its manufacturing method, packaging structure and packaging method of optical element and packaging substrate, optical module, and optical transmission device
US7153764B2 (en) 2003-10-03 2006-12-26 Renesas Technology Corp. Method of manufacturing a semiconductor device including a bump forming process
US7402508B2 (en) 2003-06-13 2008-07-22 Seiko Epson Corporation Bump structure and method of manufacturing the same, and mounting structure for IC chip and circuit board
JP2011253875A (en) * 2010-06-01 2011-12-15 Denso Corp Wire bonding method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6495773B1 (en) 1995-04-10 2002-12-17 Fujitsu Limited Wire bonded device with ball-shaped bonds
US7402508B2 (en) 2003-06-13 2008-07-22 Seiko Epson Corporation Bump structure and method of manufacturing the same, and mounting structure for IC chip and circuit board
US7153764B2 (en) 2003-10-03 2006-12-26 Renesas Technology Corp. Method of manufacturing a semiconductor device including a bump forming process
US7510958B2 (en) 2003-10-03 2009-03-31 Renesas Technology Corp. Method of manufacturing a semiconductor device including a bump forming process
JP2005123268A (en) * 2003-10-14 2005-05-12 Seiko Epson Corp Optical element and its manufacturing method, packaging structure and packaging method of optical element and packaging substrate, optical module, and optical transmission device
JP4686967B2 (en) * 2003-10-14 2011-05-25 セイコーエプソン株式会社 Manufacturing method of optical element
JP2011253875A (en) * 2010-06-01 2011-12-15 Denso Corp Wire bonding method

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Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19980514