JPH0560257B2 - - Google Patents
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- Publication number
- JPH0560257B2 JPH0560257B2 JP18673284A JP18673284A JPH0560257B2 JP H0560257 B2 JPH0560257 B2 JP H0560257B2 JP 18673284 A JP18673284 A JP 18673284A JP 18673284 A JP18673284 A JP 18673284A JP H0560257 B2 JPH0560257 B2 JP H0560257B2
- Authority
- JP
- Japan
- Prior art keywords
- copper
- photoresist
- thin film
- inductor
- electrolytic plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 34
- 229910052802 copper Inorganic materials 0.000 claims description 29
- 239000010949 copper Substances 0.000 claims description 29
- 239000010409 thin film Substances 0.000 claims description 26
- 229920002120 photoresistant polymer Polymers 0.000 claims description 25
- 238000009713 electroplating Methods 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 13
- 239000012670 alkaline solution Substances 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 11
- 239000010408 film Substances 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims description 6
- 238000007747 plating Methods 0.000 claims description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 2
- 229910052733 gallium Inorganic materials 0.000 claims description 2
- 229910052718 tin Inorganic materials 0.000 claims description 2
- 229910052725 zinc Inorganic materials 0.000 claims description 2
- 239000011701 zinc Substances 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 229910000365 copper sulfate Inorganic materials 0.000 description 2
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 238000007738 vacuum evaporation Methods 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 235000011114 ammonium hydroxide Nutrition 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009396 hybridization Methods 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、電解メツキによる数十μm程度の微
細な厚膜銅線のパターンによるインダクタや配線
の形成に用いることができる半導体装置の製造方
法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a semiconductor device that can be used to form inductors and wiring using fine thick-film copper wire patterns of approximately several tens of micrometers by electrolytic plating. It is.
従来例の構成とその問題点
近年、半導体装置は、小型化、高集積化により
わずか数mm角の大きさにチツプ化され、従来外付
け部品であつたコンデンサやインダクタも半導体
チツプへの一体化もしくは、半導体部品と同程度
の大きさにしたハイブリツド化が考えられてい
る。このような小型化において、導電線の線幅の
微細化による電気抵抗の増加を回避するため、線
の厚さを数十μm程度とした。いたゆる厚膜化が
必要とされる。例えば、インダクタの場合、導電
部の電気抵抗がそのままインダクタの特性を示す
Ｑ値を悪化させるものとなる。Conventional configurations and their problems In recent years, semiconductor devices have become smaller and more highly integrated into chips with a size of just a few mm square, and capacitors and inductors, which were conventionally external components, are now integrated into semiconductor chips. Alternatively, hybridization is being considered where the size is comparable to that of semiconductor components. In such miniaturization, the thickness of the conductive wire is set to about several tens of μm in order to avoid an increase in electrical resistance due to the miniaturization of the line width of the conductive wire. A thicker film is required in all cases. For example, in the case of an inductor, the electrical resistance of the conductive portion directly deteriorates the Q value indicating the characteristics of the inductor.
以下、図面を参照しながら、スパイラル型イン
ダクタを例に、従来の半導体装置の製造方法につ
いて説明する。第１図は、スパイラル型インダク
タの斜視図であり、１は絶縁性基板、１０は、前
記絶縁性基板上に形成されたスパイラル型インダ
クタである。第２図ａ，ｂ，ｃ，ｄ，ｅは、従来
の半導体装置の製造方法の工程断面図である。１
は絶縁性基板、２は電解メツキを行なうときに電
極となる銅薄膜、３は前記電解メツキに対するマ
スクとなるフオトレジスト、２ａは前記フオトレ
ジスト３により形成された前記銅薄膜の露呈部
で、幅は約20μmである。４は前記電解メツキに
より形成されたインダクタの導電部となる銅であ
る。 DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a conventional method for manufacturing a semiconductor device will be described using a spiral inductor as an example with reference to the drawings. FIG. 1 is a perspective view of a spiral inductor, where 1 is an insulating substrate and 10 is a spiral inductor formed on the insulating substrate. FIGS. 2a, b, c, d, and e are process cross-sectional views of a conventional method for manufacturing a semiconductor device. 1
2 is an insulating substrate, 2 is a copper thin film that becomes an electrode when performing electrolytic plating, 3 is a photoresist that is a mask for the electrolytic plating, 2a is an exposed part of the copper thin film formed by the photoresist 3, and the width is is approximately 20 μm. Reference numeral 4 denotes copper which becomes the conductive part of the inductor formed by the electrolytic plating.
以上のように構成された半導体装置の製造方法
について以下に説明する。 A method of manufacturing the semiconductor device configured as above will be described below.
まず、絶縁性基板１の表面全体に銅薄膜２を、
真空蒸着等を用い厚さ約1μm形成する（第２図
ａ）。前記銅薄膜２は、電解メツキを行なう際の
電極となり、前記電解メツキを行なう面積等に依
るが、前記電極としての抵抗が無視できる程度に
厚く形成する必要がある。 First, a thin copper film 2 is applied to the entire surface of an insulating substrate 1.
It is formed to a thickness of approximately 1 μm using vacuum evaporation or the like (Figure 2a). The copper thin film 2 becomes an electrode when performing electrolytic plating, and although it depends on the area to be electrolytically plated, it needs to be formed so thick that the resistance as the electrode can be ignored.
次にフオトリソグラフイーにより、フオトレジ
スト３をパターニングし、インダクタを形成する
部位にあたる前記銅薄膜２の露呈部２ａを形成す
る（第２図ｂ）。次に、希塩酸で前記露呈部２ａ
の銅を洗浄、さらに水洗後、電解メツキにより、
インダクタの導電部となる銅４を厚さ約10μm形
成する（第２図ｃ）。次に前記フオトレジスト３
をアセトン等の有機溶剤で除去し（第２図ｄ）、
さらに前記銅薄膜２を塩化第二鉄系等の銅のエツ
チング液で除去を行なうことにより、インダクタ
が形成される（第２図ｅ）。 Next, the photoresist 3 is patterned by photolithography to form an exposed portion 2a of the copper thin film 2, which corresponds to a portion where an inductor will be formed (FIG. 2b). Next, the exposed area 2a is treated with dilute hydrochloric acid.
After washing the copper with water and electroplating,
Copper 4, which will become the conductive part of the inductor, is formed to a thickness of about 10 μm (FIG. 2c). Next, the photoresist 3
is removed with an organic solvent such as acetone (Fig. 2 d),
Furthermore, an inductor is formed by removing the copper thin film 2 with a copper etching solution such as ferric chloride-based etching solution (FIG. 2e).
しかしながら、前記のような方法においては、
第１図のｄとｅを比較して明らかなように前記銅
薄膜２のエツチング時に、前記インダクタの導電
部となる銅４も同時にエツチングされるため、前
記銅４の細りが避けられず、この細りを見込んだ
インダクタの設計を行なつても、エツチングの不
均一性から、インダクタの特性の均一化が困難で
あり、またオーバーエツチ等による、前記インダ
クタの導体部４の部分的欠落や溶出の危険性を含
んでいる。これらは、前記インダクタの歩留りの
向上を妨げるという問題点を有していた。なお従
来、厚膜のインダクタのサイズは、第２図に示し
たインダクタの導体部の銅４において厚さ約
100μm、幅約１mmほどのものであり、前記従来例
で示した方法での前記銅４の細り等は問題となつ
ていなかつた。 However, in the above method,
As is clear from comparing d and e in FIG. 1, when the copper thin film 2 is etched, the copper 4 that will become the conductive part of the inductor is also etched at the same time, so thinning of the copper 4 is unavoidable. Even if an inductor is designed with thinning in mind, it is difficult to make the characteristics of the inductor uniform due to non-uniform etching, and the conductor portion 4 of the inductor may be partially missing or eluted due to over-etching. Contains danger. These have had the problem of hindering improvement in the yield of the inductor. Conventionally, the size of a thick-film inductor is approximately 100cm thick at the copper 4 of the inductor conductor shown in Figure 2.
It was about 100 μm and about 1 mm wide, and the thinning of the copper 4 caused by the method shown in the conventional example did not pose a problem.
発明の目的
本発明の目的は、電解メツキにより厚膜銅線を
形成し、さらに前記電解メツキにおける電極を前
記電気メツキにより形成した前記厚膜銅線を侵す
ことなしにエツチングで除去し、もつて、より設
計値に近く、歩留りの向上を可能とする微細な半
導体装置の製造方法を提供することである。OBJECT OF THE INVENTION The object of the present invention is to form a thick film copper wire by electrolytic plating, and to remove the electrode in the electrolytic plating by etching without damaging the thick film copper wire formed by the electroplating. It is an object of the present invention to provide a method for manufacturing a fine semiconductor device that is closer to the design value and allows for improved yield.
発明の構成
本発明の半導体装置の製造方法は、絶縁性基板
上に、アルカリ溶液に可溶な金属薄膜を形成する
工程と、前記金属薄膜上にフオトレジストをパタ
ーニングする工程と、前記フオトレジストをマス
クとして銅の電解メツキを行なう工程と、前記フ
オトレジストを除去し、前記金属薄膜をアルカリ
溶液を用いてエツチング除去する工程とを含むよ
うに構成したものであり、これにより、前記電解
メツキで形成した銅の形状を損なうことなしに前
記金属薄膜のみをエツチング除去し、もつて設計
値に近い厚膜銅線の形成ができ、歩留りの向上と
なるものである。Structure of the Invention The method for manufacturing a semiconductor device of the present invention includes a step of forming a metal thin film soluble in an alkaline solution on an insulating substrate, a step of patterning a photoresist on the metal thin film, and a step of patterning the photoresist on the metal thin film. The method is configured to include a step of electrolytically plating copper as a mask, and a step of removing the photoresist and etching the metal thin film using an alkaline solution. By etching only the metal thin film without damaging the shape of the etched copper, a thick film copper wire close to the design value can be formed, resulting in an improvement in yield.
実施例の説明
以下、本発明の実施例について、図面を参照し
ながら説明する。DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings.
第３図は本発明の一実施例に係る半導体装置の
製造方法の工程断面図を示すものである。第３図
において、１は絶縁性基板、２２は電解メツキに
おける電極となるアルミニウム薄膜、３は前記電
解メツキ時のマスクとなるフオトレジスト、２２
ａは前記フオトレジスト３のパターニングによつ
て生じた前記アルミニウム薄膜２２の露呈部で幅
は約20μmである。４は前記電解メツキにより生
成した銅であり、前記銅４は例えばインダクタの
導電部となる。４ａは、前記フオトレジスト３を
除去した後の前記銅４の凹部である。 FIG. 3 shows a process sectional view of a method for manufacturing a semiconductor device according to an embodiment of the present invention. In FIG. 3, 1 is an insulating substrate, 22 is an aluminum thin film that serves as an electrode in electrolytic plating, 3 is a photoresist that serves as a mask during electrolytic plating, and 22
A is an exposed portion of the aluminum thin film 22 formed by patterning the photoresist 3, and has a width of about 20 μm. 4 is copper produced by the electrolytic plating, and the copper 4 becomes, for example, a conductive part of an inductor. 4a is a recessed portion of the copper 4 after the photoresist 3 is removed.
以上のように構成された本実施例の半導体装置
の製造方法について以下に説明する。まず絶縁性
基板１としてサフアイヤ基板を用い、表面にアル
ミニウムを真空蒸着で約1μmの厚さに形成し、ア
ルミニウム薄膜２２とする（第３図ａ）、次にポ
ジ型フオトレジストを用いる所要のパターニング
を行ないフオトレジスト３を形成する（第３図
ｂ）、次に希塩酸（1N程度）でアルミニウム薄膜
の露呈部２２ａを酸処理し、水洗後すみやかに、
硫酸と硫酸銅からなる硫酸銅浴に浸漬し銅４を電
解メツキにより厚さ約10μm形成する（第３図
ｃ）、次に前記フオトレジスト３を有機溶剤で除
去し（第３図ｄ）、さらにアンモニア水（28％）
を用い、アルミニウム薄膜２２を、前記銅４との
接合部を残すようにエツチングを行なう（第３図
ｅ）。 A method of manufacturing the semiconductor device of this embodiment configured as described above will be described below. First, a sapphire substrate is used as the insulating substrate 1, and aluminum is formed on the surface to a thickness of approximately 1 μm by vacuum evaporation to form an aluminum thin film 22 (Fig. 3a). Next, the required patterning is performed using a positive photoresist. to form a photoresist 3 (FIG. 3b). Next, the exposed portion 22a of the aluminum thin film is acid-treated with dilute hydrochloric acid (about 1N), and immediately after washing with water,
The photoresist 3 was immersed in a copper sulfate bath consisting of sulfuric acid and copper sulfate and electrolytically plated to a thickness of about 10 μm (FIG. 3c), and then the photoresist 3 was removed with an organic solvent (FIG. 3d). Plus ammonia water (28%)
Using a etchant, the aluminum thin film 22 is etched so as to leave the bonded portion with the copper 4 (FIG. 3e).
以上のように本実施例によれば、電解メツキに
おける電極をアルカリ溶液に可溶なアルミニウム
を用いることにより、電解メツキにより形成した
前記銅４の溶解による細そりや欠落を生じること
なく導電部の銅４が形成でき、もつて歩留りの大
幅な向上を実現している。なお本実施例では、絶
縁性基板としてサフアイア基板を用いたが、絶縁
性基板は、サフアイア、ガラス、ヒ化ガリウム等
の基板それ自身が絶縁性であるものならば何でも
よく、さらに、前記アルミニウム薄膜２２との接
合面か絶縁性であるという機能を有するものであ
れば何でもよい。例えば、半導体シリコン基板上
に二酸化シリコン等の絶縁層を形成したものを用
いることができる。 As described above, according to this embodiment, by using aluminum that is soluble in an alkaline solution for the electrode in electrolytic plating, the conductive part can be formed without warping or chipping due to dissolution of the copper 4 formed by electrolytic plating. Copper 4 can be formed, resulting in a significant improvement in yield. In this example, a sapphire substrate was used as the insulating substrate, but any insulating substrate may be used as long as the substrate itself is insulating, such as sapphire, glass, or gallium arsenide. Any material may be used as long as the joint surface with 22 has an insulating function. For example, a structure in which an insulating layer of silicon dioxide or the like is formed on a semiconductor silicon substrate can be used.
また、本実施例では、アルカリ性溶液に可溶な
金属薄膜としてアルミニウムを用いたが、前記金
属薄膜はアルミニウムに限定されるものではなく
アルカリ性溶液に可溶であるという機能を有する
金属であれば何でもよい。例えば、スズ、ガリウ
ム、亜鉛、鉛を用いることができる。 Further, in this example, aluminum was used as the metal thin film soluble in an alkaline solution, but the metal thin film is not limited to aluminum, but may be any metal as long as it has the function of being soluble in an alkaline solution. good. For example, tin, gallium, zinc, and lead can be used.
発明の効果
以上の説明から明らかなように、本発明は、絶
縁性基板上に、アルカリ溶液に可溶な金属の薄膜
を形成する工程と、前記金属薄膜上にフオトレジ
ストをパターニングする工程と、前記フオトレジ
ストをマスクとして銅の電解メツキを行なう工程
と、前記フオトレジストを除去し、前記金属薄膜
をアルカリ溶液を用いてエツチング除去する工程
とを含むように構成しているので、電解メツキ時
の電極である金属の薄膜のエツチング除去に際し
電解メツキで形成された銅を浸食することがない
という優れた効果を得ることができる。またフオ
トレジストとしてポジ型フオトレジストを用いる
ことにより、電解メツキ時に電極となる金属薄膜
をエツチング除去する際に用いるアルカリ溶液に
よつて、電解メツキにより形成された銅の凹部
（第３図ｄの４ａ）に生じやすいポジ型フオトレ
ジストの残渣も前記ポジ型フオトレジストがアル
カリ性溶液に可溶なためきれいに除去できるとい
う効果が得られる。Effects of the Invention As is clear from the above description, the present invention includes the steps of forming a thin film of a metal soluble in an alkaline solution on an insulating substrate, and patterning a photoresist on the thin metal film. The structure includes a step of electrolytically plating copper using the photoresist as a mask, and a step of removing the photoresist and etching the metal thin film using an alkaline solution. An excellent effect can be obtained in that the copper formed by electrolytic plating is not eroded when removing the metal thin film that is the electrode by etching. In addition, by using a positive photoresist as the photoresist, the copper recesses (4a in Figure 3d) formed by electrolytic plating with an alkaline solution used to remove the metal thin film that becomes the electrode during electrolytic plating. ) The positive photoresist residue that tends to occur can also be removed cleanly because the positive photoresist is soluble in an alkaline solution.
第１図は、スパイラル型インダクタの斜視図、
第２図は従来の半導体装置の製造方法の工程断面
図、第３図は本発明の一実施例に係る半導体装置
の製造方法の工程断面図である。
１……絶縁性基板、２……銅薄膜、３……フオ
トレジスト、４……電解メツキにより形成された
銅、２２……アルミニウム薄膜。
FIG. 1 is a perspective view of a spiral inductor;
FIG. 2 is a process sectional view of a conventional semiconductor device manufacturing method, and FIG. 3 is a process sectional view of a semiconductor device manufacturing method according to an embodiment of the present invention. 1... Insulating substrate, 2... Copper thin film, 3... Photoresist, 4... Copper formed by electrolytic plating, 22... Aluminum thin film.
Claims (1)
縁性基板上にアルカリ性溶液に可溶な金属薄膜を
形成する工程と、前記金属薄膜上にフオトレジス
トのパターニングを行なう工程と、前記フオトレ
ジストをマスクとして銅の電解メツキを行なう工
程と、前記フオトレジストを除去し、しかる後前
記金属薄膜をアルカリ性溶液を用いてエツチング
除去する工程とを含むことを特徴とした半導体装
置の製造方法。 ２ アルカリ性溶液に可溶な金属薄膜が、アルミ
ニウル、スズ、ガリウム、亜鉛、鉛である特許請
求の範囲第１項記載の半導体装置の製造方法。[Scope of Claims] 1. When forming a thick film copper wire by electrolytic plating, a step of forming a thin metal film soluble in an alkaline solution on an insulating substrate, and a step of patterning a photoresist on the thin metal film. , a step of electrolytically plating copper using the photoresist as a mask; and a step of removing the photoresist and then etching away the metal thin film using an alkaline solution. Method. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the metal thin film soluble in an alkaline solution is aluminum, tin, gallium, zinc, or lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18673284A JPS6164140A (en) | 1984-09-06 | 1984-09-06 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18673284A JPS6164140A (en) | 1984-09-06 | 1984-09-06 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6164140A JPS6164140A (en) | 1986-04-02 |
| JPH0560257B2 true JPH0560257B2 (en) | 1993-09-01 |
Family
ID=16193670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18673284A Granted JPS6164140A (en) | 1984-09-06 | 1984-09-06 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6164140A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH065785A (en) * | 1992-06-24 | 1994-01-14 | Nec Corp | Fabrication of spiral inductor |
| JP5013131B2 (en) * | 2009-02-13 | 2012-08-29 | セイコーエプソン株式会社 | Manufacturing method of semiconductor device |
-
1984
- 1984-09-06 JP JP18673284A patent/JPS6164140A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6164140A (en) | 1986-04-02 |
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