JPH0536963A - Solid-state image pickup device - Google Patents
Solid-state image pickup deviceInfo
- Publication number
- JPH0536963A JPH0536963A JP3186297A JP18629791A JPH0536963A JP H0536963 A JPH0536963 A JP H0536963A JP 3186297 A JP3186297 A JP 3186297A JP 18629791 A JP18629791 A JP 18629791A JP H0536963 A JPH0536963 A JP H0536963A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- region
- solid
- pickup device
- image pickup
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000012535 impurity Substances 0.000 claims abstract description 11
- 238000003384 imaging method Methods 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 description 50
- 238000006243 chemical reaction Methods 0.000 description 8
- 229910008065 Si-SiO Inorganic materials 0.000 description 6
- 229910006405 Si—SiO Inorganic materials 0.000 description 6
- 239000000758 substrate Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 102000004129 N-Type Calcium Channels Human genes 0.000 description 3
- 108090000699 N-Type Calcium Channels Proteins 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 108091006146 Channels Proteins 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、固体撮像装置に関し、
特に固体撮像装置の光電変換部に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device,
In particular, it relates to a photoelectric conversion unit of a solid-state imaging device.
【0002】[0002]
【従来の技術】従来、インターライン・トランスファー
方式の固体撮像装置の光電変換部としては、図4に示す
断面構造のものが知られている。図4に示す構造は、N
型シリコン基板51上にp- ウェル層53を形成し、そ
の上の2重pウェル(71,73)内に作られたN型の
埋め込みチャネル(垂直転送シフトレジスタ;VCC
D)55,57およびその上の酸化層(SiO2 )59
上に形成した2層のゲート電極61,63の間に、光電
変換部としてのn- 型層65を形成している。このn-
型層65とその下のp- ウェル層53とがホトダイオー
ドを形成している。さらに最近の高感度型と称されるも
のにおいては、このダイオードの表面、すなわちn- 型
ホトダイオード65の上に、シリコン基板と酸化層59
との界面(Si−SiO2 )をシールドするために、p
+ 層67が設けられている。2. Description of the Related Art Conventionally, as a photoelectric conversion unit of an interline transfer type solid-state image pickup device, one having a sectional structure shown in FIG. 4 is known. The structure shown in FIG.
-Type well substrate 53 is formed on a p-type silicon substrate 51, and an N-type buried channel (vertical transfer shift register; VCC) formed in a double p-well (71, 73) on the p - well layer 53 is formed.
D) 55, 57 and oxide layer (SiO 2 ) 59 thereon
An n − type layer 65 as a photoelectric conversion portion is formed between the two layers of gate electrodes 61 and 63 formed above. The n -
The mold layer 65 and the p − well layer 53 therebelow form a photodiode. In the more recent so-called high sensitivity type, a silicon substrate and an oxide layer 59 are formed on the surface of the diode, that is, on the n − type photodiode 65.
To shield the interface (Si-SiO 2) and, p
A + layer 67 is provided.
【0003】このp+ 層67は図5において平面構造が
示されているように、読出部69の領域を除く、n- 型
層65の主要領域を覆うように形成している。このp+
層67の機能は、一つに容量を稼ぐことであり、またそ
の他に主にSi−SiO2 界面を非空乏化状態とするこ
とにより、界面準位が発生電流の生成中心として機能し
にくくなり、暗電流(リーク電流)の発生を低減でき
る。As shown in the planar structure in FIG. 5, p + layer 67 is formed so as to cover the main region of n − type layer 65 excluding the region of read section 69. This p +
Function of layer 67 is that make the volume to one, also primarily by the Si-SiO 2 interface and a non-depleted state to the other, will interface state is less likely to function as a generating center generates current The generation of dark current (leakage current) can be reduced.
【0004】しかし、かかる構造の装置において、製造
時のエッチングムラによるエッチングダメージや、金属
汚染等によりホトダイオードの界面の界面準位密度が増
大し、反転状態となることにより、暗電流が大幅に発生
することがある。これは図3の線Aで示すホトダイオー
ドの電位分布において、電子またはホールの電荷がポテ
ンシャルの高い(電子の場合)または低い(ホールの場
合)へ流れようとするので、p+ 層67の作るバリアは
超えられないが、Si−SiO2 界面を伝わって読出部
よりホトダイオードへ流入するという欠点がある。However, in the device having such a structure, an etching damage due to etching unevenness at the time of manufacture, an interface state density of an interface of the photodiode increases due to metal contamination, etc., and an inversion state is caused, thereby causing a large dark current. I have something to do. This is because in the potential distribution of the photodiode shown by the line A in FIG. 3, the charge of electrons or holes tends to flow to a high potential (in the case of electrons) or low (in the case of holes), so that the barrier formed by the p + layer 67. However, there is a drawback that it flows through the Si—SiO 2 interface and flows into the photodiode from the reading section.
【0005】[0005]
【発明が解決しようとする課題】本発明は、上記欠点を
解消し、暗電流を読出部に流入させない構造を有する固
体撮像装置を提供することを目的とする。SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned drawbacks and to provide a solid-state image pickup device having a structure in which a dark current does not flow into the reading section.
【0006】[0006]
【課題を解決するための手段】本発明は、上記問題点を
解消するため、n- 層およびp- ウェル層からなるホト
ダイオードの電荷を取り出すための読出部を除く領域上
にp+ 領域が形成されている固体撮像装置において、前
記読出部の周囲を取り巻く領域にp+ 領域より不純物濃
度が高く、その深さがp+ 領域より浅いp++領域を形成
したことを特徴とする固体撮像装置を提供する。According to the present invention, in order to solve the above-mentioned problems, ap + region is formed on a region excluding a read portion for taking out charges of a photodiode formed of an n - layer and a p - well layer. in the solid-state imaging device that is, the impurity concentration than the p + region in the area surrounding the periphery of the reading unit is high, the solid-state imaging apparatus characterized by its depth to form a shallow p ++ region than the p + region I will provide a.
【0007】[0007]
【作用】本発明によれば、種々の外的影響により暗電流
が大幅に発生する場合において、p+ 領域では、ある程
度しか暗電流が読出部に流入することを阻止することが
できなかったが、読出部周辺を取り巻くようにして設け
られたp+ 領域より不純物濃度の高いp++領域にて、読
出部には暗電流の流入をほぼ無くすことができ、読出部
に影響を与えず、鮮明な画像を得ることができる。According to the present invention, when a large dark current is generated due to various external influences, it is possible to prevent the dark current from flowing into the reading section to some extent in the p + region. at high p ++ regions in impurity concentration than the p + region provided so as to surround the peripheral read unit, substantially it can eliminate the flow of dark current in the reading unit, without affecting the reading unit, A clear image can be obtained.
【0008】前述したように、シリコン・酸化シリコン
(Si−SiO2 )間に発生した例えば電子は、p+ 層
の作るバリヤは超えられないが、一番ポテンシャルが高
い所へ流れ易く、即ちSi−SiO2 界面を伝わって読
出部から信号と一緒に読み出されてしまうが、読出部の
周囲に設けられたp++層により、Si−SiO2 界面を
伝わってきた電子を阻止することができるものである。As described above, for example, electrons generated between silicon and silicon oxide (Si-SiO 2 ) cannot exceed the barrier formed by the p + layer, but easily flow to the highest potential, that is, Si. thus read with the signal from the reading unit transmitted the -SiO 2 interface, but the p ++ layer provided around the read unit, is possible to prevent the electron which has transmitted the Si-SiO 2 interface It is possible.
【0009】[0009]
【実施例】以下に本発明に基づく好適実施例を添付図面
を参照して説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the accompanying drawings.
【0010】図1は、固体撮像装置(CCD)の光電変
換部を示す概略的な平面的な線図である。第1層垂直転
送電極(VCCD電極)12,14との間および第2層
垂直転送電極(VCCD電極)11,13との間に、ホ
トダイオードの主表面上にp + 層15が設けられ、p+
層15で覆われないn- 型の読出部17の周囲には、p
++層19がある程度の幅をもって読出部17を取り囲む
ように配設されている。FIG. 1 shows a photoelectric conversion of a solid-state image pickup device (CCD).
It is a schematic plan view which shows a replacement part. First layer vertical roll
Between the sending electrodes (VCCD electrodes) 12 and 14 and the second layer
Between the vertical transfer electrodes (VCCD electrodes) 11 and 13,
P on the main surface of the diode +Layer 15 is provided, p+
N not covered by layer 15-Around the mold reading unit 17, p
++The layer 19 surrounds the reading section 17 with a certain width.
It is arranged as follows.
【0011】このp++層19の構造を図2に基づいて説
明する。この構造全体について説明すると、N型基板2
1の上にp- ウェル層23が形成され、このp- ウェル
層23上にn- 層25が形成されて、p- −n- ウェル
のホトダイオードが形成される。さらにn- 層25上に
は不感領域としてのp+ 層15が形成され、読出部17
の近傍に本発明によるp++層19がイオン打ち込み等に
より設けられる。また読出用電極と兼ねている垂直転送
電極13の下には、転送路としてのn型のチャネル領域
27が、さらにその下側にはp層29が形成されてp-
層と相俟ってダブルウェル構造を形成している。The structure of the p ++ layer 19 will be described with reference to FIG. Explaining the entire structure, the N-type substrate 2
1, a p - well layer 23 is formed on the p - well layer 23, and an n - layer 25 is formed on the p - well layer 23 to form a p - n - well photodiode. Further, the p + layer 15 as a dead region is formed on the n − layer 25, and the reading section 17 is formed.
A p ++ layer 19 according to the present invention is provided in the vicinity of, by ion implantation or the like. An n-type channel region 27 as a transfer path is formed below the vertical transfer electrode 13 which also serves as a read electrode, and a p layer 29 is formed below the n-type channel region 27 to form p −.
Together with the layers, they form a double well structure.
【0012】p++層19の深さは、p+ 層15の深さよ
り浅くできればよい。p++層19の不純物としては、例
えばBF2 + 等が挙げられる。p++層19の不純物濃度
は、p+ 層15の不純物濃度に応じて不純物濃度を適宜
選択するのがよい。p+ 層15の不純物濃度とp++層1
9の不純物濃度との関係をそれらの比で示すと、例えば
1:1以上程度であるのがよい。[0012] The depth of the p ++ layer 19, it is only necessary to shallower than the depth of the p + layer 15. Examples of impurities of the p ++ layer 19 include BF 2 + . The impurity concentration of the p ++ layer 19, it is preferable to appropriately select the impurity concentration in accordance with the impurity concentration of the p + layer 15. Impurity concentration of p + layer 15 and p + + layer 1
When the relation with the impurity concentration of 9 is shown by the ratio thereof, it is preferably about 1: 1 or more.
【0013】また、p++層19の平面方向における幅
は、例えば1μm以上程度とするのがよい。またp++層
19は、読出部の周囲に一重に設けられる他に、多重に
設けてもよい。The width of the p ++ layer 19 in the plane direction is preferably about 1 μm or more. Further, the p ++ layers 19 may be provided in multiple layers in addition to the single layer provided around the read section.
【0014】図2を参照してp++層19の作用を説明す
ると、突発的に発生したエッチングムラとか金属汚染と
かによって、光電変換部のSi−SiO2 界面がダメー
ジを受け、大量の暗電流が発生した場合に、p+ 層15
の絶縁層との界面を伝わり、p+ 層15で阻止できない
電荷が、p++層19で阻止され、読出部17には電荷が
流入されない。The operation of the p ++ layer 19 will be described with reference to FIG. 2. The Si—SiO 2 interface of the photoelectric conversion part is damaged by abrupt etching irregularities or metal contamination, and a large amount of darkness occurs. When a current is generated, the p + layer 15
The electric charges that have been transmitted through the interface with the insulating layer and cannot be blocked by the p + layer 15 are blocked by the p ++ layer 19, and the charges do not flow into the reading section 17.
【0015】図3の線Bに示すようにp++層19にバリ
アが形成されることにより、ホトダイオードの電位分布
のポテンシャルの上昇を無くすことができる。このため
暗電流の電荷はp++層19のバリア領域で阻まれて、読
出部に取り込まれることはほぼなくなる。By forming a barrier in the p ++ layer 19 as shown by the line B in FIG. 3, it is possible to prevent the potential of the potential distribution of the photodiode from rising. Therefore, the charge of dark current is blocked by the barrier region of the p ++ layer 19 and is hardly taken into the reading section.
【0016】以上、本発明の一実施例について説明した
が、本発明は上記実施例に限定されるものではなく、種
々、様々に変形、変更を行うことができる。Although one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications and changes can be made.
【0017】[0017]
【発明の効果】本発明によれば、種々の外的影響により
暗電流が大幅に発生する場合においても、p+ 領域で
は、ある程度電荷の流入を防ぐことができるが、さらに
p+ 領域で防げなかった暗電流の電荷は読出部周辺を取
り巻くようにして設けられたp+ 領域より不純物濃度の
高いp++領域にて流入を防がれ、読出部には暗電流の流
入をほぼ無くすことができ、またp+ 領域より浅くp++
領域を設けているため、読出部へ転送される光電変換さ
れた電荷の移動を妨げることなく、読出部の読出動作に
影響を与えず、鮮明な画像を得ることができる。According to the present invention, in the case where the dark current by various external influences occur significantly also in the p + region, although it is possible to prevent the inflow of a certain degree charge, further prevented by the p + region The charge of the dark current that did not exist is prevented from flowing into the p ++ region where the impurity concentration is higher than that of the p + region that is provided so as to surround the periphery of the reading part, and the inflow of dark current to the reading part is almost eliminated. And shallower than the p + region p ++
Since the area is provided, it is possible to obtain a clear image without hindering the movement of the photoelectrically converted charges transferred to the reading unit and without affecting the reading operation of the reading unit.
【図1】 本発明に係る固体撮像装置の一例を示す光電
変換部の概略を示す線図である。FIG. 1 is a diagram schematically showing a photoelectric conversion unit showing an example of a solid-state imaging device according to the present invention.
【図2】 図1に示した光電変換部の断面を示す説明図
である。FIG. 2 is an explanatory diagram showing a cross section of the photoelectric conversion unit shown in FIG.
【図3】 ホトトランジスタの電位分布を示すグラフで
ある。FIG. 3 is a graph showing a potential distribution of a phototransistor.
【図4】 固体撮像装置の断面構造を示す説明図であ
る。FIG. 4 is an explanatory diagram showing a cross-sectional structure of a solid-state imaging device.
【図5】 従来の固体撮像装置の光電変換部の概略を示
す線図である。FIG. 5 is a diagram schematically showing a photoelectric conversion unit of a conventional solid-state imaging device.
11,12,13,14 電荷転送用電極 15 p+ 層 17 読出部 19 p++層 21 N型シリコン基板 23 p- ウェル 25 n- ウェル 27 n型チャネル層 29 pウェル11, 12, 13, 14 Charge transfer electrode 15 p + layer 17 Read-out portion 19 p ++ layer 21 N-type silicon substrate 23 p - well 25 n - well 27 n-type channel layer 29 p-well
Claims (1)
ダイオードの電荷を取り出すための読出部を除く領域上
にp+ 領域が形成されている固体撮像装置において、 前記読出部の周囲を取り巻く領域にp+ 領域より不純物
濃度が高く、その深さがp+ 領域より浅いp++領域を形
成したことを特徴とする固体撮像装置。Claim: What is claimed is: 1. A solid-state imaging device, comprising: a p + region formed on a region excluding a readout portion for extracting charges of a photodiode formed of an n - layer and a p - well layer. A solid-state image pickup device, wherein a p + + region having a higher impurity concentration than the p + region and a shallower depth than the p + region is formed in a region surrounding the area.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3186297A JPH0536963A (en) | 1991-07-25 | 1991-07-25 | Solid-state image pickup device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3186297A JPH0536963A (en) | 1991-07-25 | 1991-07-25 | Solid-state image pickup device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0536963A true JPH0536963A (en) | 1993-02-12 |
Family
ID=16185858
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3186297A Withdrawn JPH0536963A (en) | 1991-07-25 | 1991-07-25 | Solid-state image pickup device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0536963A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8541255B2 (en) * | 2007-05-29 | 2013-09-24 | Sony Corporation | Solid-state imaging device, method of manufacturing the same, and imaging apparatus |
-
1991
- 1991-07-25 JP JP3186297A patent/JPH0536963A/en not_active Withdrawn
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8541255B2 (en) * | 2007-05-29 | 2013-09-24 | Sony Corporation | Solid-state imaging device, method of manufacturing the same, and imaging apparatus |
US8704276B2 (en) | 2007-05-29 | 2014-04-22 | Sony Corporation | Solid-state imaging device, method of manufacturing the same, and imaging apparatus |
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