JPH05343327A - Film-forming method - Google Patents
Film-forming methodInfo
- Publication number
- JPH05343327A JPH05343327A JP15255092A JP15255092A JPH05343327A JP H05343327 A JPH05343327 A JP H05343327A JP 15255092 A JP15255092 A JP 15255092A JP 15255092 A JP15255092 A JP 15255092A JP H05343327 A JPH05343327 A JP H05343327A
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- Prior art keywords
- film
- gas
- temperature
- forming
- reaction chamber
- Prior art date
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は成膜技術の一つである原
子層堆積法に関する。近年の薄膜利用技術の高度化に伴
い, 薄膜の結晶性, 均一性等の膜質向上が要求されてい
る。特に, 量子サイズ効果を利用した機能デバイスを構
成する半導体薄膜を単一原子層レベルで成長の制御がで
きる方法が必要となり，原子層堆積法による結晶性のよ
い半導体薄膜の形成が行われている。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an atomic layer deposition method which is one of film forming techniques. With the advancement of thin film utilization technology in recent years, improvement of film quality such as crystallinity and uniformity of thin film is required. In particular, a method that can control the growth of semiconductor thin films that compose functional devices using the quantum size effect at the single atomic layer level is required, and semiconductor thin films with good crystallinity are being formed by the atomic layer deposition method. ..
【０００２】また, 半導体薄膜に限らず, 絶縁膜を形成
した場合も同様に高品質の薄膜が形成できる。例えば薄
膜EL (エレクトロルミネセンス) パネルの絶縁膜は, 高
耐圧, 無欠陥, 長寿命が要求され，薄膜中に不純物, 膜
欠陥等を含まない高品質の膜質を実現する必要がある。Further, not only a semiconductor thin film, but also an insulating film can form a high quality thin film. For example, the insulation film of a thin-film EL (electroluminescence) panel is required to have a high breakdown voltage, no defects, and a long life, and it is necessary to realize a high-quality film quality that does not contain impurities or film defects in the thin film.
【０００３】原子層堆積法は薄膜を形成する際に, 原料
となる複数のガスを交互に切り換えて薄膜形成領域に導
入し，単一原子層レベルで１層ずつ形成していくため，
高品質の薄膜を形成できる。In the atomic layer deposition method, when forming a thin film, a plurality of gases as raw materials are alternately switched and introduced into the thin film forming region to form one layer at a single atomic layer level.
A high quality thin film can be formed.
【０００４】[0004]
【従来の技術】従来の原子層堆積法は，成膜温度まで被
成膜基板の温度を上昇させる際に原料ガスを成長チャン
バ内に導入しないで，成膜温度になってから始めて原料
ガスを導入し，成膜を開始する方法がとられていた。2. Description of the Related Art In the conventional atomic layer deposition method, the source gas is not introduced into the growth chamber when the temperature of the deposition target substrate is raised to the deposition temperature, and the source gas is not supplied until the deposition temperature is reached. The method of introducing and starting film formation was adopted.
【０００５】また，昇温中に水蒸気雰囲気にする方法が
あるが，この方法を用いる場合でも水蒸気の圧力は10-2
Torr 以下の比較的低い圧力で行われていた。薄膜トラ
ンジスタ(TFT) のゲートは下地のアルミニウム(Al)膜に
チタン(Ti)を被覆成膜した２層構造が用いられてきてお
り，ゲート絶縁膜にプラズマ気相成長(CVD) 法を用いる
限りにおいてはその信頼性は低かった。ゲート絶縁膜を
形成する際に，ゲートのパターニングに用いたレジスト
が残留し，重大欠陥を生ずる可能性があった。There is also a method of making a water vapor atmosphere while the temperature is rising. Even when this method is used, the water vapor pressure is 10 -2.
It was performed at a relatively low pressure below Torr. The thin film transistor (TFT) gate has a two-layer structure in which titanium (Ti) is coated on the underlying aluminum (Al) film, and as long as plasma vapor deposition (CVD) method is used for the gate insulating film. Was unreliable. When the gate insulating film is formed, the resist used for patterning the gate may remain and cause serious defects.
【０００６】[0006]
【発明が解決しようとする課題】従来の原子層堆積法で
成膜された薄膜(ALD膜) の膜質が安定せず，白濁や点状
のムラ等が発生する場合が多かった。また, このような
ALD 膜でTFT 方式のLCD(液晶表示装置) のゲート絶縁膜
を形成して評価素子を作成し，TFT 特性を測定しても耐
圧試験による絶縁破壊, しきい値電圧のシフト等が発生
していた。The film quality of the thin film (ALD film) formed by the conventional atomic layer deposition method is not stable, and white turbidity or dot-like unevenness often occurs. Also, like this
Even if a TFT-type LCD (liquid crystal display) gate insulating film is formed with an ALD film to create an evaluation element and the TFT characteristics are measured, dielectric breakdown, threshold voltage shift, etc. due to the withstand voltage test still occur. It was
【０００７】また，従来のゲートはTi/Al の２層構造で
あり，製造工程も複雑となるため，単層ゲートのTFT の
作成も望まれている。本発明は上記の諸問題を改善し，
膜質のよい成膜を生産性よく行えるようにすることを目
的とする。Further, since the conventional gate has a two-layer structure of Ti / Al and the manufacturing process is complicated, it is desired to prepare a TFT having a single-layer gate. The present invention improves the above problems,
It is an object of the present invention to enable high quality film formation with high productivity.
【０００８】[0008]
【課題を解決するための手段】上記課題の解決は，１）
複数の原料ガス雰囲気中に交互に被成膜基板を曝す原子
層堆積法による成膜方法であって，該被成膜基板の温度
を室温から成膜温度まで上昇させる間に該被成膜基板を
圧力が 0.1〜10 Torr の水蒸気雰囲気内に保ち，その後
成膜を開始する成膜方法，あるいは２）前記水蒸気雰囲
気に不活性ガスが添加されている前記１）記載の成膜装
置，あるいは３）前記被成膜基板が金属膜配線が配設さ
れた絶縁性基板であり，その上に絶縁膜を成長する前記
１）あるいは２）記載の成膜装置により達成される。[Means for Solving the Problems] 1)
A film forming method by an atomic layer deposition method in which a film forming substrate is alternately exposed to a plurality of source gas atmospheres, wherein the film forming substrate is heated while the temperature of the film forming substrate is raised from room temperature to the film forming temperature. Film forming method in which the pressure is kept in a steam atmosphere of 0.1 to 10 Torr, and then film formation is started, or 2) the film forming apparatus described in 1) above, in which an inert gas is added to the steam atmosphere, or 3 The film-forming substrate is an insulating substrate on which metal film wiring is arranged, and the film-forming apparatus described in 1) or 2) above is used to grow an insulating film thereon.
【０００９】[0009]
【作用】原子層堆積法による成膜では，成膜開始初期の
段階での核成長がその後の成膜状態を支配し，初期の成
長条件を確実に設定して成膜を行えば，成長の中期以後
の成膜条件の設定は難しくないことが多い。しかしなが
ら，初期条件を確実に設定しても，白濁，成膜ムラ等の
欠陥が出る場合が多く，成膜開始前の処理が重要であ
る。[Function] In the film formation by the atomic layer deposition method, the nucleus growth in the initial stage of the film formation controls the subsequent film formation state. It is often not difficult to set film formation conditions after the middle period. However, even if the initial conditions are reliably set, defects such as white turbidity and uneven film formation often occur, and the process before the start of film formation is important.
【００１０】そこで，従来は, 成膜前の温度上昇時に前
記のように低圧力の水蒸気雰囲気中で昇温を行うことに
より，ゲート材にAl等を用いた時にその表面を酸化さ
せ，アルミナの核成長を容易に行わせて欠陥の少ないAL
D 膜を成長させるようにしていた。Therefore, conventionally, when the temperature is increased before film formation, the temperature is raised in a low-pressure steam atmosphere as described above to oxidize the surface when Al or the like is used for the gate material, and AL with few defects that facilitates nuclear growth
I tried to grow D film.
【００１１】しかし，水蒸気雰囲気で昇温を行う際に,
水蒸気圧力が10-2 Torr 以下と低い場合はアルミナ核の
異常成長を促進する。そこで, 圧力を0.1 〜10 Torr と
比較的高くするとアルミナ核の異常成長を抑え, 膜質の
よい成膜ができることが本発明者の実験により判明し
た。この際, 水蒸気雰囲気に不活性ガス(He, Ar, Ne,K
r, Xe 等) を添加して水蒸気圧を調整してもよい。However, when the temperature is raised in a steam atmosphere,
When the water vapor pressure is as low as 10 -2 Torr or less, it promotes abnormal growth of alumina nuclei. Therefore, it was found from the experiments by the present inventor that a relatively high pressure of 0.1 to 10 Torr suppresses abnormal growth of alumina nuclei and enables film formation with good film quality. At this time, the inert gas (He, Ar, Ne, K
(r, Xe, etc.) may be added to adjust the water vapor pressure.
【００１２】なお，この水蒸気圧の限界は成長被膜の白
濁, 欠陥の有無を確かめて実験的に決定した。また，こ
のアルミナALD 膜をTFT 方式LCD パネルのゲート絶縁膜
に使用する場合はゲートはAlの単層構造にすることが可
能である。その理由は, アルミナALD膜とAlゲートは密
着性がよく, 被覆性もよいからである。その結果他の材
料を使用したときよりもゲート絶縁膜の耐圧が高く, LC
D パネルの画素欠陥特に点欠陥を防止することができ
る。The limit of the water vapor pressure was determined experimentally by confirming the presence of cloudiness and defects in the grown film. When this alumina ALD film is used as the gate insulating film of a TFT LCD panel, the gate can have a single-layer structure of Al. The reason is that the alumina ALD film and the Al gate have good adhesion and good coverage. As a result, the breakdown voltage of the gate insulating film is higher than when other materials are used, and LC
It is possible to prevent pixel defects of the D panel, especially point defects.
【００１３】さらに, ゲートをパターニングする際に生
ずるレジスト残渣も，アルミナALD膜形成前に硫酸系エ
ッチャントで除去することで, ゲート絶縁膜の信頼性を
向上できる。Further, the resist residue generated when patterning the gate is also removed by a sulfuric acid type etchant before forming the alumina ALD film, so that the reliability of the gate insulating film can be improved.
【００１４】[0014]
【実施例】図１は本発明の実施例を説明するALD 装置の
斜視図である。図において，反応室30の中に, 試料S を
保持する回転体があり，成膜時, または昇温時にはこれ
を60rpm で回転させる。反応室（成長チャンバ）内は,
ターボ分子ポンプVPで排気して高真空となる。室温から
成膜温度 500℃まで昇温する間, コントロールバルブV2
を経て導入口N2より水蒸気を流し続け, オリフィス弁OF
で調節して反応室内の圧力を1 Torrにした。この際, 水
蒸気のキャリアガスとしてアルゴン(Ar)ガスを用い, そ
の流量は 200 SCCM とした。1 is a perspective view of an ALD device for explaining an embodiment of the present invention. In the figure, in the reaction chamber 30, there is a rotor for holding the sample S, which is rotated at 60 rpm during film formation or temperature rise. In the reaction chamber (growth chamber),
The turbo molecular pump VP evacuates to a high vacuum. While increasing the temperature from room temperature to 500 ℃, control valve V2
Steam continues to flow from the inlet N2 through the orifice valve OF
The pressure inside the reaction chamber was adjusted to 1 Torr. At this time, argon (Ar) gas was used as the carrier gas for water vapor, and the flow rate was 200 SCCM.
【００１５】成膜時にはコントロールバルブV1を開き,
キャリアガスにArガスを用いてテトラメチルアルミ(TM
A) ガス32を一定量導入した。該原料ガスの流量はH2O
ガスが 100 SCCM, TMAガスが 40 SCCMである。各々の原
料ガスが気相中で混合して反応しないように，バリアガ
スとしてArガス31をコントロールバルブV0を調節して導
入口N0からカーテン状に 350 SCCM 流す。At the time of film formation, the control valve V1 is opened,
Tetramethylaluminum (TM) using Ar gas as carrier gas
A) A certain amount of gas 32 was introduced. The flow rate of the source gas is H 2 O
Gas is 100 SCCM and TMA gas is 40 SCCM. Ar gas 31 is used as a barrier gas by controlling the control valve V0 to flow 350 SCCM in a curtain shape from the inlet N0 so that the raw material gases do not mix and react in the gas phase.
【００１６】各原料ガスは反応室に導入前にヒータによ
って加熱される。加熱温度はH2O ガスが 80 ℃, TMA ガ
スが 65 ℃である。実施例の試料としては，絶縁性ガラ
ス基板上にAlゲートを形成したものを用い，その上にア
ルミナALD 膜を成膜した。成膜前に硫酸系エッチャント
でレジスト残渣の除去処理を行ったものと, 行わないも
のについて成膜を行った。Each source gas is heated by a heater before being introduced into the reaction chamber. The heating temperature is 80 ° C for H 2 O gas and 65 ° C for TMA gas. As the sample of the example, an Al glass film was formed on an insulating glass substrate, and an alumina ALD film was formed thereon. Before and after film formation, a sulfuric acid-based etchant was used to remove the resist residue, and some were not.
【００１７】ALD 膜を約4000Å成膜するのに, 前記の回
転数で5400回転の時間を要した。このALD 膜の上にプラ
ズマCVD 法により窒化シリコン(SiN) 膜を 500Å成長し
てゲート絶縁膜（層間絶縁膜）とした。It took 5400 rotations at the above-mentioned number of rotations to form an ALD film of about 4000Å. A 500N silicon nitride (SiN) film was grown on this ALD film by the plasma CVD method to form a gate insulating film (interlayer insulating film).
【００１８】図２(A),(B) は実施例と従来例のTFT の断
面図である。図において，１はガラス基板，２は実施例
のゲートバスラインGBでAl膜, 2A,2Bは従来例のゲート
バスラインGBでそれぞれAl膜, Ti膜, ３，４は実施例の
ゲート絶縁膜でそれぞれアルミナALD 膜, SiN 膜,
３’，４は従来例のゲート絶縁膜でSiO2膜, SiN 膜, ５
はチャネル層でアモルファスシリコン(a-Si)層, ６はコ
ンタクト層で n+ 型a-Si層, ７はソースドレイン電極で
チタン(Ti)膜, ８はチャネル保護膜でSiN 膜，９はドレ
インバスラインDBでAl膜, 10は画素電極（ITO 透明電
極）である。2 (A) and 2 (B) are sectional views of the TFTs of the embodiment and the conventional example. In the figure, 1 is a glass substrate, 2 is a gate bus line GB of the embodiment, an Al film, 2A and 2B are a conventional gate bus line GB, an Al film, a Ti film, 3 and 4 are gate insulating films of the embodiment. Alumina ALD film, SiN film,
3'and 4 are conventional gate insulating films, SiO 2 film, SiN film, 5
Is a channel layer which is an amorphous silicon (a-Si) layer, 6 is a contact layer which is an n + type a-Si layer, 7 is a source / drain electrode which is a titanium (Ti) film, 8 is a channel protective film which is a SiN film, and 9 is a drain In the bus line DB, an Al film and 10 are pixel electrodes (ITO transparent electrodes).
【００１９】基板上において，各TFT のゲートを接続す
るゲートバスラインと直交して, 各TFT のドレインを接
続するドレインバスラインDBまたは各TFT のソースを接
続するソースバスラインとがゲート絶縁膜を介して配置
されている。On the substrate, the gate bus line connecting the gates of the respective TFTs is orthogonal to the drain bus line DB connecting the drains of the respective TFTs or the source bus line connecting the sources of the respective TFTs forms a gate insulating film. Are located through.
【００２０】[0020]
【発明の効果】本発明によれば，膜質のよいALD 成膜が
得られた。TFT 方式のLCD パネルの製造に本発明を適用
すると，ALD 成膜前にゲート電極またはゲートバスライ
ンと層間絶縁膜（ゲート絶縁膜）との界面においてアル
ミナ核の異常成長をさせることなく，アルミナ核形成を
促進し，膜質のよいALD 膜が得られる。According to the present invention, an ALD film having good film quality can be obtained. When the present invention is applied to the manufacture of a TFT type LCD panel, the alumina nuclei are not grown abnormally at the interface between the gate electrode or the gate bus line and the interlayer insulating film (gate insulating film) before the ALD film formation. The formation of ALD film with good quality is obtained.
【００２１】実施例に示した方法で形成されたALD 膜
は, 水蒸気雰囲気中の昇温を行わないもの, または低圧
力の水蒸気雰囲気中の昇温を行ったものに比べて白濁,
膜厚のムラ, 点状欠陥のないものが得られた。また, 実
施例のALD 膜で形成したパネルは絶縁耐圧が高く, TFT
特性がよく, 表示ムラのないものが得られた。The ALD film formed by the method shown in the example has a cloudiness, which is more turbid than that without heating in a steam atmosphere or with heating in a low-pressure steam atmosphere.
A film without unevenness in film thickness and dot defects was obtained. In addition, the panel formed of the ALD film of the example has a high withstand voltage, and
A product with good characteristics and no display unevenness was obtained.
【００２２】また，成膜前に硫酸系エッチャントでレジ
スト残渣の除去処理を行ったものは, 行わないものと比
較してさらに良質な膜を得ることができた。Further, a film of which the resist residue was removed with a sulfuric acid-based etchant before the film formation was able to obtain a higher quality film than the film of which the resist residue was not removed.
【図１】 本発明の実施例を説明するALD 装置の斜視図FIG. 1 is a perspective view of an ALD device illustrating an embodiment of the present invention.
【図２】 実施例と従来例のTFT の断面図FIG. 2 is a sectional view of a TFT according to an example and a conventional example.
１ ガラス基板 ２ 実施例のゲートバスラインGBでAl膜 2A, 2B 従来例のゲートバスラインGBでそれぞれAl膜,
Ti膜 ３，４ 実施例のゲート絶縁膜でそれぞれアルミナALD
膜，SiN 膜 ３’，４ 従来例のゲート絶縁膜でSiO2膜, SiN 膜 ５ チャネル層でa-Si層 ６ コンタクト層で n+ 型a-Si層 ７ ソースドレイン電極でTi膜 ８ チャネル保護膜でSiN 膜 ９ ドレインバスラインDBでAl膜 10 画素電極（ITO 透明電極）1 glass substrate 2 Al film on the gate bus line GB of the embodiment 2A, 2B Al film on the gate bus line GB of the conventional example,
Ti film 3, 4 Alumina ALD for each of the gate insulating films of the examples
Film, SiN film 3 ', 4 Conventional gate insulating film SiO 2 film, SiN film 5 Channel layer a-Si layer 6 Contact layer n + type a-Si layer 7 Source drain electrode Ti film 8 Channel protection Film is SiN film 9 Drain bus line DB is Al film 10 Pixel electrode (ITO transparent electrode)
Claims (3)
基板を曝す原子層堆積法による成膜方法であって，該被
成膜基板の温度を室温から成膜温度まで上昇させる間に
該被成膜基板を圧力が 0.1〜10 Torr の水蒸気雰囲気内
に保ち，その後成膜を開始することを特徴とする成膜方
法。1. A film forming method by an atomic layer deposition method in which a film formation substrate is alternately exposed to a plurality of source gas atmospheres, and the temperature of the film formation substrate is raised from room temperature to a film formation temperature. A film forming method characterized in that the film formation substrate is kept in a water vapor atmosphere having a pressure of 0.1 to 10 Torr, and then film formation is started.
れていることを特徴とする請求項１記載の成膜装置。2. The film forming apparatus according to claim 1, wherein an inert gas is added to the water vapor atmosphere.
た絶縁性基板であり，その上に絶縁膜を成長することを
特徴とする請求項１あるいは２記載の成膜装置。3. The film forming apparatus according to claim 1, wherein the film formation substrate is an insulating substrate on which metal film wiring is arranged, and an insulating film is grown on the insulating substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15255092A JPH05343327A (en) | 1992-06-12 | 1992-06-12 | Film-forming method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15255092A JPH05343327A (en) | 1992-06-12 | 1992-06-12 | Film-forming method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05343327A true JPH05343327A (en) | 1993-12-24 |
Family
ID=15542921
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15255092A Withdrawn JPH05343327A (en) | 1992-06-12 | 1992-06-12 | Film-forming method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05343327A (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001068639A (en) * | 1999-06-28 | 2001-03-16 | Hyundai Electronics Ind Co Ltd | Semiconductor device and its manufacture |
| KR100547248B1 (en) * | 1999-11-12 | 2006-02-01 | 주식회사 하이닉스반도체 | A method for forming gate dielectric layer using alumina in semiconductor device |
| KR100481848B1 (en) * | 1998-12-15 | 2006-05-16 | 삼성전자주식회사 | Manufacturing method of dielectric film without chemical defect |
| US7498059B2 (en) * | 1994-11-28 | 2009-03-03 | Asm America, Inc. | Method for growing thin films |
| DE102008010041A1 (en) * | 2007-09-28 | 2009-04-02 | Osram Opto Semiconductors Gmbh | Layer deposition apparatus, e.g. for epitaxial deposition of compound semiconductor layers, has segmented process gas enclosure in which substrate is moved relative to partition |
| JP2009147108A (en) * | 2007-12-14 | 2009-07-02 | Denso Corp | Semiconductor chip and manufacturing method thereof |
| US7781326B2 (en) | 2001-02-02 | 2010-08-24 | Applied Materials, Inc. | Formation of a tantalum-nitride layer |
| US8419855B2 (en) | 2008-09-29 | 2013-04-16 | Applied Materials, Inc. | Substrate processing chamber with off-center gas delivery funnel |
| JP2016129243A (en) * | 2016-02-25 | 2016-07-14 | 東京エレクトロン株式会社 | Deposition method |
| US10280509B2 (en) | 2001-07-16 | 2019-05-07 | Applied Materials, Inc. | Lid assembly for a processing system to facilitate sequential deposition techniques |
-
1992
- 1992-06-12 JP JP15255092A patent/JPH05343327A/en not_active Withdrawn
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090181169A1 (en) * | 1994-11-28 | 2009-07-16 | Asm America, Inc. | Method for growing thin films |
| US8507039B2 (en) | 1994-11-28 | 2013-08-13 | Asm America, Inc. | Method for growing thin films |
| US7498059B2 (en) * | 1994-11-28 | 2009-03-03 | Asm America, Inc. | Method for growing thin films |
| KR100481848B1 (en) * | 1998-12-15 | 2006-05-16 | 삼성전자주식회사 | Manufacturing method of dielectric film without chemical defect |
| JP2001068639A (en) * | 1999-06-28 | 2001-03-16 | Hyundai Electronics Ind Co Ltd | Semiconductor device and its manufacture |
| KR100547248B1 (en) * | 1999-11-12 | 2006-02-01 | 주식회사 하이닉스반도체 | A method for forming gate dielectric layer using alumina in semiconductor device |
| US7781326B2 (en) | 2001-02-02 | 2010-08-24 | Applied Materials, Inc. | Formation of a tantalum-nitride layer |
| US10280509B2 (en) | 2001-07-16 | 2019-05-07 | Applied Materials, Inc. | Lid assembly for a processing system to facilitate sequential deposition techniques |
| DE102008010041A1 (en) * | 2007-09-28 | 2009-04-02 | Osram Opto Semiconductors Gmbh | Layer deposition apparatus, e.g. for epitaxial deposition of compound semiconductor layers, has segmented process gas enclosure in which substrate is moved relative to partition |
| US9080237B2 (en) | 2007-09-28 | 2015-07-14 | Osram Opto Semiconductors Gmbh | Layer depositing device and method for operating it |
| JP2009147108A (en) * | 2007-12-14 | 2009-07-02 | Denso Corp | Semiconductor chip and manufacturing method thereof |
| US8425977B2 (en) | 2008-09-29 | 2013-04-23 | Applied Materials, Inc. | Substrate processing chamber with off-center gas delivery funnel |
| US8419855B2 (en) | 2008-09-29 | 2013-04-16 | Applied Materials, Inc. | Substrate processing chamber with off-center gas delivery funnel |
| JP2016129243A (en) * | 2016-02-25 | 2016-07-14 | 東京エレクトロン株式会社 | Deposition method |
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