JPH0529392A - Mounting method for bare chip with bump - Google Patents

Mounting method for bare chip with bump

Info

Publication number
JPH0529392A
JPH0529392A JP18486291A JP18486291A JPH0529392A JP H0529392 A JPH0529392 A JP H0529392A JP 18486291 A JP18486291 A JP 18486291A JP 18486291 A JP18486291 A JP 18486291A JP H0529392 A JPH0529392 A JP H0529392A
Authority
JP
Japan
Prior art keywords
adhesive
bare chip
mounting
chip
bumps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18486291A
Other languages
Japanese (ja)
Other versions
JP3131246B2 (en
Inventor
Hidehiko Kira
秀彦 吉良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18486291A priority Critical patent/JP3131246B2/en
Publication of JPH0529392A publication Critical patent/JPH0529392A/en
Application granted granted Critical
Publication of JP3131246B2 publication Critical patent/JP3131246B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/2902Disposition
    • H01L2224/29034Disposition the layer connector covering only portions of the surface to be connected
    • H01L2224/29036Disposition the layer connector covering only portions of the surface to be connected covering only the central area of the surface to be connected

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To improve a mounting accuracy by pressing a bare chip on adhesive flatly smoothed in an adhesive smoothing process to mount it. CONSTITUTION:After an adhesive coating process 1 for coating with adhesive, an adhesive smoothing process 20 for extending the adhesive and flatly smoothing it, is provided. In a bare chip mounting process 2, the chip is pressed on the flatly smoothed adhesive, and mounted. Thus, when the chip is pressed and mounted, a deviating force is not substantially operated at the chip, and hence a deviation of the chip from a position to be mounted therewith is eliminated and the chip can be accurately mounted.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はバンプを有するベアチッ
プを接着剤によって実装する方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting a bare chip having bumps with an adhesive.

【0002】バンプを有するベアチップは、下面の各バ
ンプを基板上のパッドと電気的に接続された状態で、基
板上に実装される。
A bare chip having bumps is mounted on a substrate with each bump on the lower surface electrically connected to a pad on the substrate.

【0003】近年、ベアチップ自体の大容量化等に伴っ
て、バンプのピッチが狭くなってきており、上記実装に
は許容誤差がミクロンオーダである精度が要求されてい
る。
In recent years, the pitch of bumps has become narrower along with the increase in capacity of bare chips themselves, and the above-mentioned mounting is required to have an accuracy of micron order tolerance.

【0004】[0004]

【従来の技術】図5及び図6は従来の実装方法を示す。2. Description of the Related Art FIGS. 5 and 6 show a conventional mounting method.

【0005】まず、接着剤塗布工程1を行う。First, the adhesive application step 1 is performed.

【0006】ここでは、図6(A)に示すように、例え
ば転写ピンを使用して、基板10上のベアチップ実装予
定部11に、エポキシ系の接着剤12を塗布する。
Here, as shown in FIG. 6A, an epoxy adhesive 12 is applied to the bare chip mounting portion 11 on the substrate 10 by using, for example, a transfer pin.

【0007】13はパッドであり、ベアチップ実装予定
部11の周囲に配設してある。
Reference numeral 13 is a pad, which is arranged around the bare chip mounting portion 11.

【0008】接着剤12を塗布した後、直ちにベアチッ
プ実装工程2を行う。
After applying the adhesive 12, the bare chip mounting step 2 is performed immediately.

【0009】この工程2は、光学的にパッド13の位置
を認識し、図6(B)に示すように、ベアチップ14を
吸着しているボンディングツール15を矢印Z方向に下
降させ、同図(C)に示すように、ベアチップ14の下
面14aの周囲部分のバンプ16が対応するパッド13
に押し当たるまで降ろすことにより行われる。
In this step 2, the position of the pad 13 is optically recognized, and as shown in FIG. 6 (B), the bonding tool 15 which holds the bare chip 14 is lowered in the arrow Z direction, As shown in C), the bumps 16 in the peripheral portion of the lower surface 14a of the bare chip 14 correspond to the corresponding pads 13
It is done by lowering it until it hits.

【0010】これにより、ベアチップ14は、図6
(D)に示すように、下面14a及びバルブ16の周囲
を接着されて、且つ各バンプ16をパッド13と電気的
に接続されて実装される。
As a result, the bare chip 14 has the structure shown in FIG.
As shown in (D), the lower surface 14a and the periphery of the bulb 16 are bonded together, and each bump 16 is electrically connected to the pad 13 for mounting.

【0011】[0011]

【発明が解決しようとする課題】ベアチップ実装工程2
において、図6(B)に示すように、ベアチップ14の
下面14aが接着剤12を押し潰してこれを矢印Aで示
すように側方に押し拡げる。
Bare chip mounting process 2
In FIG. 6B, the lower surface 14 a of the bare chip 14 crushes the adhesive 12 and spreads it laterally as indicated by arrow A.

【0012】接着剤12が側方へ押し拡げられる過程に
おいて、ベアチップ14には、接着剤12によって引き
づられるように矢印Bで示す側方の力が作用する。
In the process in which the adhesive 12 is spread laterally, a lateral force indicated by an arrow B acts on the bare chip 14 so that the bare chip 14 is pulled by the adhesive 12.

【0013】ところで、接着剤12は、実装状態でバン
プ16の部位まで回り込むだけの十分な量が盛り上がっ
た状態で塗布してあり、接着剤12の頂部12aの高さ
1 は比較的高い。
By the way, the adhesive 12 is applied in a state in which a sufficient amount to wrap around the bumps 16 in the mounted state is raised, and the height H 1 of the top 12a of the adhesive 12 is relatively high.

【0014】このため、実装のための下降時には、ベア
チップ14は、高さH1 から実装高さH2 に到る比較的
長い下降距離L1 (比較的長い時間)に亘って、接着剤
12によって矢印Bで示す側方の力を作用されることに
なる。
Therefore, at the time of descending for mounting, the bare chip 14 is adhesive 12 over a relatively long descending distance L 1 (relatively long time) from the height H 1 to the mounting height H 2. Therefore, the lateral force indicated by the arrow B is applied.

【0015】また、特に接着剤12が実装予定部11の
中心より極端にずれているような場合にあっては、ベア
チップ14は側方向上特定の方向の力を作用される。
In particular, when the adhesive 12 is extremely displaced from the center of the mounting portion 11, the bare chip 14 is laterally subjected to a force in a specific direction.

【0016】このため、実装の途中で、ベアチップ14
の上面14bがボンディングツール15に対して滑り、
図6(C)に示すように、ベアチップ14がボンディン
グツール15に対して矢印B方向にずれてしまうことが
ある。
Therefore, during mounting, the bare chip 14
The upper surface 14b of the
As shown in FIG. 6C, the bare chip 14 may be displaced with respect to the bonding tool 15 in the arrow B direction.

【0017】このようなずれが生ずると、図6(D)中
符合16-1で示すように、バンプがパッド13-1よりず
れてしまい、電気的接続が不完全となって実装不良とな
ってしまう。
When such a shift occurs, the bump shifts from the pad 13-1 as indicated by reference numeral 16-1 in FIG. 6 (D), resulting in incomplete electrical connection and defective mounting. Will end up.

【0018】近年、バンプ16及びパッド13のピッチ
が狭くなっており、上記のずれ量δが僅か数μm であっ
ても、実装不良となってしまうこともある。
In recent years, the pitch between the bumps 16 and the pads 13 has become narrower, and even if the amount of deviation .delta. Is only a few .mu.m, mounting defects may occur.

【0019】本発明は、実装の高精度化を実現したバン
プを有するベアチップの実装方法を提供することを目的
とする。
It is an object of the present invention to provide a bare chip mounting method having bumps that realizes high mounting accuracy.

【0020】[0020]

【課題を解決するための手段】請求項1の発明は、バン
プを有するベアチップを接着剤により基板に接着して該
バンプを該基板上のパッドに当接させて実装する方法に
おいて、該基板上のベアチップ実装予定領域に盛り上が
って塗布された接着剤を、拡げて平らにならす接着剤な
らし工程を有し、平らにならされた接着剤上に上記ベア
チップを押し付けて実装する構成としたものである。
According to a first aspect of the present invention, there is provided a method of mounting a bare chip having bumps on a substrate with an adhesive so that the bumps are brought into contact with pads on the substrate and mounted. The adhesive applied to the area where the bare chip is to be mounted is raised and leveled, and there is an adhesive leveling process in which the bare chip is pressed and mounted on the leveled adhesive. is there.

【0021】請求項2の発明は、請求項1の接着剤なら
し工程を、塗布された接着剤を覆う形状のノズルによっ
て該塗布された接着剤を覆った状態で、ガスを吹き付け
て行う構成としたものである。
According to a second aspect of the present invention, the adhesive leveling step of the first aspect is performed by blowing gas while the applied adhesive is covered by a nozzle having a shape that covers the applied adhesive. It is what

【0022】[0022]

【作用】請求項1の接着剤ならし工程によって平らにな
らされた接着剤は、ベアチップの実装時にベアチップに
ずれ力の発生を抑制するように作用する。
The adhesive leveled out by the adhesive leveling step of the first aspect acts so as to suppress the generation of a displacement force on the bare chip when the bare chip is mounted.

【0023】請求項2のノズルは、接着剤の周囲への不
要な飛散を制限するように作用する。
The nozzle of the second aspect functions to limit unnecessary splashing of the adhesive to the surroundings.

【0024】[0024]

【実施例】図1及び図2は本発明のバンプを有するベア
チップの実装方法の一実施例を示す。
1 and 2 show an embodiment of a method for mounting a bare chip having bumps according to the present invention.

【0025】各図中、図5及び図6と同一部分には同一
符合を付し、その説明は省略する。
In each figure, the same parts as those in FIGS. 5 and 6 are designated by the same reference numerals, and the description thereof will be omitted.

【0026】図1中、20は接着剤ならし工程であり、
接着剤塗布工程1の次に設けてある。
In FIG. 1, 20 is an adhesive leveling process,
It is provided after the adhesive application step 1.

【0027】ここでは、図2(A)に示すように盛り上
がって塗布された接着剤12を、ベアチップ実装予定領
域11全体に亘ってパッド13の近傍まで拡げてなら
す。
Here, as shown in FIG. 2A, the adhesive 12 that is raised and applied is spread over the entire bare chip mounting area 11 to the vicinity of the pad 13.

【0028】これにより、接着剤12は符合12Aで示
す如くになる。
As a result, the adhesive 12 becomes as indicated by reference numeral 12A.

【0029】接着剤12Aは、厚さt1 が約80μm 程
度となり、上面12Aaは実装高さH2 より若干高い位
置にあり、ベアチップ実装領域11の略全体に亘る比較
的広い面積S1 を有し、且つ平坦である。
The adhesive 12A has a thickness t 1 of about 80 μm, the upper surface 12Aa is slightly higher than the mounting height H 2 , and has a relatively large area S 1 over substantially the entire bare chip mounting area 11. And is flat.

【0030】この後、ベアチップ実装工程2を行う。Thereafter, bare chip mounting step 2 is performed.

【0031】ベアチップ実装工程2は、従来と同様に、
図2(C),(D)に示すように、ベアチップ14が吸
着されたボンディングツール15を矢印Z方向に下降す
ることにより行われる。
In the bare chip mounting step 2, as in the conventional case,
As shown in FIGS. 2C and 2D, the bonding tool 15 to which the bare chip 14 is adsorbed is lowered in the arrow Z direction.

【0032】ベアチップ14は、実装高さH2 の極く近
い高さH3 まで下降された時点で、接着剤12Aに接触
し、その後、実装高さH2 まで下降する過程で接着剤1
2Aを押し拡げる。
The bare chip 14, when it is lowered to very close height H 3 of the mounting height H 2, into contact with the adhesive 12A, then, the adhesive 1 in the process of descending mounted to a height H 2
Push 2A apart.

【0033】従って、接着剤12Aを押し拡げる動作を
伴うボンディングツール15の下降距離L2 は、従来に
比べて格段に短い。
Therefore, the descending distance L 2 of the bonding tool 15 accompanied by the operation of spreading the adhesive 12A is much shorter than the conventional one.

【0034】しかも、ベアチップ14の下面14aは、
最初から広い面積が接着剤12Aに接触し、ベアチップ
14には傾斜する方向の力は作用しない。
Moreover, the lower surface 14a of the bare chip 14 is
A large area comes into contact with the adhesive 12A from the beginning, and no force in a tilting direction acts on the bare chip 14.

【0035】このため、ベアチップ14をボンディング
ツール15に対してずらすような力は殆ど生ぜず、ベア
チップ14はボンディングツール15に対して全くずれ
ない。
Therefore, there is almost no force that displaces the bare chip 14 with respect to the bonding tool 15, and the bare chip 14 is not displaced with respect to the bonding tool 15 at all.

【0036】この結果、ベアチップ14は、図2(D)
に示すように、実装予定位置に精度良く位置決めされ、
バンプ16は対応するパッド13に正常に当接する。
As a result, the bare chip 14 is formed as shown in FIG.
As shown in, it is accurately positioned at the planned mounting position,
The bump 16 normally abuts the corresponding pad 13.

【0037】接着剤12Aは、ボンディングツール15
により加熱されて、符合12Bで示すように、バンプ1
6の部分まで回り込んだ状態となる。
The adhesive 12A is the bonding tool 15
Is heated by the bump 1 as shown by reference numeral 12B.
It will be in the state of wrapping around to part 6.

【0038】この後、接着剤12Bは熱硬化され、符合
12Cで示す如くになり、ベアチップ14は、図2
(E)に示すように、各バンプ16を対応するパッド1
3と確実に電気的に接続されて、基板10上に実装され
る。
After that, the adhesive 12B is heat-cured to be as shown by the reference numeral 12C, and the bare chip 14 is formed as shown in FIG.
As shown in (E), each bump 16 has a corresponding pad 1
3 is securely electrically connected and mounted on the substrate 10.

【0039】次に、上記の接着剤ならし工程について説
明する。
Next, the above-mentioned adhesive leveling step will be described.

【0040】図3に示すように、治具30を矢印31方
向に往復移動させることによって、接着剤12はならさ
れる。
As shown in FIG. 3, the adhesive 12 is smoothed by reciprocating the jig 30 in the direction of the arrow 31.

【0041】また、図4に示すように、ベアチップ実装
領域11に対応する大きさを有する特殊形状のノズル3
2によって接着剤12を覆った状態で、例えば空気33
を吹き付けることによっても、接着剤12はならされ
る。
Further, as shown in FIG. 4, the nozzle 3 having a special shape having a size corresponding to the bare chip mounting area 11 is formed.
2 with the adhesive 12 covered, for example air 33
The adhesive 12 is also smoothed by spraying.

【0042】後者の方法によれば、接着剤12が周囲に
飛散することが防止され、パッド13上に接着剤12が
付着することがない。
According to the latter method, the adhesive 12 is prevented from scattering around and the adhesive 12 does not adhere to the pad 13.

【0043】パッド13上に接着剤12が付着すると、
実装に際してのパッド13の光学的認識に誤りを生ずる
虞れがある。
When the adhesive 12 adheres to the pad 13,
There is a possibility that an error may occur in the optical recognition of the pad 13 at the time of mounting.

【0044】しかし、上記の方法によれば、パッド13
に接着剤12は付着しないため、実装に際してのパッド
13の光学的認識は誤りなく行われ、この点からも、ベ
アチップ実装精度は何ら損なわれない。
However, according to the above method, the pad 13
Since the adhesive 12 does not adhere to the pad, the optical recognition of the pad 13 at the time of mounting is performed without error, and from this point also, the bare chip mounting accuracy is not impaired.

【0045】また、上記のベアチップ14のバンプ16
はAu製のものである。
The bump 16 of the bare chip 14 is also used.
Is made of Au.

【0046】[0046]

【発明の効果】以上説明した様に、請求項1の発明によ
れば、ベアチップを押し付けて実装するときに、ベアチ
ップにずれ力が殆ど作用しないため、ベアチップを実装
予定位置よりのずれを無くして高精度に実装することが
出来る。
As described above, according to the first aspect of the invention, when the bare chip is pressed and mounted, the bare chip is hardly displaced, so that the bare chip is not displaced from the planned mounting position. It can be mounted with high accuracy.

【0047】請求項2の発明によれば、接着剤がパッド
に付着しないため、実装に際して行うパッドの光学的認
識精度が損なわれることが無く、この点からもベアチッ
プを位置精度良く実装することが出来る。
According to the second aspect of the present invention, since the adhesive does not adhere to the pad, the optical recognition accuracy of the pad during mounting is not impaired. From this point as well, the bare chip can be mounted with high positional accuracy. I can.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のバンプを有するベアチップの実装方法
の一実施例の工程図である。
FIG. 1 is a process drawing of an example of a method for mounting a bare chip having bumps according to the present invention.

【図2】図1の各工程の状態を示す図である。FIG. 2 is a diagram showing a state of each step of FIG.

【図3】接着剤ならし工程を行う1例を示す図である。FIG. 3 is a diagram showing an example of performing an adhesive smoothing step.

【図4】接着剤ならし工程を行う別の例を示す図であ
る。
FIG. 4 is a diagram showing another example of performing an adhesive leveling step.

【図5】従来のバンプを有するベアチップの実装方法の
1例を示す工程図である。
FIG. 5 is a process chart showing an example of a conventional bare chip mounting method having bumps.

【図6】図5の各工程の状態を示す図である。FIG. 6 is a diagram showing a state of each step of FIG.

【符号の説明】[Explanation of symbols]

1 接着剤塗布工程 2 ベアチップ実装工程 10 基板 11 ベアチップ実装予定領域 12 接着剤 12A ならされた接着剤 12Aa 平坦で比較的広い面積S1 を有する上面 12B 押し拡がった接着剤 12C 熱硬化された接着剤 13 パッド 14 ベアチップ 14a 下面 15 ボンディングツール 16 バンプ 20 接着剤ならし工程 30 治具 32 ノズル 33 空気DESCRIPTION OF SYMBOLS 1 Adhesive applying step 2 Bare chip mounting step 10 Substrate 11 Bare chip mounting area 12 Adhesive 12A Leveled adhesive 12Aa Flat upper surface 12B having a relatively large area S 1 Spreading adhesive 12C Heat cured adhesive 13 pad 14 bare chip 14a lower surface 15 bonding tool 16 bump 20 adhesive leveling process 30 jig 32 nozzle 33 air

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 バンプを有するベアチップを接着剤によ
り基板に接着して該バンプを該基板上のパッドに当接さ
せて実装する方法において、 該基板(10)上のベアチップ実装予定領域(11)に
盛り上がって塗布された接着剤(12)を、拡げて平ら
にならす接着剤ならし工程(20)を有し、 平らにならされた接着剤(12A)上に上記ベアチップ
(14)を押し付けて実装する構成としたことを特徴と
するバンプを有するベアチップの実装方法。
1. A bare chip mounting area (11) on a substrate (10), comprising: mounting a bare chip having bumps on a substrate with an adhesive and bringing the bumps into contact with pads on the substrate. There is an adhesive leveling step (20) for spreading and leveling the adhesive (12) raised and applied to the bare chip (14) by pressing the bare chip (14) on the leveled adhesive (12A). A method of mounting a bare chip having bumps, which is characterized in that it is mounted.
【請求項2】 請求項1の接着剤ならし工程は、塗布さ
れた接着剤(12)を覆う形状のノズル(32)によっ
て該塗布された接着剤(12)を覆った状態で、ガス
(33)を吹き付けて行う構成としたことを特徴とする
バンプを有するベアチップの実装方法。
2. The adhesive smoothing step according to claim 1, wherein the applied adhesive (12) is covered with a gas (32) by a nozzle (32) having a shape to cover the applied adhesive (12). 33) A method of mounting a bare chip having bumps, characterized in that it is configured by spraying.
JP18486291A 1991-07-24 1991-07-24 Mounting method of bare chip having bump Expired - Fee Related JP3131246B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18486291A JP3131246B2 (en) 1991-07-24 1991-07-24 Mounting method of bare chip having bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18486291A JP3131246B2 (en) 1991-07-24 1991-07-24 Mounting method of bare chip having bump

Publications (2)

Publication Number Publication Date
JPH0529392A true JPH0529392A (en) 1993-02-05
JP3131246B2 JP3131246B2 (en) 2001-01-31

Family

ID=16160611

Family Applications (1)

Application Number Title Priority Date Filing Date
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998030073A1 (en) * 1996-12-27 1998-07-09 Matsushita Electric Industrial Co., Ltd. Method and device for mounting electronic component on circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998030073A1 (en) * 1996-12-27 1998-07-09 Matsushita Electric Industrial Co., Ltd. Method and device for mounting electronic component on circuit board
US6981317B1 (en) 1996-12-27 2006-01-03 Matsushita Electric Industrial Co., Ltd. Method and device for mounting electronic component on circuit board

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