JPH05291218A - Manufacture of resin-sealed semiconductor device - Google Patents

Manufacture of resin-sealed semiconductor device

Info

Publication number
JPH05291218A
JPH05291218A JP4085789A JP8578992A JPH05291218A JP H05291218 A JPH05291218 A JP H05291218A JP 4085789 A JP4085789 A JP 4085789A JP 8578992 A JP8578992 A JP 8578992A JP H05291218 A JPH05291218 A JP H05291218A
Authority
JP
Japan
Prior art keywords
resin
chip
sealing
semiconductor chip
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4085789A
Other languages
Japanese (ja)
Inventor
Tomoaki Takubo
知章 田窪
Mamoru Sasaki
衛 佐々木
Hideko Mukoda
秀子 向田
Masao Mochizuki
正生 望月
Yasuhiro Yamaji
泰弘 山地
Hideo Ota
英男 太田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP4085789A priority Critical patent/JPH05291218A/en
Priority to KR1019930005371A priority patent/KR0124494B1/en
Publication of JPH05291218A publication Critical patent/JPH05291218A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Wire Bonding (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To provide a resin-sealed semiconductor device wherein its reliability is high and it is large-sized and thin by a method wherein a chip is made ultrathin without destroying the chip. CONSTITUTION:Resin sheets 5, P for sealing use are pasted on the active-face side of a semiconductor chip 3 which has been mounted on a lead constituent body 1 including a plurality of leads; they are pressurized and molded integrally; after that, the rear of the chip 3 is polished down to a desired thickness. Desirably, resin sheets P, 5 for sealing use are fixed and bonded integrally to the rear side of the chip as desired after that.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は樹脂封止型半導体装置の
製造方法に係り、特に超薄型のチップを用いた樹脂封止
型半導体装置の形成に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a resin-encapsulated semiconductor device, and more particularly to the formation of a resin-encapsulated semiconductor device using an ultrathin chip.

【0002】[0002]

【従来の技術】近年半導体装置の高集積化に伴うチップ
の大型化によって、樹脂封止型半導体装置のパッケ―ジ
の大型化が進む一方、実装スペースの微細化にともない
薄型化の傾向を強めており、この傾向は今後益々強くな
っていくと考えられる。また、パッケ―ジの種類も今後
益々多様化し、従来のトランスファ成型法で十分な対応
ができなくなってきている。このような状況の中で、多
品種少量生産ができるフレキシブルな生産様式の開発が
望まれている。
2. Description of the Related Art In recent years, as semiconductor devices have become highly integrated and chips have become larger, packaging of resin-encapsulated semiconductor devices has become larger. This tendency is expected to grow stronger in the future. In addition, the types of packages are diversifying in the future, and the conventional transfer molding method is no longer sufficient. Under such circumstances, it is desired to develop a flexible production mode capable of high-mix low-volume production.

【0003】例えば、近年の半導体集積回路技術の進歩
は、マイクロプロセッサとその外部とのデータ転送量お
よびスピードの増大への要求を強くしておりこの要求に
いかに応えるかが、マイクロプロセッサを用いたシステ
ムの動作スピード、能力を上げるための重要な課題であ
るといえる。このために従来から、ウェハスケールイン
テグレーションやマルチチップモジュールなどの高密度
実装技術等の開発が行われているがいずれもメモリチッ
プやロジックチップを2次元平面上に高密度に実装する
技術である。たとえばメモリチップを2次元平面上に高
密度に実装した場合マイクロプロッセッサからの距離が
近いチップと遠いチップとが存在するため、遠いチップ
からマイクロプロセッサまでの信号遅延時間がマイクロ
プロセッサとメモリチップとのデータ転送スピードを律
速することになる。この問題を解決するための技術とし
てメモリチップやパッケージを3次元状に厚さ方向に積
層する方法が提案されている。この場合できるだけ多く
のチップを配置するためにはパッケージはもとよりチッ
プの薄型化が必要となる。
For example, recent advances in semiconductor integrated circuit technology have made strong demands for an increase in the amount of data transfer and speed between the microprocessor and its outside, and how to meet this demand was the use of microprocessors. It can be said that this is an important issue for improving the operating speed and ability of the system. For this reason, conventionally, high-density mounting technology such as wafer scale integration and multi-chip module has been developed, but all of them are technologies for high-density mounting of memory chips and logic chips on a two-dimensional plane. For example, when memory chips are densely mounted on a two-dimensional plane, there are chips that are close to the microprocessor and chips that are far from the microprocessor. Therefore, the signal delay time from the distant chip to the microprocessor is different from that of the microprocessor and the memory chip. Will limit the data transfer speed. As a technique for solving this problem, a method of stacking memory chips and packages three-dimensionally in the thickness direction has been proposed. In this case, in order to arrange as many chips as possible, not only the package but also the chips need to be thin.

【0004】ところで従来、樹脂封止型半導体装置はト
ランスファ成型法によって得られていた。この方法は、
エポキシ樹脂および充填剤などを主体としたエポキシ成
型材料等、未硬化の熱硬化性樹脂を、加熱して溶融さ
せ、トランスファ―成型機を用いて金型に注入し、高温
高圧状態(160〜180℃,70〜100kg/c
m2)で成型して、硬化することにより、フィルムキャリ
アやリードフレーム等の実装部材に搭載された半導体チ
ップを封止する方法である。この方法で形成される樹脂
封止型半導体装置は、図15(a) および(b) に示すよう
に半導体チップ34をエポキシ樹脂組成物35が完全に
覆うため、信頼性に優れており、また金型で緻密に成型
するため、パッケ―ジの外観も良好であることから、現
在ではほとんどの樹脂封止型半導体装置はこの方法で製
造されている。ここで31はリード、32はダイパッ
ド、33はボンディングワイヤである。
By the way, conventionally, resin-sealed semiconductor devices have been obtained by a transfer molding method. This method
An uncured thermosetting resin such as an epoxy molding material mainly composed of an epoxy resin and a filler is heated and melted, and then poured into a mold using a transfer molding machine to obtain a high temperature and high pressure state (160 to 180). ℃, 70-100kg / c
It is a method of sealing a semiconductor chip mounted on a mounting member such as a film carrier or a lead frame by molding with m 2 ) and curing. The resin-encapsulated semiconductor device formed by this method is excellent in reliability because the semiconductor chip 34 is completely covered with the epoxy resin composition 35 as shown in FIGS. 15 (a) and (b). Since the package is finely molded and the appearance of the package is good, most resin-sealed semiconductor devices are currently manufactured by this method. Here, 31 is a lead, 32 is a die pad, and 33 is a bonding wire.

【0005】しかしながら、未硬化の熱硬化性樹脂をト
ランスファ成型器の金型に注入する方法では薄型の実装
は困難である。
However, it is difficult to mount a thin type by the method of injecting the uncured thermosetting resin into the mold of the transfer molding machine.

【0006】また、このようなパッケージをプリント基
板上に実装する場合、プリント基板のパッドに半田ぺー
ストをスクリーン印刷し、位置合わせ後にパッケージを
搭載してリフローすることにより固着するという方法が
とられる。この場合個々のリードを半田付けするのとは
異なり、リフロー時にはパッケージを含めた基板全体が
加熱されることになる。チップサイズが大きくなると、
このように全体が200℃以上の高温にさらされること
により、封止樹脂35内部に吸湿された水分がダイパッ
ド32の下側にある封止樹脂およびチップの上側にある
封止樹脂にクラックを発生させるという問題があった。
この樹脂クラックはボンディングワイヤの切断を招いた
り半導体チップの耐湿性を劣化させ、その結果半導体装
置の信頼性を著しく劣化させる。
Further, when mounting such a package on a printed circuit board, a method of screen-printing a solder paste on a pad of the printed circuit board, mounting the package after alignment, and fixing the package by reflowing is used. . In this case, unlike soldering individual leads, the entire substrate including the package is heated during reflow. As the chip size increases,
By thus exposing the whole to a high temperature of 200 ° C. or higher, moisture absorbed inside the sealing resin 35 causes cracks in the sealing resin below the die pad 32 and the sealing resin above the chip. There was a problem of letting it.
The resin cracks cause cutting of the bonding wires and deteriorate the moisture resistance of the semiconductor chip, resulting in a marked deterioration of the reliability of the semiconductor device.

【0007】このように、従来のトランスファ用エポキ
シ成型材料は、種々の改良にもかかわらず、電子機器の
小型化薄型化の流れに対応していくのは極めて困難であ
った。 このようにパッケージすなわち封止樹脂層の薄
型化に伴い、チップの厚さも半導体装置全体の厚さを大
きく左右することになるため、チップの薄型化が必要と
なってくる。
As described above, it has been extremely difficult for the conventional epoxy molding material for transfer to cope with the trend of miniaturization and thinning of electronic equipment, despite various improvements. In this way, as the package, that is, the sealing resin layer is made thinner, the thickness of the chip also largely influences the thickness of the entire semiconductor device, so that it becomes necessary to make the chip thinner.

【0008】[0008]

【発明が解決しようとする課題】このようにチップの薄
型化、大型化が更に進むと次のような課題が生じてく
る。すなわちチップの大きさが2cm角を越え、チップの
厚さを200μm 以下とすることにより超薄型の半導体
装置を形成しようとすると、チップの機械的強度が十分
に大きくないため、封止に際してチップ破壊を生じやす
いという問題がある。これはチップを薄くしようとする
場合にさらに顕著となる根本的な課題である。
As the chip becomes thinner and larger, the following problems will occur. That is, if an attempt is made to form an ultra-thin semiconductor device by making the chip size over 2 cm square and making the chip thickness 200 μm or less, the mechanical strength of the chip is not sufficiently large. There is a problem that destruction is likely to occur. This is a fundamental problem that becomes even more prominent when thinning the chip.

【0009】本発明は、前記実情に鑑みてなされたもの
で、チップ破壊を生じることなくチップを超薄型にし、
信頼性の高い大型でかつ薄型の樹脂封止型半導体装置を
提供することを目的とする。
The present invention has been made in view of the above circumstances, and makes the chip ultra-thin without causing chip breakage,
An object of the present invention is to provide a highly reliable, large-sized and thin resin-encapsulated semiconductor device.

【0010】[0010]

【課題を解決するための手段】そこで本発明では、複数
のリードを含むリード構成体に搭載された半導体チップ
の能動面側に封止用樹脂シートを貼着し一体的に加圧成
型したのち、このチップ裏面から所望の厚さまで研磨す
るようにしている。
Therefore, according to the present invention, a sealing resin sheet is attached to the active surface side of a semiconductor chip mounted on a lead structure including a plurality of leads and integrally molded under pressure. The chip back surface is polished to a desired thickness.

【0011】そしてさらに、この後必要に応じてチップ
裏面側にも封止用樹脂シートを一体的に固着する。
Further, thereafter, a sealing resin sheet is integrally fixed to the back surface of the chip, if necessary.

【0012】ここで封止用樹脂シートとしては、樹脂を
硬化する前のシート状体、例えばガラス繊維等の基体に
樹脂を含浸させたいわゆるプリプレグなどを含めた未架
橋部分を残したシート状体を出発材料として用いること
ができ、半導体チップと共に積層後、硬化成型される。
Here, the sealing resin sheet is a sheet-shaped body before the resin is cured, for example, a sheet-shaped body including an uncrosslinked portion including a so-called prepreg obtained by impregnating a substrate such as glass fiber with the resin. Can be used as a starting material and is cured and molded after being laminated with a semiconductor chip.

【0013】半導体チップの研磨方法としては、機械的
研削法を用いてもよいし、化学的蝕刻法を用いても良
い。
As a method for polishing the semiconductor chip, a mechanical grinding method or a chemical etching method may be used.

【0014】またここで硬化方法としては、熱硬化性樹
脂を加熱して架橋させ硬化させる方法、光硬化性樹脂を
光照射して架橋させ硬化させる方法を用いることがで
き、金型内で一旦溶融させ架橋により硬化させる他、所
望であれば界面のみを溶融させ加圧状態で硬化させ固着
するようにしてもよい。また金型を用い、誘導加熱によ
り樹脂のみを選択的に加熱するようにしてもよい。
As the curing method, a method of heating a thermosetting resin to crosslink and cure it, or a method of irradiating a photocurable resin with light to crosslink and cure it can be used. In addition to melting and curing by cross-linking, if desired, only the interface may be melted and cured under pressure to be fixed. Alternatively, a mold may be used to selectively heat only the resin by induction heating.

【0015】本発明で使用されるリード構成体の材質、
形状機能は、特に制限されない。封止用樹脂シ―トの材
質については、未硬化の光および熱硬化性樹脂、熱可塑
性樹脂、エンジニアリングプラスチックスなどの樹脂素
材を使用してもよいが、一体成型時の樹脂粘度が低いほ
ど緻密な封止を行うことができる。
The material of the lead structure used in the present invention,
The shape function is not particularly limited. Regarding the material of the sealing resin sheet, resin materials such as uncured light and thermosetting resin, thermoplastic resin, and engineering plastics may be used, but the lower the resin viscosity when integrally molded, Dense sealing can be performed.

【0016】例えば、熱硬化性樹脂としては、エポキシ
樹脂、ポリイミド樹脂、マレイミド樹脂、シリコ―ン樹
脂、フェノ―ル樹脂、ポリウレタン樹脂、アクリル樹脂
などが挙げられる。光硬化性樹脂としては、アクリレー
ト系、ジアゾニウム系、ジアジド系、また感光性低分子
である重クロム酸系、イオウ化合物系などがある。これ
らの樹脂は単独で用いても、組み合わせてもよく、また
これらの樹脂の中に硬化剤、触媒、可塑剤、着色剤、難
燃化剤、充填剤、その他各種添加剤を含有したものでも
よい。
Examples of the thermosetting resin include epoxy resin, polyimide resin, maleimide resin, silicone resin, phenol resin, polyurethane resin and acrylic resin. Examples of the photocurable resin include acrylate type, diazonium type, diazide type, dichromic acid type which is a photosensitive low molecule, and sulfur compound type. These resins may be used alone or in combination, and those containing a curing agent, a catalyst, a plasticizer, a colorant, a flame retardant, a filler, and other various additives in these resins may also be used. Good.

【0017】本発明において用いられる封止用樹脂シ―
トは、例えば以下のような方法で作成することができ
る。エポキシ樹脂、硬化剤、触媒、シリカ粉末、その他
の材料を粉砕、混合して、アセトンなどの溶剤に溶解し
て濃度調整を行い、ローラにかける等して金型をしてそ
のまま放置する、加熱する、又は減圧下におく等の方法
により、溶媒を揮発させるか、あるいはガラス織布等の
織布に、この溶液を塗布するか、溶液中にガラス織布を
含浸させ、放置する、加熱する、又は減圧下におく等の
方法により、溶媒を揮発させプリプレグを作製すること
ができる。
The sealing resin sheet used in the present invention
Can be created by the following method, for example. Epoxy resin, curing agent, catalyst, silica powder, and other materials are crushed and mixed, dissolved in a solvent such as acetone to adjust the concentration, and then placed on a roller to leave a mold and leave it as is. The solvent is volatilized, or the solution is applied to a woven cloth such as a glass woven cloth, or the glass woven cloth is impregnated in the solution and left standing or heated. Alternatively, the solvent can be volatilized to prepare a prepreg by a method such as placing under reduced pressure.

【0018】また、織布の材質としては無機系ではガラ
ス、石英、炭素繊維、炭化ケイ素、窒化ケイ素、窒化ア
ルミニウム、アルミナ、ジルコニア、チタン酸カリウム
繊維などがあり、有機系ではナイロン系、アクリル系、
ビニロン系、ポリ塩化ビニル系、ポリエステル系、アラ
ミド系、フェノ―ル系、レ―ヨン系、アセテ―ト系、
綿、麻、絹、羊毛などがある。これらを単独で用いて
も、組み合わせて用いてもよい。
As the material of the woven cloth, inorganic materials include glass, quartz, carbon fiber, silicon carbide, silicon nitride, aluminum nitride, alumina, zirconia, potassium titanate fiber, etc., and organic materials such as nylon and acrylic. ,
Vinylon type, polyvinyl chloride type, polyester type, aramid type, phenol type, rayon type, acetate type,
There are cotton, linen, silk and wool. These may be used alone or in combination.

【0019】加圧硬化させる工程においては、ボイドの
発生を防止し、空気の膨脹によるパッケージクラックの
発生を防止するために、金型内を減圧することが望まし
い。さらに、成型後に封止樹脂の各種特性を向上するた
めに、アフタ―キュアを行うことが望ましい。
In the pressure-hardening step, it is desirable to reduce the pressure in the mold in order to prevent the generation of voids and the generation of package cracks due to the expansion of air. Further, after-curing is desirable to improve various characteristics of the sealing resin after molding.

【0020】[0020]

【作用】本発明によれば、半導体チップを薄く研磨する
に先立ち、複数のリードを含むリード構成体に接続しさ
らに、能動面側を封止用樹脂シートで加圧成型して固定
し、研磨するようにしているため、封止等の取扱い際し
てチップが破壊することなく薄型に加工される。
According to the present invention, prior to thinly polishing a semiconductor chip, the semiconductor chip is connected to a lead structure including a plurality of leads, and the active surface side is pressure-molded and fixed with a sealing resin sheet, followed by polishing. Therefore, the chip is processed into a thin shape without breaking during handling such as sealing.

【0021】またこの方法によれば極めて薄型でかつ裏
面を露呈せしめた封止形状を得ることができ、放熱性が
高いものとなる。
Further, according to this method, it is possible to obtain an extremely thin sealed shape in which the back surface is exposed, and the heat dissipation is high.

【0022】従来のトランスファ成型法では、半導体チ
ップの裏面を露呈させるのに、金型にグリース等を用い
てチップを貼着しておき、成型後外す等の方法を駆使し
ているが、取扱いが繁雑であるうえ、樹脂の回り込みを
生じ易く、良好な封止形状を得ることができなかったの
に対し、本発明の封止用樹脂シートを用いた方法によれ
ば、極めて緻密でかつ熱膨張率がチップに近い状態でチ
ップの能動面側を良好に保護することができるため、裏
面の研磨に際しても十分にこの封止状態を維持すること
ができる。
In the conventional transfer molding method, in order to expose the back surface of the semiconductor chip, a method is used in which the chip is pasted with a mold or the like using grease and then removed after molding. In addition to being complicated, it was not possible to obtain a good sealing shape due to the wraparound of the resin, whereas the method using the sealing resin sheet of the present invention was extremely dense and Since the active surface side of the chip can be well protected in a state where the expansion coefficient is close to that of the chip, this sealed state can be sufficiently maintained even when polishing the back surface.

【0023】従って化学的蝕刻法を用いる場合にも封止
用樹脂シートは良好な保護効果を発揮し、半導体チップ
裏面のみが選択的にエッチングされる。また化学的蝕刻
法を用いる場合には半導体チップのみが選択的にエッチ
ングされるため、封止用樹脂シートに凹部が形成され
る。この凹部に樹脂を充填するかあるいはチップの大き
さに相当する封止用樹脂シートを埋め込んで硬化成型す
るようにすれば極めて薄型のパッケージ形成が可能であ
る。また、この凹部に金属箔等を埋め込むようにしても
よい。
Therefore, even when the chemical etching method is used, the encapsulating resin sheet exerts a good protective effect, and only the back surface of the semiconductor chip is selectively etched. Further, when the chemical etching method is used, only the semiconductor chip is selectively etched, so that the recess is formed in the sealing resin sheet. An extremely thin package can be formed by filling the recess with resin or embedding a sealing resin sheet corresponding to the size of the chip and curing and molding. Further, a metal foil or the like may be embedded in this recess.

【0024】また機械的研削法を用いる場合にも封止用
樹脂シートによって極めて良好に固定されているため十
分に機械的応力に耐えることができ、裏面に半導体チッ
プの裏面が露呈した状態で薄型に形成されるため、この
まま放熱板上に載置して実装しても良い。
Even when the mechanical grinding method is used, the resin sheet for encapsulation is extremely well fixed so that it can sufficiently withstand mechanical stress and is thin when the back surface of the semiconductor chip is exposed. Therefore, it may be mounted and mounted on the heat dissipation plate as it is.

【0025】さらにこのように裏面が露呈した状態の半
導体装置を封止用樹脂シートを挾んで複数個積層し圧縮
硬化させるようにすれば、半導体チップの破壊あるいは
ボンディング不良等を生じることなく良好に封止するこ
とができ、歩留まりが向上する。
Further, if a plurality of semiconductor devices whose back surfaces are exposed are sandwiched between encapsulating resin sheets and compression-hardened, the semiconductor chips can be satisfactorily prevented from being broken or defective in bonding. It can be sealed and the yield is improved.

【0026】また本発明の樹脂封止型半導体装置は、製
造工程のインライン化により自動的に製造を行うことが
できる。このように本発明によれば、製造工程の簡略化
が可能となり、長期にわたって良好な信頼性を保持する
ことができる。
Further, the resin-encapsulated semiconductor device of the present invention can be automatically manufactured by making the manufacturing process in-line. As described above, according to the present invention, the manufacturing process can be simplified, and good reliability can be maintained for a long period of time.

【0027】本発明において、半導体チップを載置する
フィルムキャリア、リードフレームなどのリード構成体
およびプリプレグは、リ―ル方式で供給することができ
る。両者がそれぞれ対応するようにリ―ルで供給し、合
体、封止することにより、半導体デバイスの封止工程を
完全にインライン化することができ、半導体装置のアセ
ンブリから封止までを連続工程で行うことができる。こ
れは、従来のトランスファ成型法ではバッチ処理によら
なければならなかったのに比べ、決定的に有利な点であ
る。
In the present invention, the film carrier on which the semiconductor chip is mounted, the lead structure such as the lead frame, and the prepreg can be supplied by a reel system. By supplying with a reel so that both correspond to each other, and combining and sealing, it is possible to completely inline the sealing process of the semiconductor device, and from the assembly of the semiconductor device to the sealing in a continuous process. It can be carried out. This is a decisive advantage over the conventional transfer molding method, which required batch processing.

【0028】封止工程がインライン化できることによ
り、本発明の製造方法は多品種少量生産に適したフレキ
シブルな製造方法となる。
Since the sealing process can be performed in-line, the manufacturing method of the present invention becomes a flexible manufacturing method suitable for high-mix low-volume production.

【0029】本発明の構造は、機械的強度が高いことか
ら、半導体パッケ―ジが薄く、チップ面積が大きく、か
つ表面実装用の半導体装置に最適である。
Since the structure of the present invention has high mechanical strength, it is suitable for a semiconductor device for surface mounting, which has a thin semiconductor package and a large chip area.

【0030】望ましくは繊維に樹脂を含浸させたプリプ
レグで封止用樹脂シートを構成するようにすればさらに
機械的強度が向上する。
Desirably, the prepreg in which the fibers are impregnated with the resin constitutes the encapsulating resin sheet to further improve the mechanical strength.

【0031】[0031]

【実施例】以下、本発明の実施例について図面を参照し
つつ詳細に説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0032】実施例1 本発明の第1の実施例の樹脂封止型半導体装置の製造工
程の概要図を図1に示す。また図2乃至図5はこの工程
中で用いられる部材および封止の要部拡大図、図6(a)
および(b) はこの方法で形成された樹脂封止型半導体装
置を示す図である。また、この樹脂封止型半導体装置の
樹脂封止に用いられる封止装置を図7および図8に示
す。
Example 1 FIG. 1 shows a schematic view of a manufacturing process of a resin-sealed semiconductor device of a first example of the present invention. Further, FIGS. 2 to 5 are enlarged views of main parts of members and sealing used in this step, and FIG.
And (b) are views showing a resin-sealed semiconductor device formed by this method. 7 and 8 show a sealing device used for resin sealing of this resin-sealed semiconductor device.

【0033】製造に際してはまず、フェノールノボラッ
クタイプのエポキシ樹脂100部、UV硬化性アクリレ
ート20部、硬化剤としてジシアンジアミド6部、充填
材としてシリカを300部、および触媒としてベンジル
ジメチルアミン0.5部をメチルセロソルブ100部に
溶解してワニスを調整する。このようにして得られたエ
ポキシ含浸ワニスをガラスクロス4に浸漬した後、風乾
し、乾燥機中で、80℃×4時間の加熱乾燥を行い、厚
さ1000μm の封止用樹脂シートを形成し、これを1
3×13mmにカットして、図2(a) および(b) に上面図
および断面図を示すようにガラスクロス4の両面に樹脂
層5の形成された封止用樹脂シートPを作成した。そし
てさらに図3に示すようにこの封止用樹脂シートPと同
じ形状の銅箔6を形成し、2枚の封止用樹脂シートPの
間に銅箔6を挟む。
In the production, first, 100 parts of a phenol novolac type epoxy resin, 20 parts of a UV curable acrylate, 6 parts of dicyandiamide as a curing agent, 300 parts of silica as a filler, and 0.5 part of benzyldimethylamine as a catalyst. Dissolve in 100 parts of methyl cellosolve to prepare a varnish. The epoxy impregnated varnish thus obtained is dipped in a glass cloth 4, then air-dried and heat-dried at 80 ° C. for 4 hours in a dryer to form a sealing resin sheet having a thickness of 1000 μm. , This one
After cutting into 3 × 13 mm, a sealing resin sheet P having a resin layer 5 formed on both surfaces of the glass cloth 4 was prepared as shown in the top view and the sectional view of FIGS. 2 (a) and 2 (b). Further, as shown in FIG. 3, a copper foil 6 having the same shape as the sealing resin sheet P is formed, and the copper foil 6 is sandwiched between the two sealing resin sheets P.

【0034】一方通常の方法で、ポリイミド樹脂からな
るフィルムキャリア1に銅箔を貼着しこれをパターニン
グすることにより、リードパターン2を形成し、フィル
ムキャリアを形成する。このフィルムキャリア1を図7
に示すような半導体封止装置を用いて、供給リール10
0と巻取リール500との間で移動せしめつつ半導体チ
ップの搭載から樹脂封止までをインラインで行った。な
おこの装置は、供給リール100と、半導体チップ載置
部200と、2枚の封止用樹脂シートPで銅箔6を挟ん
だものを供給し前記半導体チップ上にこれを貼着するシ
ート貼着部300と、圧縮成型部400と、巻取リール
500と、アフターキュア部(図示せず)とから構成さ
れている。
On the other hand, by a usual method, a copper foil is attached to a film carrier 1 made of a polyimide resin and patterned to form a lead pattern 2 to form a film carrier. This film carrier 1 is shown in FIG.
Using the semiconductor sealing device as shown in FIG.
The process from mounting the semiconductor chip to resin sealing was performed in-line while moving between 0 and the take-up reel 500. This device is a sheet sticker that supplies a supply reel 100, a semiconductor chip mounting portion 200, and a copper foil 6 sandwiched between two sealing resin sheets P and sticks the copper foil 6 on the semiconductor chip. It is composed of an attachment portion 300, a compression molding portion 400, a take-up reel 500, and an after-cure portion (not shown).

【0035】まずチップ載置部200で位置合わせを行
いつつフィルムキャリア1上に10×10×0.5mmの
半導体チップ3をフェイスダウンでバンプを介してリー
ド2と接続する。
First, the semiconductor chip 3 having a size of 10 × 10 × 0.5 mm is connected face-down to the lead 2 via bumps on the film carrier 1 while aligning the chip mounting portion 200.

【0036】この後シート貼着部300で、図1(a) に
示すように、封止用樹脂シートPと銅箔6の積層体をフ
ィルムキャリア2上にバンプを介して搭載された半導体
チップ3の能動面側に貼り付け、さらに、圧縮成型部4
00においてヒータ402によって170℃に加熱され
た金型401内で1分間、圧縮成型して図1(b) に示す
ように半導体チップの能動面側のみを封止用樹脂シート
Pで固定した。ここで成型されたパッケ―ジの厚さは8
00μm であった。成型されたパッケ―ジを金型から外
し、巻取リール500を用いて巻き取ったのち、アフタ
ーキュア部(図示せず)で180℃4時間のアフタ―キ
ュアを行う。
Thereafter, in the sheet adhering portion 300, as shown in FIG. 1A, a semiconductor chip in which a laminate of the sealing resin sheet P and the copper foil 6 is mounted on the film carrier 2 via bumps. Affixed to the active surface side of 3, and the compression molding part 4
At 00, compression molding was carried out for 1 minute in the mold 401 heated to 170 ° C. by the heater 402, and only the active surface side of the semiconductor chip was fixed with the sealing resin sheet P as shown in FIG. 1 (b). The thickness of the package molded here is 8
It was 00 μm. After removing the molded package from the mold and winding it by using the take-up reel 500, after-curing is performed at 180 ° C. for 4 hours in an after-curing section (not shown).

【0037】なおここで金型401の凹部の形状は図8
に拡大説明図を示すように封止用樹脂シートの形状とほ
ぼ等しく形成されておりかつ金型凹部の容積は、封止用
樹脂シートと金属箔の体積の合計よりもやや小さく、成
型時に封止用樹脂シートが加圧されるようにしたものを
用いる。図中403は金型内を減圧にするための真空系
である。
The shape of the recess of the mold 401 is shown in FIG.
As shown in the enlarged explanatory diagram in Fig. 1, the shape of the sealing resin sheet is almost the same as that of the sealing resin sheet, and the volume of the mold recess is slightly smaller than the total volume of the sealing resin sheet and the metal foil. A resin sheet for pressing is used so as to be pressed. In the figure, 403 is a vacuum system for reducing the pressure inside the mold.

【0038】この後、シリカ等の研磨粉を用いた機械的
研磨により400μm 程度裏面を研磨し、図1(c) に示
すようにはじめ600μm であった半導体チップ3の厚
さを200μm 程度まで薄くする。7は研磨で除去され
る領域を示す。このとき封止用シートも同様に研磨され
裏面は平滑な形状になっている。この機械的研磨工程に
おいて、半導体チップ3は封止用樹脂シートPによって
極めて良好に固定されているため十分に機械的応力に耐
えることができる。
Thereafter, the back surface is polished by about 400 μm by mechanical polishing using polishing powder such as silica, and the thickness of the semiconductor chip 3 which was initially 600 μm is reduced to about 200 μm as shown in FIG. 1 (c). To do. Reference numeral 7 indicates a region removed by polishing. At this time, the sealing sheet is also polished and the back surface has a smooth shape. In this mechanical polishing step, since the semiconductor chip 3 is extremely well fixed by the sealing resin sheet P, it is possible to sufficiently withstand mechanical stress.

【0039】そしてさらに再び図7に示したような封止
装置を用いて図1(d) に示すように薄型に加工された半
導体チップ封止体の裏面側に再び封止用樹脂シートPと
銅箔6の積層体を貼り付け、同様に、圧縮成型部400
において170℃に加熱された金型401内で1分間、
圧縮成型して半導体チップの裏面側側のみを封止用樹脂
シートPで固定し,枠体を除去して個々に分断し樹脂封
止型半導体装置を完成した(図1(e) )。この枠体除去
前の状態を図5に示す。
Further, again using the sealing device as shown in FIG. 7, a sealing resin sheet P is again provided on the back surface side of the semiconductor chip sealing body processed into a thin shape as shown in FIG. 1 (d). A laminated body of copper foil 6 is attached, and similarly, the compression molding unit 400
In the mold 401 heated to 170 ° C. for 1 minute,
The resin-sealed semiconductor device was completed by compression-molding and fixing only the back surface side of the semiconductor chip with the sealing resin sheet P, removing the frame, and dividing into individual parts (FIG. 1 (e)). The state before removal of the frame is shown in FIG.

【0040】なお、樹脂封止装置としては前記実施例で
用いたものに限定されることなく、図9に示すように封
止用樹脂シートの貼着および加圧成型を同一装置(箇
所)で行うようにしてもよい。ここでは封止用樹脂シー
ト供給機Kが圧縮成型機に近接して設けられており、フ
ィルムキャリア1に搭載されて搬送されてきた半導体チ
ップ3が金型401の位置にきたところで、封止用樹脂
シート供給機Kによって封止用樹脂シートPが半導体チ
ップの両面に貼着され、続いてその位置でヒータ402
によって加熱されつつ金型401で加圧成型され樹脂封
止がなされる。
The resin sealing device is not limited to the one used in the above embodiment, and as shown in FIG. 9, sticking and pressure molding of the sealing resin sheet can be performed in the same device (location). You may do it. Here, a resin sheet feeder K for sealing is provided in the vicinity of the compression molding machine, and when the semiconductor chip 3 mounted on the film carrier 1 and conveyed reaches the position of the mold 401, it is sealed. The encapsulating resin sheet P is attached to both sides of the semiconductor chip by the resin sheet feeder K, and then the heater 402 is placed at that position.
While being heated by, it is pressure-molded by a mold 401 and resin-sealed.

【0041】さらに図10に示すように、封止用樹脂シ
ートをテープT1 ,T2 上に載置して、連続的に供給
し、フィルムキャリア1に搭載された半導体チップ3の
両面に貼着部300で封止用樹脂シートPを貼着し、圧
縮成型部400で加圧成型するようにしてもよい。この
とき封止用樹脂シート供給後のテープは巻きとりリール
によって巻き取られる。
Further, as shown in FIG. 10, a resin sheet for sealing is placed on the tapes T1 and T2 and continuously supplied to both sides of the semiconductor chip 3 mounted on the film carrier 1 to attach portions. The sealing resin sheet P may be adhered at 300 and pressure-molded at the compression molding part 400. At this time, the tape after supplying the sealing resin sheet is wound by a winding reel.

【0042】なお、前記実施例では裏面を研磨したもの
を再び封止用樹脂シートPで封止したが、図1(c) に示
したように研磨したのち、そのまま個々の半導体装置に
分割することによって半導体チップの裏面が露呈した状
態で薄型の樹脂封止型半導体装置として、図11に示す
ように放熱板11上に載置して実装しても良い。
In the above-mentioned embodiment, the back surface of which is polished is sealed with the sealing resin sheet P again. However, after polishing as shown in FIG. 1 (c), it is divided into individual semiconductor devices as they are. As a result, a thin resin-sealed semiconductor device in which the back surface of the semiconductor chip is exposed may be mounted on the heat dissipation plate 11 as shown in FIG.

【0043】さらに図12に示すようにこのように裏面
が露呈した状態の半導体装置を封止用樹脂シートを挾ん
で複数個積層し圧縮硬化させるようにすれば、半導体チ
ップの破壊あるいはボンディング不良等を生じることな
く良好に封止することができ、歩留まりが向上する。
Further, as shown in FIG. 12, if a plurality of semiconductor devices with the back surface exposed as described above are sandwiched with encapsulating resin sheets and a plurality of them are compression-cured, semiconductor chips are broken or bonding is defective. It is possible to satisfactorily perform the sealing without causing the occurrence, and the yield is improved.

【0044】実施例2 次に本発明の第2の実施例として、化学的蝕刻法を用い
て半導体チップ3を薄くする方法について説明する。
Embodiment 2 Next, as a second embodiment of the present invention, a method of thinning the semiconductor chip 3 by using a chemical etching method will be described.

【0045】封止用樹脂シートをフィルムキャリア1に
搭載された半導体チップ3の能動面側に圧縮成型する工
程までは前記実施例とまったく同様である(図13(a)
および(b) )。
The steps up to the step of compression-molding the encapsulating resin sheet on the active surface side of the semiconductor chip 3 mounted on the film carrier 1 are exactly the same as in the above embodiment (FIG. 13 (a)).
And (b)).

【0046】この後、KOHからなるエッチング液に浸
漬し、半導体チップ3の裏面側を選択的に400μm 程
度蝕刻し、図13(c) に示すようにはじめ600μm で
あった半導体チップ3の厚さを200μm 程度まで薄く
する。このとき封止用樹脂シートはエッチングされずに
残り、裏面には凹部が形成される。このエッチング工程
において封止用樹脂シートは良好な保護効果を発揮し、
半導体チップ裏面のみが選択的にエッチングされる。
Thereafter, the back surface side of the semiconductor chip 3 is selectively etched by about 400 μm by being dipped in an etching solution made of KOH, and the thickness of the semiconductor chip 3 which was initially 600 μm as shown in FIG. 13 (c). To about 200 μm. At this time, the sealing resin sheet remains without being etched, and a recess is formed on the back surface. In this etching step, the sealing resin sheet exerts a good protective effect,
Only the back surface of the semiconductor chip is selectively etched.

【0047】この後、図13(d) に示すように、封止用
樹脂シートに形成された凹部12に樹脂13を充填する
かあるいはチップの大きさに相当する封止用樹脂シート
を埋め込んで硬化成型することにより実施例1よりもさ
らに薄型の樹脂封止型半導体装置を得ることができる。
After that, as shown in FIG. 13D, the recess 12 formed in the sealing resin sheet is filled with the resin 13 or the sealing resin sheet corresponding to the size of the chip is embedded. By curing and molding, it is possible to obtain a resin-encapsulated semiconductor device that is thinner than that of the first embodiment.

【0048】またこの変形例として図14に示すよう
に、この凹部に金属箔14を埋め込むようにしてもよ
い。
As a modification of this, as shown in FIG. 14, the metal foil 14 may be embedded in this recess.

【0049】なお、前記実施例では、プリプレグはカッ
トしたものを用い、貼着部で供給して貼着するようにし
たが、プリプレグをカットしてキャリアテープに載置し
たり、プリプレグをフィルム状に形成し、プリプレグ自
体に送り穴を形成して供給するようにしてもよい。
In the above-mentioned embodiment, the prepreg which has been cut is used, and the prepreg is supplied and attached at the attaching portion. However, the prepreg is cut and placed on a carrier tape, or the prepreg is formed into a film. Alternatively, the prepreg itself may be provided with feed holes to supply the prepreg.

【0050】また、前記実施例ではガラスクロスに樹脂
を含浸させたプリプレグを用いたが封止用樹脂シートと
しては、繊維を用いることなく、溶融状態の樹脂をわず
か架橋させ、シート状にしたものでもよい。
Although the prepreg obtained by impregnating the glass cloth with the resin is used in the above-mentioned embodiment, the resin sheet for sealing is formed by slightly cross-linking the molten resin without using fibers. But it's okay.

【0051】[0051]

【発明の効果】以上説明してきたように、本発明によれ
ば、半導体チップ自体を薄く形成することができるた
め、超薄型で信頼性の高い樹脂封止型半導体装置を得る
ことが可能となる。
As described above, according to the present invention, since the semiconductor chip itself can be formed thin, it is possible to obtain an ultrathin and highly reliable resin-sealed semiconductor device. Become.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の樹脂封止型半導体装置
の製造工程図
FIG. 1 is a manufacturing process diagram of a resin-sealed semiconductor device according to a first embodiment of the present invention.

【図2】同工程で用いられる部材の拡大説明図FIG. 2 is an enlarged explanatory view of members used in the same process.

【図3】同工程で用いられる部材の拡大説明図FIG. 3 is an enlarged explanatory view of members used in the same process.

【図4】同工程で用いられる部材の拡大説明図FIG. 4 is an enlarged explanatory view of members used in the same process.

【図5】同工程の部分説明図FIG. 5 is a partial explanatory view of the same process.

【図6】同工程で形成された樹脂封止型半導体装置を示
す図
FIG. 6 is a view showing a resin-sealed semiconductor device formed in the same process.

【図7】同装置で用いられる封止装置を示す図FIG. 7 is a view showing a sealing device used in the same device.

【図8】同装置の要部拡大図FIG. 8 is an enlarged view of a main part of the device.

【図9】同装置で用いられる他の封止装置を示す図FIG. 9 is a view showing another sealing device used in the same device.

【図10】同装置で用いられる他の封止装置を示す図FIG. 10 is a view showing another sealing device used in the same device.

【図11】本発明の樹脂封止型半導体装置の変形例の実
装例を示す図
FIG. 11 is a diagram showing a mounting example of a modified example of the resin-encapsulated semiconductor device of the present invention.

【図12】本発明の樹脂封止型半導体装置の変形例を示
す図
FIG. 12 is a view showing a modified example of the resin-encapsulated semiconductor device of the present invention.

【図13】本発明の第2の実施例の樹脂封止型半導体装
置の製造工程図
FIG. 13 is a manufacturing process diagram of a resin-sealed semiconductor device according to a second embodiment of the present invention.

【図14】本発明の樹脂封止型半導体装置の変形例を示
す図
FIG. 14 is a diagram showing a modified example of the resin-encapsulated semiconductor device of the present invention.

【図15】従来例の樹脂封止型半導体装置を示す図FIG. 15 is a diagram showing a conventional resin-encapsulated semiconductor device.

【符号の説明】[Explanation of symbols]

1 フィルムキャリア 2 リードパターン 3 半導体チップ 4 ガラス繊維 5 樹脂層 P プリプレグ 6 銅箔 7 除去領域 11 金属板 12 樹脂 13 金属箔 1 Film Carrier 2 Lead Pattern 3 Semiconductor Chip 4 Glass Fiber 5 Resin Layer P Prepreg 6 Copper Foil 7 Removal Area 11 Metal Plate 12 Resin 13 Metal Foil

フロントページの続き (72)発明者 望月 正生 神奈川県川崎市幸区小向東芝町 1 株式 会社東芝総合研究所内 (72)発明者 山地 泰弘 神奈川県川崎市幸区小向東芝町 1 株式 会社東芝総合研究所内 (72)発明者 太田 英男 神奈川県川崎市幸区小向東芝町 1 株式 会社東芝総合研究所内Front page continuation (72) Inventor Masao Mochizuki 1 Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa Toshiba Research Institute Co., Ltd. Inside the Research Institute (72) Inventor Hideo Ota 1 Komukai Toshiba-cho, Sachi-ku, Kawasaki City, Kanagawa Prefecture Toshiba Research Institute Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 複数のリードを含むリード構成体に半導
体チップを搭載する搭載工程と前記半導体チップの能動
面側に封止用樹脂シートを貼着し一体的に加圧成型する
成型工程と前記半導体チップを裏面側から所望の厚さま
で研磨する研磨工程とを含むことを特徴とする樹脂封止
型半導体装置の製造方法。
1. A mounting step of mounting a semiconductor chip on a lead structure including a plurality of leads, a molding step of sticking a sealing resin sheet on the active surface side of the semiconductor chip, and integrally press-molding the same. And a step of polishing the semiconductor chip from the back surface side to a desired thickness.
【請求項2】 さらに、前記半導体チップの裏面側にも
封止用樹脂シートを貼着し一体的に加圧成型する第2の
成型工程を含むことを特徴とする請求項1記載の樹脂封
止型半導体装置の製造方法。
2. The resin encapsulation according to claim 1, further comprising a second molding step in which a sealing resin sheet is also attached to the back surface side of the semiconductor chip and integrally pressure-molded. Method of manufacturing static semiconductor device.
JP4085789A 1992-03-31 1992-04-07 Manufacture of resin-sealed semiconductor device Pending JPH05291218A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP4085789A JPH05291218A (en) 1992-04-07 1992-04-07 Manufacture of resin-sealed semiconductor device
KR1019930005371A KR0124494B1 (en) 1992-03-31 1993-03-31 Plastic package semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4085789A JPH05291218A (en) 1992-04-07 1992-04-07 Manufacture of resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPH05291218A true JPH05291218A (en) 1993-11-05

Family

ID=13868660

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4085789A Pending JPH05291218A (en) 1992-03-31 1992-04-07 Manufacture of resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPH05291218A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003062749A (en) * 2001-08-23 2003-03-05 Shin Kobe Electric Mach Co Ltd Platy body for holding workpiece to be polished and holding material for workpiece to be polished
US6664616B2 (en) 1996-11-21 2003-12-16 Hitachi, Ltd. Semiconductor device and manufacturing method thereof
US6881611B1 (en) * 1996-07-12 2005-04-19 Fujitsu Limited Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6881611B1 (en) * 1996-07-12 2005-04-19 Fujitsu Limited Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device
US6664616B2 (en) 1996-11-21 2003-12-16 Hitachi, Ltd. Semiconductor device and manufacturing method thereof
US6759272B2 (en) 1996-11-21 2004-07-06 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
JP2003062749A (en) * 2001-08-23 2003-03-05 Shin Kobe Electric Mach Co Ltd Platy body for holding workpiece to be polished and holding material for workpiece to be polished
JP4517552B2 (en) * 2001-08-23 2010-08-04 新神戸電機株式会社 Workpiece holding material

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