JPH05263288A - Electroplating method - Google Patents

Electroplating method

Info

Publication number
JPH05263288A
JPH05263288A JP6246092A JP6246092A JPH05263288A JP H05263288 A JPH05263288 A JP H05263288A JP 6246092 A JP6246092 A JP 6246092A JP 6246092 A JP6246092 A JP 6246092A JP H05263288 A JPH05263288 A JP H05263288A
Authority
JP
Japan
Prior art keywords
plating
plate
holes
hole
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6246092A
Other languages
Japanese (ja)
Inventor
Junko Kurokawa
順子 黒川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6246092A priority Critical patent/JPH05263288A/en
Publication of JPH05263288A publication Critical patent/JPH05263288A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To uniformize the thickness of a plated layer regardless of size in a region for formation of plating. CONSTITUTION:A metallic plate 4 to be plated is connected to an anode. A material body 5 provided with a plurality of plating regions 7a, 7b different in area is connected to a cathode. The following lattice plate 6 is opposed to the metallic plate 4 in the vicinity of the material body 5 and connected to the cathode in parallel for the material body 5. Through-holes 8a at least opposite to the respective wide plating regions 7a and through-holes 8b opposite to the respective narrow plating regions 7b are bored in the lattice plate 6. The rate of perforation of the through-holes 8b to the narrow plating region 7b is made smaller than the rate of perforation of the through-hole 8a to the wide plating region 7a. The metallic plate A, the material body 5 and the lattice plate 6 are immersed in plating liquid 2. An equipment is constituted so that plating current is allowed to flow through the plating liquid 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電気めっき方法、特に、
めっき面積が異なる複数個の領域に対し、均一厚さに電
気めっきするための方法に関する。
FIELD OF THE INVENTION The present invention relates to an electroplating method, in particular,
The present invention relates to a method for electroplating a plurality of regions having different plating areas to a uniform thickness.

【0002】[0002]

【従来の技術】一般に電気めっきは、陽極に接続しため
っきさせようとする金属板を陽極に接続し、めっきしよ
うとする物体を陰極に接続し、電解液に該金属と物体と
を浸漬し、該物体の表面に該金属の層を析出させる。
2. Description of the Related Art Generally, in electroplating, a metal plate to be plated connected to an anode is connected to an anode, an object to be plated is connected to a cathode, and the metal and the object are immersed in an electrolytic solution. Deposit a layer of the metal on the surface of the body.

【0003】かかる電気めっきは、回路基板の導体パタ
ーン例えばバンプを用いて半導体装置を実装したりワイ
ヤ接続するパッドの作成にも利用されている。しかしな
がら、例えば 100μm 角のパッドと50μm 角のパッドと
が同一基板に混在するとき、大面積のパッドよりも小面
積のパッドに金属イオンが集中するため、 100μm 角の
パッドに生成されるめっき層より、50μm 角のパッドに
生成されるめっき層が厚くなる。
Such electroplating is also used to mount a semiconductor device by using a conductor pattern of a circuit board, for example, a bump, or to form a pad for wire connection. However, for example, when a 100 μm square pad and a 50 μm square pad are mixed on the same substrate, metal ions are concentrated on a pad with a smaller area than a pad with a large area. , The plating layer generated on the 50 μm square pad becomes thicker.

【0004】[0004]

【発明が解決しようとする課題】以上説明したように、
大小のパッドが混在する回路基板において、小さいパッ
ドに生成しためっき層は、大きいパッドのそれより厚く
なり、厚さが必要以上になったり、めっき荒れやめっき
焼けが生じ易く、ワイヤ接続等に対する信頼性が損なわ
れることがあった。
As described above,
In a circuit board with large and small pads mixed, the plating layer generated on the small pad is thicker than that of the large pad, and the thickness is more than necessary, and plating roughening or plating burn is likely to occur, and reliability for wire connection etc. The sex was sometimes impaired.

【0005】[0005]

【課題を解決するための手段】面積が異なる領域に生成
したこめっき厚を均一化せしめることを目的とした本発
明方法は、実施例を示す図1によれば、めっきさせよう
とする金属の板4を電源装置3の陽極に接続し、面積が
異なる複数のめっき領域7a,7bが配設された物体(回路
基板)5を電源装置3の陰極に接続し、被めっき物体5
の近傍には金属板4と対向し,少なくとも広い該めっき
領域7a のそれぞれに対向する透孔8aと狭い該めっき
領域7b のそれぞれに対向する透孔8b とがあけられ,
広い該めっき領域7a に対する該透孔8a の開口率より
狭い該めっき領域7b に対する該透孔8b の開口率が小
である格子板6を被めっき物体5と並列に該陰極と接続
し、金属板4と被めっき物体5と格子板6とをめっき液
2に浸漬し、めっき液2にめっき電流を流すことであ
る。
According to the embodiment of FIG. 1, the method of the present invention aimed at making the plating thickness generated in regions having different areas uniform is shown in FIG. The plate 4 is connected to the anode of the power supply device 3, and the object (circuit board) 5 on which the plurality of plating regions 7a and 7b having different areas are arranged is connected to the cathode of the power supply device 3, and the object to be plated 5 is connected.
A through hole 8a facing the metal plate 4 and facing at least the wide plating area 7a and a narrow hole 8b facing the narrow plating area 7b, respectively.
A grid plate 6 having a smaller opening ratio of the through holes 8b to the plating region 7b, which is smaller than the opening ratio of the through holes 8a to the wide plating region 7a, is connected in parallel with the object 5 to be plated to the cathode, and a metal plate is formed. 4, the object to be plated 5, and the grid plate 6 are immersed in the plating solution 2 and a plating current is passed through the plating solution 2.

【0006】[0006]

【作用】上記手段によれば、格子板6を配設しその格子
板には、広いめっき領域7a に対向する透孔8a と狭い
めっき領域7b に対向する透孔8b を設け、領域7a に
対する透孔8a の開口率より、領域7b に対する透孔8
b の開口率を小としたことにより、領域7a と7b に生
成されるめっき層を同一厚さにすることが可能になる。
According to the above means, the grid plate 6 is provided, and the grid plate is provided with the through holes 8a facing the wide plating area 7a and the through holes 8b facing the narrow plating area 7b. From the aperture ratio of the hole 8a, the through hole 8 for the region 7b
By making the aperture ratio of b small, the plating layers formed in the regions 7a and 7b can have the same thickness.

【0007】[0007]

【実施例】図1は本発明方法の実施例におけるめっき装
置の概略図(イ) と金属イオン制御板の一部分を拡大した
平面図(ロ) 、図2は本発明方法の他の実施例におけるめ
っき装置の概略図、図3は本発明方法に係わる金属イオ
ン制御板に形成した透孔の他の実施例の説明図である。
FIG. 1 is a schematic view of a plating apparatus in an embodiment of the method of the present invention (a) and a partially enlarged plan view of a metal ion control plate (b), and FIG. 2 is a view of another embodiment of the method of the present invention. FIG. 3 is a schematic view of a plating apparatus, and FIG. 3 is an explanatory view of another embodiment of the through holes formed in the metal ion control plate according to the method of the present invention.

【0008】図1(イ) において、めっき槽1にはめっき
液2を注入し、電源装置3の陽極に接続した金属板(め
っきさせようとする金属の板)4と、電源装置3の陰極
に接続した回路基板(めっき層を生成させる物体)5
と、回路基板5と並列に電源装置3の陰極と接続した格
子板6とは、めっき液2に浸漬する。
In FIG. 1A, a plating bath 2 is filled with a plating solution 2, and a metal plate (a metal plate to be plated) 4 connected to an anode of a power supply 3 and a cathode of the power supply 3 are connected. Circuit board (object that creates a plating layer) connected to 5
The grid plate 6 connected to the cathode of the power supply device 3 in parallel with the circuit board 5 is immersed in the plating solution 2.

【0009】回路基板5に並行し例えば数mm程度に接近
する格子板6は、金属板に多数の透孔をエッチング等に
よりあけた網目状であり、図1(ロ) に示す如く、回路基
板5の大きいパッド7a に対する角形透孔8a の開口率
より、小さいパッド7b に対する角形透孔8b の開口率
を小さく、例えば 100μm 角のパッド7a に対向する透
孔8a を 100〜120 μm 角とし、50μm 角のパッド7b
に対向する透孔を35μm 角程度とする。
The grid plate 6 which is parallel to the circuit board 5 and approaches, for example, about several millimeters, is a mesh-like plate formed by etching a large number of through holes in a metal plate, and as shown in FIG. The opening ratio of the rectangular through hole 8a for the small pad 7b is smaller than the opening ratio of the rectangular through hole 8a for the large pad 7a of 5, for example, the through hole 8a facing the pad 7a of 100 μm square is 100 to 120 μm square, and 50 μm. Corner pad 7b
The through-hole facing each other is about 35 μm square.

【0010】そこで、金属板4と回路基板5および格子
板6に所定の電圧を印加し、めっき液2にめっき電流を
流すと、回路基板5のパッド7a,7b にはめっき層が生
成されると共に、金属イオンの一部は格子板6によって
遮られ、格子板6にもめっき層が生成されることにな
る。
Therefore, when a predetermined voltage is applied to the metal plate 4, the circuit board 5 and the grid plate 6 and a plating current is applied to the plating solution 2, a plating layer is formed on the pads 7a and 7b of the circuit board 5. At the same time, a part of the metal ions is blocked by the grid plate 6, and a plating layer is also formed on the grid plate 6.

【0011】しかし、透孔8a は透孔8b よりもめっき
液2および金属イオンが透過し易いため、大面積のパッ
ド7a には従来方法におけるときとほぼ同速度でめっき
層が生成される反面、従来方法で小面積のパッド7b に
対し金属イオンが集中するという現象が解消し、パッド
7a と7b には同一厚さのめっき層が生成されるように
なる。
However, since the plating solution 2 and metal ions are more easily transmitted through the through holes 8a than through holes 8b, a plating layer is formed on the pad 7a having a large area at substantially the same speed as in the conventional method. The phenomenon that metal ions are concentrated on the pad 7b having a small area by the conventional method is eliminated, and the plating layers having the same thickness are formed on the pads 7a and 7b.

【0012】なお、格子板6にあける透孔の他の実施例
は、大きいパッド7a には複数本の縞状(スリット状)
の透孔が横切るようにし、小さいパッド7b には網目状
にあけた複数個の透孔が対向するようにする。または、
大きいパッド7a には粗い網目状の透孔が対向し、小さ
いパッド7b には細かい網目状の透孔が対向する。或い
は、大きいパッド7a を覆う桟幅で網目状の透孔を形成
し、かつ、大きいパッド7a および小さいパッド7b が
透孔と重ならないようにする。
Another embodiment of the through holes in the grid plate 6 is that the large pad 7a has a plurality of stripes (slits).
Through the small pad 7b so that a plurality of through holes formed in a mesh shape are opposed to the small pad 7b. Or
A coarse mesh-shaped through hole faces the large pad 7a, and a fine mesh-shaped through hole faces the small pad 7b. Alternatively, a mesh-shaped through hole is formed with a beam width covering the large pad 7a, and the large pad 7a and the small pad 7b do not overlap with the through hole.

【0013】図2において、めっき槽1にはめっき液2
を注入し、電源装置3の陽極に接続した金属板4と、電
源装置3の陰極に図示しない導体パターンを接続した回
路基板5と、可変抵抗器9を介して回路基板5と並列に
電源装置3の陰極と接続した格子板6とは、めっき液2
に浸漬する。
In FIG. 2, the plating bath 2 has a plating solution 2
A metal plate 4 connected to the anode of the power supply device 3, a circuit board 5 having a conductor pattern (not shown) connected to the cathode of the power supply device 3, and a power supply device in parallel with the circuit board 5 via a variable resistor 9. The grid plate 6 connected to the cathode of No. 3 is the plating solution 2
Soak in.

【0014】可変抵抗器9は格子板6に流れる電流を制
御し、格子板6に流れる電流が回路基板5に流れる電流
より適当に小さくする。その結果、格子板6に生成され
るめっき層の厚さは、図1に示す如く可変抵抗器9を使
用しないときに比べ薄くなり、回路基板5に対するめっ
き効率がよくなる。
The variable resistor 9 controls the current flowing through the grid plate 6 so that the current flowing through the grid plate 6 is appropriately smaller than the current flowing through the circuit board 5. As a result, the thickness of the plating layer formed on the grid plate 6 becomes smaller than that when the variable resistor 9 is not used as shown in FIG. 1, and the plating efficiency on the circuit board 5 is improved.

【0015】図3(イ) において、大形のパッド7a に対
向する透孔8a ′および小形のパッド7b に対向する透
孔8b ′が菱形であるのに対し、図3(ロ) において、大
形のパッド7a に対向する透孔8a ″,小形のパッド7
b に対向する透孔8b ″はスリット状である。
In FIG. 3 (a), the through hole 8a 'facing the large pad 7a and the through hole 8b' facing the small pad 7b are diamond-shaped, whereas in FIG. Through-hole 8a ″, which is opposed to the pad 7a in the shape of a small pad 7
The through hole 8b ″ facing b is slit-shaped.

【0016】そして、かかる8a ′,8b ′,8a ″お
よび8b ″は、透孔8a および8bと同様に、パッド7a
および7b に対し金属イオンが均等化し、パッド7a
と7b に生成されるめっきの厚さを均一化させる。
And, such 8a ', 8b', 8a "and 8b" are the same as the through holes 8a and 8b.
And metal ions are equalized to 7b and pad 7a
And 7b to even out the thickness of the plating produced.

【0017】なお、本発明方法において格子板6には、
金属板4のめっき層が生成され、該めっき層が厚くなる
と必要以上に金属イオンの流れを抑制することになる。
そこで、めっき層が生成された格子板6は金属板4に替
えて利用可能であり、そのことによってめっき層を剥離
できるため繰り返し使用が可能となる。
In the method of the present invention, the grid plate 6 is
When the plating layer of the metal plate 4 is generated and the plating layer becomes thick, the flow of metal ions is suppressed more than necessary.
Therefore, the grid plate 6 on which the plating layer is generated can be used instead of the metal plate 4, and the plating layer can be peeled off by that, and thus the grid plate 6 can be repeatedly used.

【0018】[0018]

【発明の効果】以上説明したように本発明方法によれ
ば、従来方法ではめっき面積に対応し生じためっき層の
厚さむら,めっき荒れ,めっき焼けをなくし、本発明方
法を回路基板のパッドに適用したとき、めっきに対する
製造歩留りおよびボンディング等の後工程に対する信頼
性が向上した効果を有する。
As described above, according to the method of the present invention, it is possible to eliminate the unevenness in the thickness of the plating layer, the roughening of the plating, and the burning of the plating, which are caused by the conventional method in the conventional method. When applied to, it has the effect of improving the manufacturing yield for plating and the reliability of the subsequent processes such as bonding.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明方法の実施例におけるめっき装置の概
略図と金属イオン制御用格子板の説明図である。
FIG. 1 is a schematic view of a plating apparatus and an explanatory view of a metal ion controlling grid plate in an embodiment of the method of the present invention.

【図2】 本発明方法の他の実施例におけるめっき装置
の概略図である。
FIG. 2 is a schematic view of a plating apparatus in another embodiment of the method of the present invention.

【図3】 本発明方法の実施例における他の金属イオン
制御用格子板の説明図である。
FIG. 3 is an explanatory view of another metal ion controlling lattice plate in the example of the method of the present invention.

【符号の説明】[Explanation of symbols]

2はめっき液 4はめっきさせようとする金属の板 5は回路基板(めっきすべき物体) 6は格子板 7a,7b はパッド (めっき生成領域) 8a, 8a′,8a ″,8b,8b′,8b ″は格子板に設けた透
孔 9は可変抵抗器
2 is a plating solution 4 is a metal plate to be plated 5 is a circuit board (object to be plated) 6 is a grid plate 7a, 7b is a pad (plating generation area) 8a, 8a ′, 8a ″, 8b, 8b ′ , 8b "are through holes provided in the lattice plate. 9 is a variable resistor.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 めっきさせようとする金属の板(4) を陽
極に接続し、面積が異なる複数のめっき領域(7a,7b) が
配設された物体(5) を陰極に接続し、該物体(5) の近傍
には該金属板(4) と対向し,少なくとも広い該めっき領
域(7a)のそれぞれに対向する透孔(8a)と狭い該めっき領
域(7b)のそれぞれに対向する透孔(8b)とがあけられ,広
い該めっき領域(7a)に対する該透孔(8a)の開口率より狭
い該めっき領域(7b)に対する該透孔(8b)の開口率が小で
ある格子板(6) を該物体(5) と並列に該陰極と接続し、
該金属板(4) と該物体(5) と該格子板(6) とをめっき液
(2) に浸漬し、該めっき液(2) にめっき電流を流すこと
を特徴とした電気めっき方法。
1. A metal plate (4) to be plated is connected to an anode, and an object (5) having a plurality of plating regions (7a, 7b) having different areas is connected to a cathode. Near the object (5), there is a through hole (8a) facing the metal plate (4) and facing at least each of the wide plating areas (7a) and each of the narrow facing holes (7a). A lattice plate having holes (8b) and a smaller aperture ratio of the through hole (8b) to the plating region (7b) than the aperture ratio of the through hole (8a) to the wide plating region (7a). (6) is connected to the cathode in parallel with the object (5),
The metal plate (4), the object (5) and the lattice plate (6) are plated with a plating solution.
An electroplating method characterized by immersing in (2) and applying a plating current to the plating solution (2).
【請求項2】 可変抵抗器(9) を介して前記格子板(6)
を前記陰極に接続し、該可変抵抗器(9) の調整によって
前記格子板(6) に流れる電流を制御することを特徴とし
た請求項1記載の電気めっき方法。
2. The lattice plate (6) through a variable resistor (9)
2. The electroplating method according to claim 1, wherein a current is supplied to the grid plate (6) by controlling the variable resistor (9) by connecting to the cathode.
JP6246092A 1992-03-18 1992-03-18 Electroplating method Withdrawn JPH05263288A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6246092A JPH05263288A (en) 1992-03-18 1992-03-18 Electroplating method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6246092A JPH05263288A (en) 1992-03-18 1992-03-18 Electroplating method

Publications (1)

Publication Number Publication Date
JPH05263288A true JPH05263288A (en) 1993-10-12

Family

ID=13200844

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6246092A Withdrawn JPH05263288A (en) 1992-03-18 1992-03-18 Electroplating method

Country Status (1)

Country Link
JP (1) JPH05263288A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002097171A2 (en) * 2001-05-30 2002-12-05 Ines Urbani Plant for the surface treatment of metallic end-products, in particular aluminum, by means of a plasma effect generated in the so-called helmotz layer of a dielectric solvent, changed into a conductor by its solution with an acid in an electrochemical cell
KR100598429B1 (en) * 2005-04-08 2006-07-10 광주과학기술원 Electrode structure for electrodeionization
JP2009212360A (en) * 2008-03-05 2009-09-17 Renesas Technology Corp Semiconductor device, and manufacturing method and mounting method therefor
US7704365B2 (en) 2000-05-24 2010-04-27 International Business Machines Corporation Metal plating process
JP2015086444A (en) * 2013-10-31 2015-05-07 凸版印刷株式会社 Electrolytic plating apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7704365B2 (en) 2000-05-24 2010-04-27 International Business Machines Corporation Metal plating process
WO2002097171A2 (en) * 2001-05-30 2002-12-05 Ines Urbani Plant for the surface treatment of metallic end-products, in particular aluminum, by means of a plasma effect generated in the so-called helmotz layer of a dielectric solvent, changed into a conductor by its solution with an acid in an electrochemical cell
WO2002097171A3 (en) * 2001-05-30 2005-08-04 Ines Urbani Plant for the surface treatment of metallic end-products, in particular aluminum, by means of a plasma effect generated in the so-called helmotz layer of a dielectric solvent, changed into a conductor by its solution with an acid in an electrochemical cell
KR100598429B1 (en) * 2005-04-08 2006-07-10 광주과학기술원 Electrode structure for electrodeionization
JP2009212360A (en) * 2008-03-05 2009-09-17 Renesas Technology Corp Semiconductor device, and manufacturing method and mounting method therefor
JP2015086444A (en) * 2013-10-31 2015-05-07 凸版印刷株式会社 Electrolytic plating apparatus

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